Chapter 3: MOS

Based on Prof. Rabaey and Prof.

Allen’s lectures
Overview

„ Diode
„ General Considerations: bare minimum
device physics, second order effect
„ MOS I/V Characteristics: gradual channel
approximation
„ Second - Order Effects: body effect, channel
length modulation, sub-threshold conduction
„ MOS Device Models: layout, capacitance,
small signal model
Diode
Diode
Diode
Diode
Diode
Diode
Diode
Metal Semiconductor Junctions
 General Considerations

MOSFET Structure
Poly
S G D Oxide

+ +
n L eff n
P − substrate Ldrawn LD
 G
B S D

b+
n+ n+
p − substrate

- NMOS -

G
B S D

+ p+ p+
n
n − substrate
- PMOS -
 G G
B S D S D B

p+ + + p+ p+
n n n+
p − substrate n - well,
or local
substrate

- CMOS -
MOS Symbols
D D D

G B G G

S S S
NMOS NMOS NMOS

S S S

G B G G

D D D
PMOS PMOS PMOS
 2.2 MOS I/V Characteristics
Threshold Voltage: “turn-on” voltage
- + - +

VG +0.1V VG +0.1V

p+
n+ n+ n+ -- -- -- -- -- n+
p − substrate p − substrateNegative Ions: fixed charge forms
Space charge region

+0.1V - +

VG +0.1V
VGS >
= VTH
+
VG n+ ---------------------- n+
- -- -- -- -- --
p − substrate
Electrons:
Mobile charge
 I/V characteristics
VG
S D
VG
W VG >
= VTH

n+ --------- n+
p- substrate

VG VG
S + - Triode region Operation
VD
W
+ VDS ≤ VGS - VTH
- VD
n+ --------- n+ W 1 2
p- substrate ID =¥ìnCox [ (VGS − VTH ) VDS − VDS ]
L 2
Triode region Operation
VGS1 < VGS2 < VGS3 VDS = VGS - VTH
VDS < VGS - VTH
ID =
VGS3 W 1 2
Triode region ID = ¥ìnCox [ (VGS − VTH ) VDS − VDS ]
L 2
VGS1 VGS3 - VTH
VGS2
VDS << 2(VGS − VTH )
VGS1 - VTH
VGS2 - VTH

VDS
W
Linear : I D ≈ ¥ìn C ox (V GS − V TH )V DS
L
1
RO =
VGS3 W
¥ì n C ox (V GS − V TH )
VGS2
L
V GS
VGS1 G

S D S D
MOSFET as a controlled linear resistor
 Saturation region Operation
VDS = VGS - VTH
VG
VGS3 VD
ID Saturation region
VGS2
VGS1 ---
--- -- -
n + n+
VDS
VGS3 - VTH
VGS1 - VTH
VGS2 - VTH

VGS1 < VGS2 < VGS3 Pinch-off

VDS ≥ VGS − VTH VDD VDD

I1
I1 I2
1 W
ID = ¥ìn C ox (V GS − V TH ) 2 Vb Vb I2
2 L
NMOS PMOS

Saturated MOSFETs operating as current sources

Transconductance in Sturation region
gm

1 W
ID = ¥ì n C ox (V GS − V TH ) 2 V GS − V TH
2 L
W/L Constant
∂ID
gm = gm
∂VGS VDS , const.

W
= ¥ìnCox (VGS − VTH ) ID
L W/L Constant

W gm
= 2¥ìnCox ID
L
2ID V GS − V TH
=
VGS − VTH ID Constant
 Second - Order Effects
Body Effect
VD
VB < 0 - + VD
VG

+
p+ n+ n+ VG VB < 0
p-substrate -
NMOS device with negative bulk voltage
VB = 0 - + VD VB < 0 - + VD
VG VG

p+ n+ - - - n+ p+ n+ -- -- -- n+
p-substrate Qd p-substrate Qd
Variation of depletion region charge with bulk voltage
V TH = V THO + γ( 2 φ F + V SB − 2 φ F ), see ex. 2.3
 Channel - Length Modulation
- +
- +
VG
VS
VD

n+ --
-- ------ -
---- n+
--
L' Δ L
L
(VGS 1 < VGS 2 < VGS 3 < VGS 4 ) '
L = L − ¥ÄL
ID Linear Saturation VGS 4 ¥ÄL
= ¥ë V DS
VGS 3 L
1 W
VGS 2 I D = ¥ìnCox (VGS − VTH ) 2 (1 + ¥ëVDS )
2 L
VGS 1
ID 1 1
Slope = = = , ex 2 . 4
VDS=VGS-Vth VDS V DS V DS /I D RO
Subthreshold Conduction
Sqare Law
Exponential
log I D

VTH VGS

Subthreshold region VGS

I D = IO exp
VDS ≥ 200mV ¥æV
T

V GS < V TH ⎛ ¥êT ⎞
⎜⎜¥æ> 1 , VT = ⎟⎟
⎝ q ⎠
 MOS Device Capacitances, see S 3 before starting
D
C GD C DB
C3 C1 C4
n+ n+
G B C6
C5 C2
C GS C SB
Inversion
P- substrate Depletion
C GB Layer
Layer
S

C1 Oxide capacitance between the gate and the channel

C2 Depletion capacitance between the channel and the substrate
C3 ,C 4 Capacitance due to the overlap of the gate poly with the source and drain areas

C5 ,C6 Junction capacitance between the source/drain areas and the substrate
 VD

+
VG
-

2
WLCox + WCOv
3 WLCox
CGS Saturation + WCOv
Triode 2
WCOv
CGD
Off

VTH VD - VTH VGS

Variaton of gate-source and gate-drain capacitances versus VGS
Capacitances in 0.25 μm CMOS
process
 Ex. 2.6 MOS Device Models
MOS Device Layout
Channel Area

Contact
W Windows

L drawn

RG RG
2 2
RG
W
W
2
MOS Small-Signal Model

1 W
ID = ¥ìn C ox (V GS − V TH ) 2
2 L
G + D
∂I D
Vgs g mVgs gm =
∂VGS
- VDS , const.

W
= ¥ìnCox (VGS − VTH )
L
S
W
Basic MOS small-signal model = 2¥ìnCox ID
L
2I D
=
VGS − VTH
G D
+
Vgs g mVgs ¥áVds
-
1 W
ID = ¥ìnCox (VGS − VTH )2 (1 + ¥ëVDS )
2 L
S
Channel-length modulation represented
∂ V DS
rO =
by a dependent current source ∂I D
1
G D =
+ ∂ I D / ∂ V DS
Vgs g mVgs rO
- 1
=
1 W
¥ìnC ox (V GS − VTH ) 2 ¥ë
2 L
S 1
≈
Channel-length modulation represented ¥ëI D
by a resistor
 G D
+
Vgs g mVgs rO g mbVbs
-
S
-
Vbs
VB +

Body effect represented by a dependent current source

1 W ∂ VTH ∂V
ID = ¥ìnCox (VGS − VTH )2 (1 + ¥ëVDS ) = − TH
2 L ∂ V BS ∂ V SB
VTH = VTHO + ¥ã( 2¥õF + VSB − 2¥õF )
∂I D
= −
1
2
(
γ 2¥õF + V SB )
−1/2

g mb = ¥ã
∂VBS g mb = g m
2 2¥õF + V SB
W ⎛ ∂VTH ⎞
= ¥ìnCox (VGS − VTH )⎜⎜ - ⎟⎟
L ⎝ ∂VBS ⎠ = ¥çg m
 CGD

G D
+
Vgs g mVgs rO g mbVbs
CGS
-
CGB S CDB
- CSB
Vbs
+
B

Complete MOS small-signal model

Homework

„ Book: Design of Analog CMOS IC – Razavi

„ Chapter 2:
‰ 1, 4, 5, 7, 13, 16, 20, 24
‰ Due: 18/9 – 7h30