High Speed Transistor Optocouplers - HP2530

EN - For pricing and availability in your local country please visit one of the below links:
DE - Informationen zu Preisen und Verfügbarkeit in Ihrem Land erhalten Sie über die unten aufgeführten Links:
FR - Pour connaître les tarifs et la disponibilité dans votre pays, cliquez sur l'un des liens suivants:
HCPL2531.S HCPL-2503
EN DE FR
This Datasheet is presented by Dieses Datenblatt wird vom Cette fiche technique est
the manufacturer Hersteller bereitgestellt présentée par le fabricant
Single-channel: 6N135, 6N136 , HCPL-2503, HCPL-4502 Dual-Channel: HCPL-2530, HCPL-2531 High Speed Transistor Optocouplers
July 2005
Single-channel: 6N135, 6N136, HCPL-2503, HCPL-4502

Dual-Channel: HCPL-2530, HCPL-2531
High Speed Transistor Optocouplers
Features Description
■ High speed-1 MBit/s The HCPL-4502/HCPL-2503, 6N135/6 and HCPL-2530/HCPL-
■ Superior CMR-10 kV/µs 2531 optocouplers consist of an AlGaAs LED optically coupled
to a high speed photodetector transistor.
■ Dual-Channel HCPL-2530/HCPL-2531
■ Double working voltage-480V RMS A separate connection for the bias of the photodiode improves
■ CTR guaranteed 0-70°C the speed by several orders of magnitude over conventional
phototransistor optocouplers by reducing the base-collector
■ U.L. recognized (File # E90700)
capacitance of the input transistor.
Applications An internal noise shield provides superior common mode rejec-

tion of 10kV/µs. An improved package allows superior insulation
■ Line receivers permitting a 480 V working voltage compared to industry stan-
■ Pulse transformer replacement dard of 220 V.
■ Output interface to CMOS-LSTTL-TTL
■ Wide bandwidth analog coupling
Package Schematic
N/C 1 8 VCC + 1 8 VCC
V
8 F1
_
+ 2 7 VB 2 7 V01
1 VF
_ _
3 6 VO 3 6 V02
VF2
N/C 4 5 GND + 4 5 GND
8
8
1 6N135, 6N136, HCPL-2503, HCPL-4502 HCPL-2530/HCPL-2531
1
Pin 7 is not connected in
Part Number HCPL-4502
©2005 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com

Single-channel: 6N135, 6N136 , HCPL-2503, HCPL-4502 Dual-Channel: HCPL-2530, HCPL-2531 Rev. 1.0.3
Absolute Maximum Ratings (TA = 25°C unless otherwise specified)
Parameter Symbol Value Units
Storage Temperature TSTG -55 to +125 °C
Operating Temperature TOPR -55 to +100 °C
Lead Solder Temperature TSOL 260 for 10 sec °C
EMITTER
DC/Average Forward Input Current Each Channel (Note 1) IF (avg) 25 mA
Peak Forward Input Current (50% duty cycle, 1 ms P.W.) IF (pk) 50 mA
Each Channel (Note 2)
Peak Transient Input Current - (≤1 µs P.W., 300 pps) IF (trans) 1.0 A
Each Channel
Reverse Input Voltage Each Channel VR 5 V
Input Power Dissipation (6N135/6N136 and HCPL-2503/4502) PD 100 mW
(HCPL-2530/2531 ) Each Channel (Note 3) 45
DETECTOR
Average Output Current Each Channel IO (avg) 8 mA
Peak Output Current Each Channel IO (pk) 16 mA
Emitter-Base Reverse Voltage (6N135, 6N136 and HCPL-2503 only) VEBR 5 V
Supply Voltage VCC -0.5 to 30 V
Output Voltage VO -0.5 to 20 V
Base Current (6N135, 6N136 and HCPL-2503 only) IB 5 mA
Output power (6N135, 6N136, HCPL-2503, HCPL-4502) (Note 4) PD 100 mW
dissipation (HCPL-2530, HCPL-2531) Each Channel 35 mW
2 www.fairchildsemi.com
Electrical Characteristics (TA = 0 to 70°C Unless otherwise specified)
Individual Component Characteristics
Parameter Test Conditions Symbol Device Min Typ** Max Unit
EMITTER (IF = 16 mA, TA =25°C) VF 1.45 1.7 V
Input Forward Voltage (IF = 16 mA) 1.8
Input Reverse Breakdown Voltage (IR = 10 µA) BVR 5.0 V
Temperature coefficient of (IF = 16 mA) (∆VF/∆TA) -1.6 mV/°C
forward voltage
DETECTOR
Logic high output current (IF = 0 mA, VO = VCC = 5.5 V) IOH All 0.001 0.5 µA
(TA =25°C)
(IF = 0 mA, VO = VCC = 15 V) 6N135 0.005 1
(TA =25°C) 6N136
HCPL-4502
HCPL-2503
(IF = 0 mA, VO = VCC = 15 V) All 50
Logic low supply current (IF = 16 mA, VO = Open) ICCL 6N135 120 200 µA
(VCC = 15 V) 6N136
HCPL-4502
HCPL-2503
(IF1 = IF2 = 16 mA, VO = Open) HCPL-2530 200 400
(VCC = 15 V) HCPL-2531
Logic high supply current (IF = 0 mA, VO = Open, VCC = 15 ICCH 6N135 1 µA
V) 6N136
(TA =25°C) HCPL-4502
HCPL-2503
(IF = 0 mA, VO = Open) 6N135 2
(VCC = 15 V) 6N136
HCPL-4502
HCPL-2503
(IF = 0 mA, VO = Open) HCPL-2530 0.02 4
(VCC = 15 V) HCPL-2531
** All Typicals at TA = 25°C
Transfer Characteristics (TA = 0 to 70°C Unless otherwise specified)
COUPLED (IF = 16 mA, VO = 0.4 V) CTR 6N135 7 18 50 %
(VCC = 4.5 V, TA =25°C) HCPL-2530
Current transfer ratio 6N136 19 27 50 %
(Note 5) HCPL-4502
HCPL-2531
HCPL-2503 12 27 %
(IF = 16 mA, VCC = 4.5 V) VOL=0.4V 6N135 5 21 %
VOL=0.5V HCPL-2530
VOL=0.4V 6N136 15 30 %
HCPL-4502
VOL=0.5V HCPL-2531
VOL=0.4V HCPL-2503 9 30 %
(IF = 16 mA, IO = 1.1 mA) VOL 6N135 0.18 0.4 V
Logic low output voltage (VCC = 4.5 V, TA =25°C) HCPL-2530 0.18 0.5
output voltage
(IF = 16 mA, IO = 3 mA) 6N136 0.25 0.4
(VCC = 4.5 V, TA =25°C) HCPL-2503
HCPL-2531 0.25 0.5
(IF = 16 mA, IO = 0.8 mA) 6N135 0.5
(VCC = 4.5 V) HCPL-2530
(IF = 16 mA, IO = 2.4 mA) HCPL-4502 0.5
(VCC = 4.5 V) HCPL-2531
Switching Characteristics (TA = 0 to 70°C unless otherwise specified., VCC = 5 V)
Propagation delay TA = 25°C, (RL = 4.1 kΩ, IF = 16 mA) (Note 6) (Fig. 7) 6N135 0.45 1.5 µs
time to logic low TPHL HCPL-2530
(RL = 1.9 kΩ, IF = 16 mA) (Note 7) (Fig. 7) 6N136 0.45 0.8 µs
TA = 25°C HCPL-4502
HCPL-2503
HCPL-2531
(RL = 4.1 kΩ, IF = 16 mA) (Note 6) (Fig. 7) 6N135 2.0 µs
HCPL-2530
HCPL-4502
HCPL-2503
HCPL-2531
Propagation delay TA = 25°C, (RL = 4.1 kΩ, IF = 16 mA) (Note 6) (Fig. 7) TPLH 6N135 0.5 1.5 µs
time to logic high HCPL-2530
(RL = 1.9 kΩ, IF = 16 mA) (Note 7) (Fig. 7) 6N136 0.3 0.8 µs
TA = 25°C HCPL-4502
HCPL-2503
HCPL-2531
HCPL-2530
HCPL-4502
HCPL-2503
HCPL-2531
Common mode (IF = 0 mA, VCM = 10 VP-P, RL = 4.1 kΩ) |CMH| 6N135 10,000 V/µs
transient (Note 8) (Fig. 8) TA = 25°C HCPL-2530
immunity at (IF = 0 mA, VCM = 10 VP-P) 6N136 10,000 V/µs
logic high TA = 25°C, (RL = 1.9 kΩ) HCPL-4502
(Note 8) (Fig. 8) HCPL-2503
HCPL-2531
Common mode (IF = 16 mA, VCM = 10 VP-P, RL = 4.1 kΩ) |CML| 6N135 10,000 V/µs
transient (Note 8) (Fig. 8) TA = 25°C HCPL-2530
immunity at (IF = 16 mA, VCM = 10 VP-P) 6N136 10,000 V/µs
logic low (RL = 1.9 kΩ) HCPL-4502
(Note 8) (Fig. 8) HCPL-2503
HCPL-2531
Isolation Characteristics (TA = 0 to 70°C Unless otherwise specified)
Characteristics Test Conditions Symbol Min Typ** Max Unit
Input-output (Relative humidity = 45%) II-O 1.0 µA
insulation leakage current (TA = 25°C, t = 5 s)
(VI-O = 3000 VDC)
(Note 9)
Withstand insulation test voltage (RH ≤ 50%, TA = 25°C) VISO 2500 VRMS
(Note 9) ( t = 1 min.)
Resistance (input to output) (Note 9) (VI-O = 500 VDC) RI-O 1012 Ω
Capacitance (input to output) (Note 9) (f = 1 MHz) CI-O 0.6 pF
DC Current gain (IO = 3 mA, VO = 5 V) HFE 150
Input-Input (RH ≤ 45%, VI-I = 500 VDC) (Note 10) II-I 0.005 µA
Insulation leakage current t = 5 s, (HCPL-2530/2531 only)
Input-Input Resistance (VI-I = 500 VDC) (Note 10) RI-I 1011 Ω
(HCPL-2530/2531 only)
Input-Input Capacitance (f = 1 MHz) (Note 10) CI-I 0.03 pF
(HCPL-2530/2531 only)
Notes
1. Derate linearly above 70°C free-air temperature at a rate of 0.8 mA/°C.
2. Derate linearly above 70°C free-air temperature at a rate of 1.6 mA/°C.
3. Derate linearly above 70°C free-air temperature at a rate of 0.9 mW/°C.
4. Derate linearly above 70°C free-air temperature at a rate of 2.0 mW/°C.
5. Current Transfer Ratio is defined as a ratio of output collector current, IO, to the forward LED input current, IF, times 100%.
6. The 4.1 kΩ load represents 1 LSTTL unit load of 0.36 mA and 6.1kΩ pull-up resistor.
7. The 1.9 kΩ load represents 1 TTL unit load of 1.6 mA and 5.6 kΩ pull-up resistor.
8. Common mode transient immunity in logic high level is the maximum tolerable (positive) dVcm/dt on the leading edge of the com-
mon mode pulse signal VCM, to assure that the output will remain in a logic high state (i.e., VO>2.0 V). Common mode transient
immunity in logic low level is the maximum tolerable (negative) dVcm/dt on the trailing edge of the common mode pulse signal,
VCM, to assure that the output will remain in a logic low state (i.e., VO<0.8 V).
9. Device is considered a two terminal device: Pins 1, 2, 3 and 4 are shorted together and Pins 5, 6, 7 and 8 are shorted together.
10. Measured between pins 1 and 2 shorted together, and pins 3 and 4 shorted together.
Fig. 1 Normalized CTR vs. Forward Current Fig. 2 Normalized CTR vs. Temperature
1.2 1.2
1.0 1.0
NORMALIZED CTR
NORMALIZED CTR
0.8 0.8
0.6 0.6
0.4 0.4
Normalized to: VO = 0.4 V Normalized to: IF = 16mA
IF = 16 mA VCC = 5 V TA = 25°C VCC = 5 V
0.2 TA = 25°C 0.2 VO = 0.4 V
0.0 0.0
0.1 1 10 100 -60 -40 -20 0 20 40 60 80 100
IF - FORWARD CURRENT (mA) TA - TEMPERATURE (°C)
Fig. 4 Logic High Output Current

Fig. 3 Output Current vs. Output Voltage vs. Temperature
16 1000
IOH - LOGIC HIGH OUTPUT CURRENT (nA)

TA = 25°C IF = 40 mA IF = 0 mA
14 VCC = 5 V VCC = 5 V
IF = 35 mA VO = 5 V
IO - OUTPUT CURRENT (mA)
12 100
IF = 30 mA
10 IF = 25 mA
8 IF = 20 mA 10
6 IF = 15 mA
4 IF = 10 mA 1
2 IF = 5 mA
0 0.1
0 2 4 6 8 10 12 14 16 18 20 -60 -40 -20 0 20 40 60 80 100
VO - OUTPUT VOLTAGE (V) TA - TEMPERATURE (°C)
Fig. 5 Propagation Delay vs. Temperature Fig. 6 Propagation Delay vs. Load Resistance
800 10000
700 RL = 4.1 K (TPLH)

TP - PROPAGATION DELAY (ns)
Tp - PROPAGATION DELAY (ns)
600 RL = 4.1 K (TPLH)

IF - 16 mA (TPHL)
500 IF - 10 mA (TPHL)
400 1000
300
IF - 16 mA (TPLH)
200
RL = 1.9 K (TPHL) RL = 1.9 K (TPLH) IF = 16 mA
100 VCC = 5 V VCC = 5 V
TA = 25°C
IF - 10 mA (TPLH)
0 100
-60 -40 -20 0 20 40 60 80 100 1 10
TA - TEMPERATURE (°C) RL = LOAD RESISTANCE (kΩ)
Noise Pulse Noise
VCC IF + Shield
Shield Generator VCC
1 8 +5 V tr = 5ns 1 8 +5 V
Pulse Z O = 50 Ω
Generator I RL
F + VB VF1
tr = 5ns - V01
Z O = 50 Ω 2 7 RL 10% DUTY CYCLE 2 7 VO
I/f < 100µS
10% D.C. VF C L = 1.5 µF
I/f < 100µs - VO - V02
3 6 VO 3 6
IF
0.1 µF VF2
I F Monitor
MONITOR + 0.1 µF
GND
4 5 Rm 4 5
Rm GND C L = 1.5 µF
Test Circuit for 6N135, 6N136, HCPL-2503 and HCPL- 4502 Test Circuit for HCPL-2530 and HCPL-2531
IF
0
VO 5V
1.5 V 1.5 V
VOL
TPHL TPLH
Fig. 7 Switching Time Test Circuit
IF Noise Noise
Shield VCC + Shield VCC
1 8 +5 V 1 8 +5 V
IF
RL
+ VB VF1
RL - V01
2 7 2 7 VO
VF A
A - VO V02
B - 0.1 µF
B 3 6 VO 3 6
VFF
VFF 0.1 µF VF2
+
GND GND
4 5 - 4 5
VCM
+ -
VCM
Pulse Gen + -
Pulse Gen
Test Circuit for 6N135, 6N136, HCPL-2503 and HCPL-4502 Test Circuit for HCPL-2530 and HCPL-2531
VCM 10 V
90% 90%
10% 10%
0V
tr tf
VO
5V
Switch at A : IF = 0 mA
VO
VOL
Switch at A : IF = 16 mA
Fig. 8 Common Mode Immunity Test Circuit
Package Dimensions (Through Hole) Package Dimensions (Surface Mount)
0.390 (9.91)
0.370 (9.40)
PIN 1 PIN 1
ID. 4 3 2 1 ID.
4 3 2 1
0.270 (6.86)
0.250 (6.35) 0.270 (6.86)
0.250 (6.35)
5 6 7 8
5 6 7 8
0.390 (9.91)
0.370 (9.40)
SEATING PLANE
0.070 (1.78) 0.300 (7.62)

0.070 (1.78) TYP
0.045 (1.14)
0.045 (1.14)
0.200 (5.08) 0.020 (0.51) MIN 0.020 (0.51) 0.016 (0.41)

0.140 (3.55) MIN 0.008 (0.20)
0.154 (3.90)
0.120 (3.05) 0.045 [1.14]
0.022 (0.56)
0.022 (0.56) 15° MAX 0.016 (0.41)
0.016 (0.40) 0.315 (8.00)
0.016 (0.41)
0.008 (0.20) 0.100 (2.54) MIN
0.300 (7.62)
0.100 (2.54) TYP TYP
TYP 0.405 (10.30)
Lead Coplanarity : 0.004 (0.10) MAX MIN
Package Dimensions (0.4"Lead Spacing) Recommended Pad Layout for

Surface Mount Leadform
PIN 1
4 3 2 1
ID.
0.070 (1.78)
0.270 (6.86)
0.250 (6.35)
0.060 (1.52)
5 6 7 8
0.390 (9.91)
0.370 (9.40)
0.100 (2.54)
SEATING PLANE
0.070 (1.78) 0.295 (7.49)

0.045 (1.14) 0.030 (0.76)
0.415 (10.54)
0.200 (5.08) 0.004 (0.10) MIN
0.140 (3.55)
0.154 (3.90)
0.120 (3.05)
0.022 (0.56) 0° to 15°
0.016 (0.40)
0.016 (0.41)
0.008 (0.20)
0.400 (10.16)
0.100 (2.54) TYP
TYP
NOTE
All dimensions are in inches (millimeters)
Ordering Information
Option Example Part Number Description
S 6N135S Surface Mount Lead Bend
SD 6N135SD Surface Mount; Tape and reel
W 6N135W 0.4" Lead Spacing
V 6N135V VDE0884
TV 6N135TV VDE0884; 0.4” lead spacing
SV 6N135SV VDE0884; surface mount
SDV 6N135SDV VDE0884; surface mount; tape and reel
Marking Information
2503 2
6
V XX YY T1
3 4 5
Definitions
1 Fairchild logo
2 Device number
3 VDE mark (Note: Only appears on parts ordered with VDE option –
See order entry table)
4 Two digit year code, e.g., ‘03’
5 Two digit work week ranging from ‘01’ to ‘53’
6 Assembly package code
Carrier Tape Specifications
12.0 ±0.1
4.0 ±0.1
4.90 ±0.20 Ø1.55 ±0.05
4.0 ±0.1
0.30 ±0.05
1.75 ±0.10
7.5 ±0.1
16.0 ±0.3
13.2 ±0.2
10.30 ±0.20
0.1 MAX 10.30 ±0.20 Ø1.6 ±0.1
User Direction of Feed
Reflow Profile
300
215 C, 10–30 s
250
Temperature (°C)
225 C peak
200
150
100 Time above 183C, 60–150 sec
50 Ramp up = 3C/sec
0
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5
Time (Minute)
• Peak reflow temperature: 225C (package surface temperature)

• Time of temperature higher than 183C for 60–150 seconds
• One time soldering reflow is recommended
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is
not intended to be an exhaustive list of all such trademarks.
ACEx™ FAST ISOPLANAR™ PowerSaver™ SuperSOT™-8
ActiveArray™ FASTr™ LittleFET™ PowerTrench SyncFET™
Bottomless™ FPS™ MICROCOUPLER™ QFET TinyLogic
Build it Now™ FRFET™ MicroFET™ QS™ TINYOPTO™
CoolFET™ GlobalOptoisolator™ MicroPak™ QT Optoelectronics™ TruTranslation™
CROSSVOLT™ GTO™ MICROWIRE™ Quiet Series™ UHC™
DOME™ HiSeC™ MSX™ RapidConfigure™ UltraFET
EcoSPARK™ I2C™ MSXPro™ RapidConnect™ UniFET™
E2CMOS™ i-Lo™ OCX™ µSerDes™ VCX™
EnSigna™ ImpliedDisconnect™ OCXPro™ SILENT SWITCHER Wire™
FACT™ IntelliMAX™ OPTOLOGIC SMART START™
FACT Quiet Series™ OPTOPLANAR™ SPM™
PACMAN™ Stealth™
Across the board. Around the world.™
POP™ SuperFET™
The Power Franchise
Power247™ SuperSOT™-3
Programmable Active Droop™
PowerEdge™ SuperSOT™-6
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY
ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT
CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.
As used herein:
1. Life support devices or systems are devices or 2. A critical component is any component of a life
systems which, (a) are intended for surgical implant into support device or system whose failure to perform can
the body, or (b) support or sustain life, or (c) whose be reasonably expected to cause the failure of the life
failure to perform when properly used in accordance support device or system, or to affect its safety or
with instructions for use provided in the labeling, can be effectiveness.
reasonably expected to result in significant injury to the
user.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or This datasheet contains the design specifications for
In Design product development. Specifications may change in
any manner without notice.
Preliminary First Production This datasheet contains preliminary data, and

supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a product

that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
Rev. I16
EN - For pricing and availability in your local country please visit one of the below links:
DE - Informationen zu Preisen und Verfügbarkeit in Ihrem Land erhalten Sie über die unten aufgeführten Links:
FR - Pour connaître les tarifs et la disponibilité dans votre pays, cliquez sur l'un des liens suivants:
HCPL2531.S HCPL-2503
EN DE FR
This Datasheet is presented by Dieses Datenblatt wird vom Cette fiche technique est
the manufacturer Hersteller bereitgestellt présentée par le fabricant
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Available Formats

High Speed Transistor Optocouplers - HP2530

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Copyright:

Available Formats

EN - For pricing and availability in your local country please visit one of the below links:

Single-channel: 6N135, 6N136, HCPL-2503, HCPL-4502

Applications An internal noise shield provides superior common mode rejec-

N/C 1 8 VCC + 1 8 VCC

N/C 4 5 GND + 4 5 GND

©2005 Fairchild Semiconductor Corporation 1 www.fairchildsemi.com

** All Typicals at TA = 25°C

** All Typicals at TA = 25°C

** All Typicals at TA = 25°C

IF - FORWARD CURRENT (mA) TA - TEMPERATURE (°C)

Fig. 4 Logic High Output Current

IOH - LOGIC HIGH OUTPUT CURRENT (nA)

VO - OUTPUT VOLTAGE (V) TA - TEMPERATURE (°C)

700 RL = 4.1 K (TPLH)

600 RL = 4.1 K (TPLH)

Fig. 7 Switching Time Test Circuit

Fig. 8 Common Mode Immunity Test Circuit

0.070 (1.78) 0.300 (7.62)

0.200 (5.08) 0.020 (0.51) MIN 0.020 (0.51) 0.016 (0.41)

Package Dimensions (0.4"Lead Spacing) Recommended Pad Layout for

0.070 (1.78) 0.295 (7.49)

0.1 MAX 10.30 ±0.20 Ø1.6 ±0.1

User Direction of Feed

100 Time above 183C, 60–150 sec

• Peak reflow temperature: 225C (package surface temperature)

LIFE SUPPORT POLICY

Datasheet Identification Product Status Definition

Preliminary First Production This datasheet contains preliminary data, and

Obsolete Not In Production This datasheet contains specifications on a product

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