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Rev. 3
September 2004 1/10
NEW DATASHEET ACCORDING TO PCN DSG-TRA/04/532
STD5N20L
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STD5N20L
Table 6: Dynamic
Symbol Parameter Test Conditions Min. Typ. Max. Unit
gfs (2) Forward Transconductance VDS = 15 V, ID = 5 A 6.5 S
Ciss Input Capacitance VDS = 25V, f = 1 MHz, VGS = 0 242 pF
Coss Output Capacitance 44 pF
Crss Reverse Transfer 6 pF
Capacitance
td(on) Turn-on Delay Time VDD = 100 V, ID = 2.5 A 11.5 ns
tr Rise Time RG = 4.7Ω, VGS = 5V 21.5 ns
td(off) Turn-off Delay Time (Resistive Load see Figure 14) 14 ns
tf Fall Time 15.5 ns
Qg Total Gate Charge VDD = 160 V, ID = 5 A, 5 6 nC
Qgs Gate-Source Charge VGS = 5V 1.5 nC
Qgd Gate-Drain Charge 3 nC
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Figure 10: Normalized Gate Thereshold Volt- Figure 13: Normalized On Resistance vs Tem-
age vs Temperature perature
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Figure 14: Switching Times Test Circuit For Figure 16: Gate Charge Test Circuit
Resistive Load
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mm inch
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
L2 0.8 0.031
P032P_B
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All dimensions
All dimensions are in millimeters are in millimeters
* on sales type
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Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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