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September 2014
2N7002K
N-Channel Enhancement Mode Field Effect Transistor
Features
• Low On-Resistance
• Low Gate Threshold Voltage
• Low Input Capacitance
• Fast Switching Speed
• Low Input / Output Leakage
• Ultra-Small Surface Mount Package
• Pb Free / RoHS Compliant
• ESD HBM = 2000 V (Typical: 3000 V) as per JESD22 A114
and ESD CDM = 2000 V as per JESD22 C101
D
D
G
SOT-23
Marking: 7K G S
Ordering Information
Part Number Top Mark Package Packing Method
2N7002K 7K SOT-23 3L Tape and Reel
Note:
1. Device mounted on FR-4 PCB, 1 inch x 0.85 inch x 0.062 inch. Minimum land pad size.
Electrical Characteristics
Values are at TA = 25°C unless otherwise noted.
Note:
2. Short duration test pulse used to minimize self-heating effect.
2.0 3.0
VGS = 3V
ID. DRAIN-SOURCE CURRENT(A)
VGS = 10V
DRANI-SOURCE ON-RESISTANCE
4V
2.5
1.5
5V
4.5V
RDS(on), (Ω)
5V
2.0 6V
4V 7V
1.0
1.5
3V
0.5
1.0 10V
9V
2V 8V
0.0 0.5
0 2 4 6 8 10 0.0 0.2 0.4 0.6 0.8 1.0
VDS. DRAIN-SOURCE VOLTAGE (V) ID. DRAIN-SOURCE CURRENT(A)
3.0
VDS = 10V
ID = 500 mA
DRANI-SOURCE ON-RESISTANCE
2.5
RDS(on) (Ω)
2.0
1.5
1.0
0.5
-50 0 50 100 150
o
TJ. JUNCTION TEMPERATURE( C)
1.0 2.0
Vth, Gate-Source Threshold Voltage (V)
VDS = 10V
ID. DRAIN-SOURCE CURRENT(A)
25( C)
o
VDS = VGS
0.8 1.8
o
TJ = -25( C)
ID = 1 mA
o
150( C)
0.6 1.6
ID = 0.25 mA
o
125( C)
0.4 1.4
o
75( C)
0.2 1.2
0.0 1.0
2 3 4 5 6 -50 0 50 100 150
o
VGS. GATE-SOURCE VOLTAGE (V) TJ. JUNCTION TEMPERATURE( C)
VGS = 0 V
100
o
TA=150 C
o
10 25 C 500mA
280mA
115mA
o
-55 C
1
0.0 0.2 0.4 0.6 0.8 1.0
Figure 7. Reverse Drain Current Variation with Diode Figure 8. Gate Charge Characteristics
Forward Voltage and Temperature
0.5 100 μs
ID, DRAIN CURRENT (A)
RDS(ON) LIMIT
1ms
0.05
SINGLE PULSE
RθJA = 350oC/W 10ms
TA = 25oC
100ms
1s
10s
DC
0.005
0.01 0.1 1 10 100 200
VDS, DRAIN-SOURCE VOLTAGE (V)
2.92±0.20 0.95
3
1.40
1.30+0.20
-0.15 2.20
1 2
(0.29) 0.60
0.95 0.37
0.20 A B 1.00
1.90 1.90
LAND PATTERN
RECOMMENDATION
(0.93) 0.10
0.00
0.10 C
C 2.40±0.30
SCALE: 2X
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THEREIN, WHICH COVERS THESE PRODUCTS.
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