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Chapter 1

Operational Amplifiers (OpAmps)

1.1 Introduction [1]


An opamp is an electronic unit that behaves like a voltage-controlled
voltage source.An opamp may also regarded as a voltage amplifier with very high
gain. An opamp is an integrated circuit (IC) that amplifies the difference between
two input voltages and produces a single output. An op amp can sum signals,
amplify a signal, integrate it, or differentiate it. The ability of the op amp to
perform these mathematical operations is the reason it is called an operational
amplifier. It is also the reason for the widespread use of op amps in analog design.

The op amp is an electronic device consisting of a complex arrangement


of resistors, transistors, capacitors, and diodes. Op amps are commercially
available in integrated circuit packages in several forms. Figure 1.1 shows a typical
op amp package. A typical one is the eight-pin dual in-line package (or DIP),
shown in Fig. 1.2(a). Pin or terminal 8 is unused, and terminals 1 and 5 are of little
concern to this course. The five important terminals are:

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1. The inverting input, pin 2.

2. The noninverting input, pin 3.

3. The output, pin 6.

4. The positive power supply V +, pin 7.

5. The negative power supply V , pin 4.

The circuit symbol for the op amp is the triangle in Fig. 1.2(b); as shown,
the op amp has two inputs and one output. The inputs are marked with minus ()
and plus (+) to specify inverting and noninverting inputs, respectively. An input
applied to the noninverting terminal will appear with the same polarity at the
output, while an input applied to the inverting terminal will appear inverted at the
output.

Figure 1.1 A typical operational amplifier. [1]

Figure 1.2 A typical op amp: (a) pin configuration, (b) circuit symbol. [1]

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As an active element, the op amp must be powered by a voltage supply as
shown in Fig. 1.3. By KCL,

𝑖𝑜 = 𝑖1 + 𝑖2 + 𝑖+ + 𝑖 (1.1)

Figure 1.3 Powering the op amp. [1]

1.2 OpAmp Equivalent Circuit [1]


The equivalent circuit model of an op amp is shown in Fig. 1.4. The
output section consists of a voltage-controlled source in series with the output
resistance Ro. It is evident from Fig. 1.3 that the input resistance Ri is the Thevenin
equivalent resistance seen at the input terminals, while the output resistance Ro is
the Thevenin equivalent resistance seen at the output. The differential input voltage
𝑣𝑑 is given by

𝑣𝑑 = 𝑣2 − 𝑣1 (1.2)
where 𝑣1 is the voltage between the inverting terminal and ground and 𝑣2 is the
voltage between the noninverting terminal and ground.

The op amp senses the difference between the two inputs, multiplies it by
the gain A, and causes the resulting voltage to appear at the output. Thus, the
output 𝑣𝑜 is given by

𝑣𝑜 = 𝐴𝑜𝑑 (𝑣2 − 𝑣1 ) (1.3)

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A is called the open-loop voltage gain because it is the gain of the opamp
without any external feedback from output to input.

Figure 1.4 The equivalent circuit of the nonideal op amp. [1]

Table 1.1 shows typical values of voltage gain A, input resistance Ri,
output resistance Ro, and supply voltage VCC.

Table 1.1 Typical ranges for op amp parameters. [1]

A practical limitation of the op amp is that the magnitude of its output


voltage cannot exceed |VCC|. In other words, the output voltage is dependent on and
is limited by the power supply voltage. Figure 1.4 illustrates that the opamp can
operate in three modes, depending on the differential input voltage vd:

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1. Positive saturation, 𝑣𝑜 = 𝑉𝑐𝑐 .
2. Linear region, −𝑉𝑐𝑐 ≤ 𝑣𝑜 = A𝑉𝑑 ≤ 𝑉𝑐𝑐 .
3. Negative saturation, 𝑣𝑜 = −𝑉𝑐𝑐 .

Figure 1.5 Opamp output voltage vo as a function of the input voltage vd. [1]

If we attempt to increase vd beyond the linear range, the op amp becomes


saturated and yields 𝑣𝑜 = 𝑉𝑐𝑐 or 𝑣𝑜 = −𝑉𝑐𝑐 . Here, we will assume that our op amps
operate in the linear mode. This means that the output voltage is restricted by

−𝑉𝑐𝑐 ≤ 𝑣𝑜 ≤ 𝑉𝑐𝑐 (1.4)

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Example 1: A 741 op amp has an open-loop voltage gain of 2×105, input
resistance of 2 MΩ, and output resistance of 50 Ω. The op amp is used in the
circuit of the figure below. Find the closed-loop gain V0/VS. Determine current i
when VS = 2 V.

Figure 1.6 For Example 1 [1]

Solution: From the question, we obtain the equivalent circuit shown in Figure 1.6.

Figure 1.7 For Example 1 [1]

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At node 1, KCL gives

VS  V1 V1 V1  V0
 
10  103 2000  103 20  103
2V  V0
or V1  S
3
At node 0,

V1  V0 V0  AVd

20  103 50
But Vd  V1 and A  200,000
Then V1  V0  400(V0  200,000V1 )

V0
We obtain  1.9999699
VS

When VS = 2 V, V0 = 3.9999398 V, and then we obtain V1 = 20.066667 µV

Thus, V1  V0
i  0.1999 mA
20 103

Practice problem 1: If the same 741 op amp is used in the circuit of this figure,
calculate the closed-loop gain Vo/Vs. Find i0 when Vs = 1 V.

Answer: 9.00041, 0.657 mA.

Figure 1.8 For Problem 1 [1]

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1.3 Ideal OpAmp [1]
Opamp is ideal if it has the following characteristics:

 Infinite open-loop gain, Aod  ∞.


 Infinite input resistance, Ri  ∞.
 Zero output resistance, Ro  0.

For circuit analysis, the ideal op amp is illustrated in Fig. 1.9. Two
important characteristics of the ideal op amp are:

1. The currents into both input terminals are zero:

𝑖1 = 𝑖2 = 0 (1.5)
2. The voltage across the input terminals is negligibly small; i.e.,

vd  v2  v1  0 or v1  v2 (1.6)

Example 2: Rework Practice Prob. 5.1 using the ideal op amp model.

Figure 1.9 For Example 2 [1]

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Solution: We may replace the op amp in Fig. 1.8 by its equivalent model in Fig.
1.9 as we did in problem 1. We just need to keep Eqs. (1.5) and (1.6) in mind as we
analyze the circuit in Fig. 1.9. Notice that

𝑣2 = 𝑣s

Since 𝑖1 = 0, the 40-kΩ and 5-kΩ resistors are in series; the same current
flows through them. v1 is the voltage across the 5-kΩ resistor.

Hence, using the voltage division principle,


5 𝑣0
𝑣1 = 5+40 𝑣0 = 9

According to Eq. (1.6),

𝑣2 = 𝑣1
𝑣0 𝑣0
Therefore, 𝑣𝑠 =  =9
9 𝑣s

which is very close to the value of 9.00041 obtained with the nonideal model in
Practice Prob. 1. This shows that negligibly small error results from assuming ideal
op amp characteristics.

At node O,
0 𝑣 𝑣
𝑖0 = 5+40 + 200 mA

when vs = 1 V, vo = 9 V. Substituting for vo = 9 V produces

𝑖0 = 0.2 + 0.45 = 0.65 mA

This, again, is close to the value of 0.657 mA obtained in Practice Prob. 1 with the
nonideal model.

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1.4 Inverting Amplifiers [1]
In this and the following sections, we consider some useful op amp
circuits that often serve as modules for designing more complex circuits. The first
of such op amp circuits is the inverting amplifier shown in Fig. 1.10. In this circuit,
the noninverting input is grounded, vi is connected to the inverting input through
R1, and the feedback resistor Rf is connected between the inverting input and
output. Our goal is to obtain the relationship between the input voltage vi and the
output voltage vo.

Figure 1.10 The inverting amplifier. [1]

Applying KCL at node 1,

(1.7)
But v1 = v2 = 0 for an ideal op amp, since the noninverting terminal is
grounded. Hence,

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or

(1.8)
𝑣0 𝑅
The voltage gain is 𝐴𝑣 (closed − loop gain) = = − f. The designation
𝑣i 𝑅i
of the circuit in Fig. 1.10 as an inverter arises from the negative sign. Thus, an
inverting amplifier reverses the polarity of the input signal while amplifying it.

Example 3: Consider the op amp in Fig. 1.11. If vi = 0.5 V, calculate: (a) the
output voltage vo, and (b) the current in the 10-kΩ resistor.

Figure 1.11 For Example 3 [1]


Solution:

(a) Using Eq. (1.8),

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(b) The current through the 10-kΩ resistor is

Practice problem 2: Find the output of the op amp circuit shown in Fig. 1.12.
Calculate the current through the feedback resistor.

Figure 1.12 For practice problem 2. [1]

Answer: 1.2 V, 10 A.

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1.5 Summing Amplifiers [1]
Besides amplification, the op amp can perform addition and subtraction.
The addition is performed by the summing amplifier covered in this section. A
summing amplifier is an op amp circuit that combines several inputs and
produces an output that is the weighted sum of the inputs.

Figure 1.13 The summing amplifier. [1]

The summing amplifier, shown in Fig. 1.13, is a variation of the inverting


amplifier. It takes advantage of the fact that the inverting configuration can handle
many inputs at the same time. Here, the current entering each op amp input is zero.
Applying KCL at node a gives,

(1.9)
But

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(1.10)
We note that va = 0 and substitute Eq. (1.10) into Eq. (1.9). We get

(1.11)
indicating that the output voltage is a weighted sum of the inputs. For this
reason, the circuit in Fig. 1.13 is called a summer.

Example 4: Calculate vo and io in the op amp circuit in Fig. 1.14.

Figure 1.14 For Example 4 [1]

Solution:

Using Eq. (1.11),

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The current io is the sum of the currents through the 10-kΩ and 2-kΩ
resistors. Both resistors have voltage vo = −8 V across them, since va = vb = 0.
Hence,

Practice problem 3: Find vo and io in the op amp circuit shown in Fig. 1.15.

Figure 1.15 For Practice problem 3 [1]

Answer: −3.8 V, −1.425 mA.

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1.6 Non-Inverting Amplifiers [1]

Figure 1.16 The noninverting amplifier. [1]

Another important application of the op amp is the noninverting amplifier


shown in Fig. 1.16. In this case, the input voltage vi is applied directly at the
noninverting input terminal, and resistor R1 is connected between the ground and
the inverting terminal. We are interested in the output voltage and the voltage gain.
Application of KCL at the inverting terminal gives

(1.12)
But v1 = v2 = vi. Equation (1.12) becomes

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Or

(1.13)
The voltage gain is Av = vo/vi = 1+ Rf / R1, which does not have a negative sign.
Thus, the output has the same polarity as the input. Therefore, a noninverting
amplifier is an op amp circuit designed to provide a positive voltage gain.

Notice that if feedback resistor Rf = 0 (short circuit) or R1 =  (open


circuit) or both, the gain becomes 1. Under these conditions (Rf = 0 and R1 = ),
the circuit in Fig. 1.16 becomes that shown in Fig. 1.17, which is called a voltage
follower (or unity gain amplifier) because the output follows the input. Thus, for a
voltage follower

𝑣𝑂 = 𝑣i (1.14)

Figure 1.17 The voltage follower. [1]

Such a circuit has a very high input impedance and is therefore useful as
an intermediate-stage (or buffer) amplifier to isolate one circuit from another, as
shown in Fig. 1.18. The voltage follower minimizes interaction between the two
stages and eliminates interstage loading.

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Figure 1.18 A voltage follower used to isolate two cascaded stages of a circuit. [1]

Example 5: Calculate vo in the op amp circuit in Fig. 1.19.

Figure 1.19 For Example 5 [1]


Solution:

Using Eq. (1.13),

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Practice problem 4: Calculate vo in the circuit of Fig. 1.20.

Figure 1.20 For Practice problem 4 [1]

Answer: 7 V

1.7 Difference Amplifier [1]


Difference (or differential) amplifiers are used in various applications
where there is need to amplify the difference between two input signals.

Consider the op amp circuit shown in Fig. 1.21. Keep in mind that zero
currents enter the op amp terminals. Applying KCL to node a,

or

(1.15)

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Figure 1.21 Difference amplifier. [1]
Applying KCL to node b,

or

(1.16)
But va = vb. Substituting Eq. (1.16) into Eq. (1.15) yields

Or

(1.17)

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Since a difference amplifier must reject a signal common to the two
inputs, the amplifier must have the property that vo = 0 when v1 = v2. This property
exists when

(1.18)
Thus, when the op amp circuit is a difference amplifier, Eq. (1.17) becomes

(1.19)
If R2 = R1 and R3 = R4, the difference amplifier becomes a subtractor, with the
output

(1.20)

Example 6: Design an op amp circuit with inputs v1 and v2 such that

vo = –5v1 + 3v2.

Solution:

If we desire to use only one op amp, we can use the op amp circuit of Fig. 1.21.
Comparing this requirement with Eq. (1.17), we see

Also,

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or

>> If we choose R1 = 10 kΩ and R3 = 20 kΩ, then R2 = 50 k Ω and R4 = 20 k Ω.

1.8 Cascaded Op Amp Circuits [1]


It is often necessary in practical applications to connect op amp circuits in
cascade (i.e., head to tail) to achieve a large overall gain. In general, two circuits
are cascaded when they are connected in tandem, one behind another in a single
file. Therefore, a cascade connection is a head-to-tail arrangement of two or
more op amp circuits such that the output of one is the input of the next.

Figure 1.22 A three-stage cascaded connection. [1]

When op amp circuits are cascaded, each circuit in the string is called a
stage; the original input signal is increased by the gain of the individual stage.
Figure 1.22 displays a block diagram representation of three op amp circuits in
cascade. Since the output of one stage is the input to the next stage, the overall gain
of the cascade connection is the product of the gains of the individual op amp
circuits, or

𝐴 = 𝐴1 × 𝐴2 × 𝐴3 (1.21)

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Example 7: Find vo and io in the circuit in Fig. 1.23.

Figure 1.23 For Example 7 [1]

Solution:

This circuit consists of two noninverting amplifiers cascaded. At the output of the
first op amp,

At the output of the second op amp,

The current io is the current through the 10-k resistor.

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But, 𝑣a = 𝑣b = 100 mV , therefore

Practice problem 5: Determine vo and io in the circuit in Fig. 1.24.

Figure 1.24 For Practice problem 5 [1]


Answer: 24 V, 2 mA.

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1.9 Homework 1
1. Find IX, IY, and VOUT/VIN in this circuit.

Figure 1.25 For Prob. 1

2. (a) Show that the output voltage VOUT of the circuit is

R 3  R 4 
VOUT  R 2 V1  R 1V2 
R 3 R 1  R 2 

(b) If V1 = 5 V, V2 = 10 V and R1 = R2 = R3 = R4 = 1 k, Find IX

Figure 1.26 For Prob. 2


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3. Obtain IX and IY in the Op-amp circuit, using the ideal op-amp model.

Figure 1.27 For Prob. 3

4. Calculate ix and v0 in the circuit. Find the power dissipated by the 60 k.

Figure 1.28 For Prob. 4 [1]

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5. Use the ideal op-amp model to find IO, I12, VX and VO.

Figure 1.29 For Prob. 5

6. Use the ideal op-amp model, determine I20, I5, IO and VO in the circuit.

Figure 1.30 For Prob. 6

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7. For the circuit in Figure 1.31, use the ideal op-amp model to find IX, VA and VO.

Figure 1.31 For Prob. 7

8. Use the ideal op-amp model, determine IX, IY, IZ and VO in the circuit shown in
Figure 1.32.

Figure 1.32 For Prob. 8

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9. For the circuit in Figure 1.33, use the ideal op-amp model to find IX, IY and VO.

Figure 1.33 For Prob. 9

10. Use the ideal op-amp model, determine IX, IY and VO in the circuit.

Figure 1.34 For Prob. 10


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