… and the BT LOC Team

May 31st, 2016

31.05.2016 eiCAB keynote

The Company Overview
 High vertical integration: HW and SW Development, Production.
 Right now some 50+ employees, thereof 24 developers, and growing.
 Various kinds of products, from heating controls to door control units and
fire detection devices to communication gateways.
 Current focus: the eiCAB touchscreen HMI.
 A&R TECH: 25 years of Railway Experience + Google-like startup culture.

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The Company The Team

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The Company The Equipment
 Modern production facility:
 2 SiPlace SMT machines as backbone of production.
 2 vapor phase ovens, 2 AOIs, SPP + SPI.
 0.5μm microfocus x-ray.
 3 climate chambers for burn-in.
 HALT test equipment, IR-camera, EMC equipment.

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The Company Our Customers

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The Company Railway Market
1.800
1.600
1.400
1.200
1.000
800
600
400
200
0
2009 2010 2011 2012 2013 2014 2015

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The Company The Partner
A&R TECH and STW partnership opens new perspective:
 We provide and focus on eiCAB technology (HMI, Platform, DevKit).
 STW contributes oh-specific know how.
 STW does marketing, sales, 1st and 2nd level customer support.
Introducing STW:
 Has some 500 employees in Germany (450), UK (30) and the US (20).
 Is a family-owned business with a company culture very similar to ours.
 Delivers various components: sensors, I/Os, ECUs, telematics.
 Can now provide an HMI and thus becomes a solution provider.

31.05.2016 eiCAB keynote

The Company The Partner
Virtually increased development team size:
 Future development efforts will be closely coordinated.
 STW likely to use the eiCAB platform in all future products.
 A&R TECH will use STW‘s connectivity technology.
Production partnership adds safety net:
 STW currently manufactures some 140.000 units a year.
 STW has almost identical manufacturing equipment.
 eiCABs will be manufactured in Vienna.
 Critical components will be backup-stored in Kaufbeuren.
 One batch a year will be manufactured in Kaufbeuren.
 In case of Force Majeure or capacity problems, STW will jump in.
31.05.2016 eiCAB keynote
The Company The Partner
Off Highway Launch starts promising:
 Official press release and official launch at Agritechnica in November 2015.
 One customer was informed beforehands and signed already: Magirus.
 20 prototypes ordered by interested customers, 4 close to signing.

31.05.2016 eiCAB keynote

The Company The Future
Scaling Up: We have largely eliminated barriers to growth:
 Processes set up, new production planning SW introduced.
 Scalable Production Infrastructure:
 SMT was capacity scaling barrier, removed in 2013:
Scalable to 40.000 HMIs/year with our current machines.
 In-depth testing was scaling barrier: removed with fully automated LTT.
 Climate Chambers and Final Assembly easily scalable, no barrier to growth.
 Scalable Development Team:
 Core team established, support teams easier to implement.
 Hiring quite easy today as compared to a couple of years back.
 Established ticket system. Highly automated release system.
 We grow where we are planted and focus on our core technology.

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A&R TECH and their technology

Enough said. Let‘s focus on the technology now!

31.05.2016 eiCAB keynote

Part II The Technology

The Visualisation Portfolio is made up of three pieces:

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The Technology The HMI

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The HMI Family and Screen Sizes
HMI-C and HMI-X: Two devices, one family.
 Common processor architecture for HMI-C and HMI-X.
 HMI-C: eiCAB4G based, DualCore.
 HMI-X: eiCAB4G based, QuadCore, Realtime DualCore.
 High quality 1000cd/m² LED TFTs.
 Various interfaces depending on device version.
 Same mechanics, software binary compatible.
 8 screen sizes from 7“ to 15“, obsolesence managed.
 Robust GFG touch screen, UIC612, PCAP option.

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The HMI Family and Screen Sizes

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The HMI The Architecture
Scalability starts at the very core: Our Architecture.
 Xilinx Zynq: processor and FPGA in one chip.
 Allows for scalability from 2 to 17 processing cores.
 Allows for hardware acceleration (e.g. Multimedia).
 Allows for hardware separation (e.g. Safety).
 Allows for extensibility (option cards).
 Option cards include:
 I/O: I/O-Sub, I/O-Box-Sub.
 Connectivity: CAN, Ethernet, MVB ESD+, MVB EMD.
 Specials: APL, NAND, USB Device, ThinClientSub, BRTC.

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The HMI The Architecture
Processing System
I/O Application Processor Unit
Peripherals Clock SWDT
Reset FPU and NEON Engine FPU and NEON Engine
Generation
USB TTC ARM Cortex-A9 ARM Cortex-A9
MMU MMU
System CPU CPU
USB 2x USB Level
GigE 2x GigE Control 32 KB 32 KB 32 KB 32 KB
GigE 2x SD Regs I-Cache D-Cache I-Cache D-Cache
SD
IRQ GIC Snoop Controller, AWDT, Timer
SDIO
SD 512 KB L2 Cache & Controller
SDIO
MIO GPIO DMA 8
UART Channel
UART
CAN
CAN OCM 256K
l2C Interconnect SRAM
l2C
SPI Central
Interconnect Memory
SPI Interfaces
Memory CoreSight DDR2/3,3L,
Interfaces Components LPDDR2
SRAM/ Controller
NOR
ONFI 1.0 DAP
NAND Programmable Logic to Memory
DevC
Q-SPI Interconnect
CTRL

DMA IRQ Config High-Performance Ports ACP

EMIO XADC General-Purpose AES/
12 bit ADC Ports Sync Programmable Logic
SHA
HP0 HP1 HP2 HP3

FPGA

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The HMI The Architecture

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The HMI Technical Data
Parameter HMI-C (eiCAB4G) HMI-X(S) (eiCAB4GS)
Main CPU 2 x CortexA53 @ 1.2GHz 4 x CortexA53 @ 1.2GHz
32/64 Bits 32/64 Bits
Realtime CPU - 2 x CortexR5 @ 500MHz
DSP 500 GMACs 1 TMAC
MicroBlazes - Up to 8 MBs @ 220MHz
Safety SIL0 SIL2
OpenGL GPU OpenGL ES 2.0 DualCore OpenGL ES 2.0 DualCore
GPU @600MHz GPU @600MHz
Streaming Video 6 x 4CIF@25fps@20% 1 x 4K@60fps@20% or equ. (up to 8)
MJPEG, H.264, H.265 MJPEG, H.264, H.265
Memory 1GB DDR3-32x1066Mbit/s 2-4GB DDR3-64x1866Mbit/s, ECC
512MB 34nm SLC NAND 2GB 34nm SLC NAND
16GB eMMC
256kBit FRAM 1MBit FRAM
Interfaces 2 x Ethernet, 1 x USB 2.0 2 x Ethernet, 1 x USB 2.0, 2 x CCTV,
1 x Audio Out, 1 x Audio In
Environmental Storage: -40°C - +85°C Storage: -40°C - +85°C
Operating: -25°C - +70°C Operating: -30°C - +70°C
IP65 and IP67 enclosure IP65 and IP67 enclosure

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The HMI Multimedia
The eiCAB is a multimedia talent:
 HW accelerated Streaming Ethernet Video:
 HMI-C: 6x4-CIF@15fps, 20% CPU load.
 HMI-X: 8x4K(4096x2160)-equ.@60fps, 20% CPU load.
 HW accelerated analog CCTV:
 HMI-C: Up to 4 PAL/NTSC/SECAM in parallel, 0% CPU load.
 HMI-X: Up to 8 PAL/NTSC/SECAM in parallel, 0% CPU load.
 HW accelerated 3D graphics:
 HMI-C and HMI-X: DualCore OpenGL ES 2.0 GPU@600MHz.
 HW accelerated audio (MP3, WAV, Microphone).

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The HMI Safety
Better safe than sorry: SIL 2 qualified hardware.
 Generic Safety Hardware with:
 Xilinx Zynq (CPU + FPGA, Safety Fence).
 Safe Touchscreen, Safe UIC612.
 External Watchdog.
 Voltage- and Temperature Supervision.
 Protection from permanent damage.
 Interface-Shutdown (communication, TFT).
 THR of 35 FIT (that‘s even good enough for SIL 3).
 Complete solution with Safety Platform and Safe DevKit.

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The HMI ThinClients
ThinClients: The clever way to save money.
 Cost-saving external monitors.
 EMC resistant technology (like Ethernet).
 One cable only, up to 10 meters.
 Connected to a master HMI or a cpuBOX, optionally SIL 2.

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The HMI Retrofit
Retrofitting: We have the technology and the record!
 eiCABs are the perfect fit for retrofit:
 Scalable architecture, slim mechanical proportions.
 8 screen sizes.
 Plenty of expansion cards:
 direct I/O.
 I/O boxes.

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The HMI Specials
The eiCABs feature specials like no other HMI:
 SpeedBooting
 Bootup Logo after 1.5 seconds.
 Operational after 6 seconds.
 Diagnostics
 Advanced monitoring and logging features.
 XLDU feature, especially important for safety.
 Spare Parts Protection
 eFUSE based encrypted and authenticated booting.
 Protects after-sales business.

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The HMI The good stuff
Because it‘s railway…
 Reliability:
 Reliability data according to MS, SN29500, MIL-HDBK-217FN2.
 Soft Error mitigation through soft error hardened silicon.
 ECC, SEU-mitigation for FPGA bitstream.
 Durability:
 MOHS5 (9H) GFG Touch.
 34nm SLC NAND, 10 years data retention without power.
 100.000h MTTH.
 Quality:
 ISO9001, IRISv2, IPC-A-610 Class 3, X-Ray, 48h LTT, HALT.
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The Technology The Platform

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The Platform eiCAB Linux
Because Linux isn‘t just a checklist item:
 In depth know how must include OS.
 Using COTS repositories as base.
 Relying on our own know how for eiCAB Linux.
 Tight integration with FPGA, own drivers.
 Highly automated build system.
 Rich choice of packages available.
 Nightly build server for synthesis and OS builds.
 Real excellence requires digging deeper!

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The Platform eiCAB Processing Platform
With the eiCAB Platform: more than just an HMI.
 HMI-X (eiCAB4GS):
 Cortex A53 QuadCore.
 Cortex R5 DualCore.
 Triple Modular Redundant Processor with Voter.
 Up to 8 Microblaze processors.
 HW accelerated Video Encoding.
 Think:
 Realtime Processing
 Hypervisor
 Video Recording

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The Platform eiCAB3G Safe Processing Platform
eiCAB3G: The most advanced Safe Processing Platform:
 ccfm-XLMB features common cause failure mitigated lockstep.
 SECDED ECC SIL 2 MP with concurrent fault tolerance.
 XLDU: For logging of safety shutdowns.
 Safe DMA Controller: Tight and fast integration at SIL 2.
 XPTSU: Mitigating SDTv2 SRACs.
ALU Branch Cache

E E
I-Cache Pipeline
AXI Instructions C AXI Instructions AXI Data C AXI Data

C D-Cache Registers
C Ethernet Header
Nonsafe 2 Safe DMA
MicroBlaze #0
D A[31:24] = 0x3D (16MB keyhole) IP Header
A[23:8] = configurable keyholing
AXI Peripheral Data
Program Counter

M
D
A Writes to 0x3D000000 – 0x3DFFFFFF
M
A UDP Header
K
XLMB AXI Lockstep

XLMB AXI Lockstep

Xilinx e
3 R E
y
REG
Delay
XLMB AXI Lockstep D CDMA h
C
(COTS) C
o

32Bit FNV-1a
AXI Peripheral Data

o
Program Counter

l
n
e
l

32Bit CRC-32-C
y UDP Payload
WR
only

ALU Branch Cache

E E
3 I-Cache Pipeline 3
REG
Delay
AXI Instructions C AXI Instructions AXI Data C AXI Data REG
Delay
C C Timestamp Register
D-Cache Registers

MicroBlaze #1

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The Platform eiCAB3G Safe Processing Platform
Processing System
I/O Application Processor Unit
Peripherals Clock SWDT
Reset FPU and NEON Engine FPU and NEON Engine
Generation
USB TTC ARM Cortex-A9 ARM Cortex-A9
MMU MMU
System CPU CPU
USB 2x USB Level
GigE 2x GigE Control 32 KB 32 KB 32 KB 32 KB
GigE 2x SD Regs I-Cache D-Cache I-Cache D-Cache
SD
IRQ GIC Snoop Controller, AWDT, Timer
SDIO
SD 512 KB L2 Cache & Controller
SDIO
GPIO DMA 8
MIO

UART Channel
UART
CAN
CAN OCM 256K CoreSight
l2C
l2C
Central
Interconnect SRAM
HP3 HP2
SPI
SPI
Memory
Interconnect

CoreSight
Memory
Interfaces HP1
DDR2/3,3L,
Interfaces
SRAM/
Components LPDDR2
SIM
NOR
ONFI 1.0 DAP
Controller

GP0 GP0 Mailbox ccfm-XLMB SIFT

NAND
Q-SPI
CTRL
DevC Programmable Logic to Memory
Interconnect
XLDU XVAC GP1 ccfm-XLMB
DMA IRQ Config High-Performance Ports ACP
EMIO XADC General-Purpose AES/
12 bit ADC Ports Sync Programmable Logic
SHA
HP0 HP1 HP2 HP3

GPIO
FPGA
GP0 GP0 SILOFFC
Sound I2S UART Lite HP3
HP0

GP0 Safe DMAC

Sound I2C N2S DMA S2N DMA
Helper
DMA

HP0
GP0 UART Lite
BacklightC

AXI Lite Interconnect

LVDS
XDOC
HP1

AXI Lite Interconnect

GP0
NSR_ioCABC GP0 HP3 HP3
MicroBlaze
GP0 SDGR SDGR
DevDNA SDGR SDGR

HP0
MVB ASIC
MVB BRAM
ADC_IN
CCTVC
GP0 NANDSUB
MVB_ASIC_PINS
Controller
SPI
Safe Keyboard
EMIO ETH_RCV[0:7] GP0 Direct
MII2RMII ETH0 XPTSU
MVB
SPI/GPIO
TouchC
EMIO ETH_XMT[0:7]
MII2RMII ETH1 XPTSU
SPI
SR_ioCABC

DDR3 Memory (64MB Trustzone partitioned)

Nonsafe PS Data ... XLMB

Instructions
XLMB
Data
Safe I/O
Data
Safe Box Memory

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The Platform eiCAB4G Safe Processing Platform
eiCAB4G: Being 2 steps ahead:
 On top of all 3G features: Cortex R5 RPU in Lock-Step.
 TMR MicroBlaze with Voter.
 SIL2Linux Safe Linux Containers:
 PREEMPT_RT, POSIX PSE51 SIL 2 kernel
 Qualified glibc and busybox subset, qualified drivers.
eiCAB4G Xilinx Zynq SoC eiCAB4G Xilinx Zynq SoC
Cortex A53 QuadCore Cortex R5 DualCore Cortex A53 QuadCore Cortex R5 LockStepped
@1.3GHz @600MHz @1.3GHz @600MHz
Core #0 Core #1 Core #2 Core #3 Core #0 Core #1 Core #0 Core #1 Core #2 Core #3 Core #0
Core #1

SIL0 SIL2 SIL0 SIL2 SIL2 Another Safety

Bare Metal Realtime Application
Full Featured Linux Linux Container Full Featured Linux Linux Container Linux Container Application

Cache Coherent Interconnect Cache Coherent Interconnect

FPGA FPGA

Nonsafe FPGA modules SIL2 FPGA modules Nonsafe FPGA modules SIL2 FPGA modules

NANDSUB NANDSUB
XVAC XLDU ccfm-XLMB SIFT Safe DMAC XVAC XLDU ccfm-XLMB SIFT Safe DMAC
Controller ccfm-XLMB Controller ccfm-XLMB Helper
Helper N2S DMA S2N DMA
N2S DMA S2N DMA DMA
DMA

MicroBlaze MVB BRAM BacklightC MicroBlaze MVB BRAM BacklightC

XDOC SDGR XPTSU XDOC SDGR XPTSU
SDGR SDGR

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The Platform eiCAB Safe HMI
Different approach to safe visualisation:
 Safe Direct Graphics Rendering in forward branch.
 High performance: theoretical 120fps full screen at SIL 2.
 No checksums, no state multiplication!
 Allows for complex safe visualisation without questionable tricks!
VHDL core
320 320 320
Lockstep

SIL2 graphics Alpha-Blending

description file and
Safe Direct 240 240 240
format Alpha-Masking
Graphics Renderer

160 160 160

Scratch Buffer
80 80 80

SIL2 visualisation
ECC
0 0 0

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The Platform eiCAB Safe HMI
 Safe Visualisation.
 Safe User Input
 Safe Touchscreen, full area.
 Safe key input, UIC612 available.
 Safe CCTV.
 Safe Communication (XPTSU).
 Safe Direct I/O (LRV, retrofit).
 Safe Parameter Storage.
 Safe Device Coding.
 Safe Bootup Logo.

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The Technology The Toolchain

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The Toolchain Introducing the DevKit
The DevKit is our Graphical Programming Toolchain:
 Clean architectural split (Design-Time, Run-Time).
 Design-Time: Development on Linux or Windows.
 Run-Time: Windows, Linux, iOS.
 Portability across platforms and devices.
 Virtually no hardware dependence.
 Extensive set of tools and special features.
 Built-in support for many protocols and generic interfaces.
 SIL 2 capable widget set.

31.05.2016 eiCAB keynote

The Toolchain Our Widgets
Widgets are our drag&drop, double-click UI elements:
 Total of about 35 widgets.
 From classics like text and image display, buttons,
speedometers and scales to ERA 3.5.0 ETCS widgets.
 Used in roughly 100 projects by 50 developers.

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The Toolchain Our Widgets

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The Toolchain Safety
 Many widgets come with SIL 2 support:

 Wizard creates safety data and system safety case.

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The Toolchain Safety
Because Safety is in the critical path of every project:
 SIL 2 Profiles feature logical partition of safety apps:
 Separate SIL 0 and SIL 2 parts.
 Separate SIL 2 parts (applications).
 Allows splitting of recertification of e.g. ETCS and TCMS parts.
 Improves reuse and brings down engineering hours.
 Limits recertification efforts and facilitates testing.

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The Toolchain Extensibility
DevKit features various interfaces for scope splits:
 Integrated Protocols vs. SharedMemory Interface.
 C++ API.
 External system processes via 3rd party interface.
 Widget Extensions by inheritance: The WDK.
 Generic debugging interfaces can also be used for extensions.
 Proven in use with e.g. BTAME:
 IPTCom, TDC, TSSP Server, DVS, DLEDS, TDS-ODBS, PCL, TCL,
VRS Client/Reporter, VRSRequester.
 We are open for further interfaces BT would require.
 Planned: The Widget Development Kit.

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The Toolchain Special Features
DevKit special features show its maturity:
 DevKit Manager:
 Container-based and self-contained.
 No installation needed.
 Online- or Offline-Updates, completely version managed.
 Multi-User capability for cooperation.
 Lazy-Loading for nearly constant bootup-times.
 Tools for project reuse and conversions.
 Diagnostic features (tool-based, 3rd party, web).
 Wizard-based automated UI generation.

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31.05.2016 eiCAB keynote
This is eiCAB

31.05.2016 eiCAB keynote

This is eiCAB
For details,
please refer to:

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Welcome to Team eiCAB

We are looking forward to working with you guys!

31.05.2016 eiCAB keynote

 Thank you for flying A&aiR!

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31.05.2016 eiCAB keynote