New Design Concept of an FPGA-Based Chip with

Considerations of Flexible Functions Applying

Sliding Mode Control Strategy for Permanent
Magnet Synchronous Motor Drives
Chih-Hsing Fang', Wen-Nan HuangI2", Chih-Hsin Chen', Jan-Ku Chen', Haw-Yang Chang'
'.Power Electronics Lab., Electrotechnology Division, ERL
Industrial Technology Research Institute, Hsin-Chu, Taiwan 3 10, R.O.C.
*400364@itri.org.tw
'.Department of EIectrical and Control Engineering, National Chiao-Tung University
1001 Da Hsueh Road, Hsin-Chu, Taiwan 300, R.O.C.
*wnhuang.ece88g@nctu.edu.tw

Abstract- A methodology for a successful IC development
procedure, both can be applicabIe and helpful in relatively
experimental studies and during product prototyping phase, is
proposed. A field programmable gate array (FPGA)-based Chip
is utilized to design the conceptual core of sliding mode control
strategy for permanent magnet synchronous motor (PMSM)
drives owning flexible considerntions in hardware and software
functions. Description based on ffexible design issue is aIso
arranged for showing feasibility of the presented concept and its
realization approach. Meanwhile, it demonstrates that the
effectiveness of the proposed FPCA-based chip control system for
the performance improvement of PMSM drives can be achieved
us well.
1. INTRODUCTION
The utilization of FPGA for controlIer implementation
will shorten the design and prototyping time because the
simulated model can be converted directly into
implementation code, and thus one debugging can be avoided
[ l ] . However, a complete description and design opinion
wholly based on researchers requirements in laboratories or
product development is not enough while comparing to efforts
and achievements of finding new applications of FPGA-based
systems. To propose and arrange a usefil concept, making use
of new control algorithms and letting it be a starting point, to
design the system with flexible capability considerations will
help the researchers to modify their conceptual functions into
realization and verification in a shorter time and certainly
lower the cost of product development. In this paper, a PMSM
is applied to be the research machine to implement and
highline the primary parts of the design of an FPGA-based
chip and teIated configurations, selected to be APEX
EP20K200EBC652-1X produced by Altera Inc., contented a
novel sliding mode control strategy.
The flexible and risk-free option without up-front non-
recurring engineering charges or minimum order quantities,
are the primarily features developed by FPGA producers, such
as Altera and Xilinx [1,2]. Many research efforts has focused
on the new FPCA-based system development and obtained
excellent dynamic performance as well [3,4]. One of the
applications, PMSM drive, which is attracting increased
attention for drive application for its advantages of usage [5,6].
Sliding mode control, which is to force the system trajectory
to a specific surface with insensitivity to disturbances and
parameter variation, suitable for applying in PMSM drives
[7,8]. By the former survey of PMSM drives utilize FPGA, it
can be realized that it is still in lack of emphasis on proposing
effective design approach and useful arrangement of flexible
function considerations under a new control scheme.
Therefore, to extend the design content of an FPGA-based
chip system forms the motivation.
In this paper, the experimental setup and related system
collocation, it is not taken into account except for the FPGA-
based chip of the core concept for controlling a PMSM,
peripheral interface circuit for motor drive board, and
integration design for power stage circuit. The content of this
paper is organized as followings: Section I1 briefly describes
the concept and related scheme for constructing the FPGA-
based chip. The proposed sliding mode control strategy is
presented and introduced by algorithm derivation in Section
111, being with preliminary verification by simulation also. The
implementation and experimental results are described and
reported in Section iV and V, respectively. Finally, Section VI
draws the conclusions.
11. DESIGN CONCEPT OF OVERALL SCHEME
The extendable designs in hardware and software are both
taken into account for owning flexible hnctions. A brief
introduction is given in this section.
A . Basic Scheme Description
The algorithms of rotating and static transformation frame
utilized for PMSM drives, as part of the FPGA-based chip
required functions, are introduced and arranged in Appendix

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(see Table A-1). As thr: illustration and depiction of Table A-I, improving the accuracy of the motor control and numerical
all the transformations for the frame expression of PMSM operation within this chip. Three techniques, includes concept
model and control force design are shown in module type or of state machines, realization of Pi control, and SPWM, for
conforming spccific coding requirement in grouping (includes improving flexible competence utilizes coding module are
frame transformation of Park, PurK', Clark, and ClarK'). In shown as Fig.2.
this paper, the synchronous rotation d-q frame is chosen as the
analysis structure for control scheme construction, which
eventually all shown as the block diagrams in this table. The i. ' ' 51 ! S2 ! S3 ! S4 ! I
I -
proportional-integration (Pl) controllers are dominated and
actuated by two values of voltage, denoted as Vd and V9 in
frame expression.
Then, the proposed sliding mode control strategy is
designed to serve as the outer-loop guiding formulas of the
FPGA-based chip to construct the overall scheme of PMSM I - r + I
drive with sinusoidirr pulse width modulation (SPWM)
technique to output thi: desired speed, depicted as Fig. 1
(a) Concept of state machines applied for frame transformation

1 t

jI
I

I
I
I
I
I
I
! FPGA !
I
(a) The schematic representationof control scheme PI Control ter

(b) The architecture of the PI controller

(b) The conlipration for system development

Figure 1. Overall block diagram of the FPGA-based chip for PMSM
drives.
B. Approaches for Concept Realization and Functionalities
Integration
The developed FPGA-based chip mainly includes
coordination transformation, position feedback decoding,
SPWM, current-loop and speed-loop controller, and so forth,
and all the capabilities are verified by ALTERA Quartus 11
package software to complete and execute simulation and
further analysis. Meanwhile, a 16-bit data length with Q14, in
P.U. transformation, and signed 2's format complement
computation for all digital circuit design is applied as well for
(c) Main coding flow and configurationof SPWM
Figure 2. Main architecturesfor implementation of the FPGA-based
chip.
Besides of that, the VHDL instruction strl, the
distribution shift adding structure, is applied to lessen the
usage of logic elements of FPGA caused by the multiplication
for frame transformations. The Park frame transformation is
operated by one multiplexer herein (544 logic elements, and
6% chi? usage area), and the structures of CLARK and
CLARK are respectively depicted in Fig.3(a) and Fig.3(b).

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(a) CLARK transformation
I
@)CLIRK' transformation
Figure 3. The structures of frame transformation.
111. APPLYING CONTROL STRATEGY
Among many observation methods utilized far electric
machines, sliding mode observer is a promising approach [SI.
For motor drives, torque control capability is a key topic for
this outputted performance plays the role deciding the level to
response of this drive system. Hence, sliding mode control
strategy is chosen to be a torque related derivation result, for
making use of its good following feature, to let the
electromagnetic torque T,, output of PMSM, to track the
desired value from computed error by the inputs.
A. Algorithms Derivation of Sliding Mode Control
By defining the sliding surface, denoted as S, which
belongs to PI type, firstly, the torque expression in the sliding
mode analysis procedure can be arranged as (1):
where J,,,, B,, and e ,denote motor moment of inertial, viscous
coefficient, and velocity error. k , k,and kiare all sliding mode
control required setting gain values. Then, the toque command
that related to q-axis desired current iq*can be expressed as (2):
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The Lyapunov function candidate Ycan be selected as (3):
And the time derivative of Vcan be obtained by the derivatives
computation of S, and expressed in the form of (4):
v=ss
= S(w' -w+ k,e) (4)
Utilizing the dynamic relationship of energy conservation
including loading torque TL and taking (1) into account, the
angular acceleration can be derived as ( 5 ) :
To substitute (5) into (4), the expression can be derived further
as followings:
In operation conditions, if sliding surface function status is
DO, then the approaching condition can be set as (7):
(7)
In the opposite condition, i.e. S<O, the relation will exist as (8):
Hence, the PI type sliding mode controller can be
constructed by taking the conditions o f (7) and (8) into account:
(9)
For realization of sign function appeared in former
equation, it can be achieved utilizes the if-else coding
technique in VHDL by judging the sign bit of sliding surface
function and to output 1 while its value is 0, and in the reverse
operation as well, meaning when sign bit is 1, outputting -1.
Eventually, the proposed sliding model control scheme is
implemented by the structure represented as Fig.4.

._
Ir.

(c) Step type loading is added

Figure 5 . T h e simulation results for verification of the proposed

sliding mode control strategy.

Figure 4. The scheme for realization of the proposed sliding mode Iv, ACHEVEMENTS OF 1MPLEMENTATION
control strategy.
The FPGA-based chip is developed by the advantage of
flexible coding features for design concepts being with
B. Preliminary Verification extendable circuit functions and module-like adjustably
The rating and information of parameters of PMSM taken transferring variables.
for verification are d-pole, 200watt, 90V with the rated current,
speed, and output torque of 2.3A, 3000rpm, and 0.636N-m. A. Capability of FlexibleFuncfions
The mechanical parameters of rotor moment of inertial and Some considerations for flexible usages under design
viscous coefficient are 0.0000 t N-m-sec.2 and 0.0000754N-m- . phase can be arranged and described in Table I.
sechad. The simulation results of the PMSM drive with the
proposed sliding mode control are arranged and shown as TABLE I
Fig.5. DESIGNEXAMPLES WITH FLEXIBLE
CAPABILITY OF THE FPGA-BASEDCHlP

Descriptions SampIe Programs and main conceptual

Advnn tages forming
Example:
The hardware circuit of the developed flexible intcrbc circuit is
designed to be M c u t of prcliminav a i l y s i s and debugging circuit by
deplay, choarhg B 7-SECdisplay lor obscrving the binary compulalan
rmulu during on-line operation mttu.
Ease of debugging
and extending E"l!!:'comcling sapal pons. such U LCD dtrplay. fcedbrk s i p d
pmccrring and 80 on. SRI Jcrigncd and edded forpornbls usape.

Example:
The module circuiu for clccmic ~ m c t c rcylauon,
s much a pre-
cosdiiionini hncrion and pmiection. arc dcripcd.
Example:
To avoid tbc ovcrnow saturation cffett hi D - i y p flip-llop adder for
Ihc PI ctlnimllcrcamputation, ihc mRwarc is contenred w i h ht txprcrrion
oflhe followinla:

Interface signal
computation

1
The rpecd unii of PMSM in radlYc. can be compulcd by ihe rcahmtw
technique with flcxiblc 4 u s t caplbiliiy U follows'
@) Speed command: k 2OOOrpm ,.32E
4 L 7.
where T,,K , m d N,arc sampling lime. pukc numbcr per revolution, md
puke number muliilicd by four during rampling timc, rrrpctivcly. The
ihrcc variables c m be sdjurrcd under differcnl rcquirtmcnu.

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8. Implementation of Hardware
The peripheral design for implementation of this FPGA- c

based chip to integrate a PMSM drive can be divided into

flexible interface processing circuit, switching power supply,
gate drivers circuit, development board, and power stage
I
1

circuit, are photoed as Fig.6. 0

50 ~m

Cntc dtlvcn C I ~ Y I I f I--

f ,-
I FPGA &vcbpmenl
; b.rd f
T (a) Speed command: f 500rpm

procasing clrcuit

'upfly Power stnge clmuit

(a) The overall PMSM drive

(c) Speed response while step-type loading is added

Figure 7.The experimental results for the proposed sliding mode

control strategy.

(b) The developed flexible interface circuit.
Figure 6.The FPGA-based chip related implementation information.
v. EXPERIMENTAL VERIFICATIONS
VI. CONCLUSIONS
The FPGA-based chip utilizing VHDL modulation
techniques from a system planning level opinion. The key
feature of the developed chip is that the constructed functions
are both with the consideration of flexible design for related
deveIopment and usage of drives. The operation information
of this chip is finally arranged in Table 11.

The experimental verification results of the proposed TABLEI1

FPGA-based chip contented sIiding mode control strategy for THENEEDED RESOURCES AN0 SEITINOS OF THIS DEVELOPED FPGA
PMSM drive under the same settings and conditions as the
former simulation, comparing to Fig.5, are illustrated as three elements
parts in Fig.7. The FPGA-based system developed by the
presented method is obviously applicable in speed command Memory 61 % to maximum
tracking and following. Moreover, the robustness of the size 65536(bit) a Iicable resource
proposed drive for PMSM can be demonstrated by the step- YO pin 19.h to maximum
type rated-load adding experiment for showing performance 74. a licable ins
that less than 1/50 speed variant in a response time about 400 Number ofphase-locked loop: 1
ms. System sampling time : 102.4~~

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In this paper, a methodology for a successful FPGA-based
chip design, being taken to implement a drive system with the
conceptual core of sliding mode control for PMSM i s
proposed and verified. The key feature of the design concept
for processing and conljtmcting functions flexibly is achieved
and the effectiveness of the proposed FPGA-based control
system for the performance improvement for PMSM drive is
also realized.
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News Views: Newsletter for Altera Customers, Altera Inc.,
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XILINX Blockset ReferenceGuide, XILINX Inc., 2001.
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implementation of dynamic weighted fuzzy sliding-mode
controller for an FPGA-based inverted pendulum car,”
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pp. 628-633,2003,
[4] R. Ramos, D.Bid, F. Guinjoan, and E. Fossas, “Distributed
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[5] J.X. Xu, S.K. Panda, Y.1. Pan, T.H. Lee, and B.H. Lam,” A
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APPENDIX

TABLE A-1
THEPRIMARY RELATION AND MATHEMATICAL EXPRESSION TAKEN AS THE CONTENT OF FPGA-BASEDCHIP

- .I ~ , I . Definition of variables and’relatedexpression of parameters.

( V o r v:Voltage, and its subscript means phase item or frame base); (Xurrent, the meaning of subscription is the
:Leakage inductance of stator); ( L, :Self-inductanceof stator);
same as former) ; (R or rs :Stator resistance); ( LI,
(Af:Flux linkage of rotor ); (L,:Inductance of stator); (e, :Electrical angular displacement); ( w e:Synchronous
anguliu frequency); ( r, :Electromagnetic torque); (7’‘ :External load torque); (RPoke pair); ( W, : Rotor angular
frequency); (3: Time derivative operator); (&or KG Gain of controller); (K;Gain of torque); (*: Command).

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