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ECE606: Solid State Devices


Lecture 32: MOS Electrostatics
Muhammad Ashraful Alam
alam@purdue.edu

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Outline

1. Background
2. Band diagram in equilibrium and with bias
3. Qualitative Q-V characteristics of MOS capacitor
4. Conclusion

REF: Chapters 15-18 from SDF

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Outline of the Course

Device-specific Application specific Physical Principle of Foundation


system design device operation device Operation in Physics

EE606
TFT for
Displays Quantum
Resistors (5 wk)
Mechanics
CMOS-based +
Circuits for mP Diodes (3 wk) Statistical
Mechanics
LASERS for Bipolar (3 wk)
Disk Drives
MOSFETs ( 3 wks) Transport
MEMS for Equations
Read heads

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Scaling of MOSFETs

Vacuum
Bipolar MOSFET Now ??
Tubes
Spintronics

Bio Sensors

Displays ….
1906-1950s 1947-1980s 1960-until now

?
Temp

Tubes bipolar MOS

1900 1920 1940 1960 1980 2000 2020

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Basic Configuration of a MOSFET

Gate
Source Drain
n+
y
n+ n+

Substrate (p)

Almost like a lateral bipolar transistor!


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Symbols
S G D
D

n+ n+
G B

No channel S
when VG= 0

S G D
D

n+ n+ G B

Channel S
when VG= 0
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Background

S G D

n+ n+

Strained MOSFET High-k/metal gate MOSFET

Sources:
IBM J. Res. Dev.
Google Images
Intel website

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Outline

1. Background

2. Band diagram in equilibrium and with bias

3. Qualitative Q-V characteristics of MOS capacitor

4. Conclusion

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Topic Map

Equilibrium DC Small Large Circuits


signal Signal
Diode

Schottky

BJT/HBT

MOS

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Electrostatics of MOS Capacitor in Equilibrium

Vacuum level

qχi
Gate qχs
qΦm
EC
EF
Substrate (p)
x
EV

Schottky barrier with an


interposed dielectric
Metal Insulator P-Semiconductor
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Idealized MOS Capacitor

Vacuum Level
qχi
Gate
qχs
qΦm
EC
y Substrate (p) EF
EV

Metal Insulator P-Semiconductor

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Potential, Field, Charges

V
qχi
x
qχs
qΦm

E
x

Vbi=0 ρ
x

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Topic Map

Equilibrium DC Small Large Circuits


signal Signal
Diode

Schottky

BJT/HBT

MOSCAP

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Electrostatics under Bias

VG VG VG

VG’ >VT’
+Q
+Q +Q Exposed
(Holes) Acceptors
-Q -Q
-Q
(Electrons) Electrons
Accumulation Dep. Inversion

0 VT’ VG’
14
Where do charges come from?

VG VG VG

VG’ >VT’
+Q
+Q +Q Exposed
(Holes) Acceptors
-Q -Q
-Q
(Electrons) Electrons

• Integrate charge to find potential.


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Response Time

VG VG VG

VG’ >VT’

Dielectric Relaxation SRH Recombination-Generation

σ np − ni2 − ni
τ= = R →
κ s ε0 τn ( p + p1 ) + τ p (n + n1 ) τn + τ p

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Ref. Lecture no. 15 16
Outline

1. Background

2. Band diagram in equilibrium and with bias

3. Qualitative Q-V characteristics of MOS capacitor

4. Conclusion

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Charges and Surface Potential

log10 QS (ψ S )

accumulation Depletion Inversion

EC
~ e − qψ S / 2 kBT ~ e qψ S / 2 kBT
VG’=0 EF

EV

~ ψS

ψS = 0
2φF ψS
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Solution of QS(ψS)


∇• D =ρ

(
∇ • J n −q= ) (G − R ) qψ S
 EC
(
∇ • J p q= ) (G − R )
EF
EG
Poisson equation EV

d 2ψ −q
= 
 p ( x ) − n ( x ) + N +
− N −
A

dx 2
κ Siε 0
0 0 D
ψS > 0

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(Depletion) Potential, Field, Charges
Insulator Semiconductor
Vox -qV
ψs
x

E
VG
x

W
ρ
V=
G Vox +ψ s x

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Surface Potential

1  qN AW   qN AW 2  -qV
(2) ψ s =  W   ψs
2  κ sε 0   2κ ε
s 0  x

2κ sε 0 ψ s
(3) W=
qN A E
x
(1) + qN AW
E (0 ) = −
κ sε 0
W
ρ
x
(4) V=
G Vox + ψ s
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Gate Voltage /Surface Potential in Depletion Region
 qN W 2

|Qs|(C/cm2)

VG Eox (0 ) x0 +  A

 2κ sε 0  Exact

 qN AW   qN AW 2 
  x0 +  
κ ε
 ox 0   2κ ε
s 0 
Delta-depletion
qN A x0 2κ oxε 0
ψ s +ψ s
κ oxε 0 qN A

≡ B ψ s +ψ s
 qN AW 2 
.....because ψ s =  
 2κ sε 0 
ψs
VG known, determine ψS 2φF kT / q
kT / q 22
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Gate Voltage and Depletion Charge
QS (ψ S ) = 2qN Aκ Siε 0ψ S
−qN AW = ρ W

log10|Qs(ψs)|

~ e qψ S / 2 kBT

~ ψS

Ψs(V)
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Surface Potential and Induced Charge

+Q

VG
VG VG
-Q

+Q VG’ >VT’
(Holes) log10|Qs(ψs)|
C/cm2
~ e qψ S / 2 kBT
-Q +Q
(Electrons) Exposed
~ e− qψ S / 2 kBT Acceptors
-Q
~ ψS -Q
Why did we not
see these phenomena Electrons
in p-n junctions?
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Conclusion

MOSFET is the dominant electronic device now, not


because it is superior to BJTs in terms of performance,
but because it consumes far less power and allow denser
integration.

MOSFET is an inherently 2D device. We separate out the


vertical and horizontal components to qualitatively
explore the mechanics of its operation.

We explored relation between gate voltage and induced


charge for a MOS-C today. We will continue this
discussion in the next class.

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