An 10936

AN10936
Photovoltaic MPPT battery charge controller using the

MPT612 IC reference board
Rev. 1 — 2 September 2010 Application note
Document information
Info Content
Keywords Solar, PV, MPPT, MPT612, PWM, DC-DC converter, buck, boost, buck
boost, PWM, UART, I2C-bus, GPIO, LQFP, ARM7TDMI-S, flash, SRAM,
ADC, JTAG, EmbeddedICE, FIFO, PLL, LED, power converter, BOM
Abstract This application note describes how to develop a buck-boost enabled
solar PV MPPT charge controller using the MPT612 reference board. In
addition, it describes how to test and benchmark the controller with other
designs.
NXP Semiconductors AN10936
PV MPPT battery charge controller using MPT612 IC reference board
Revision history
Rev Date Description
1.0 20100902 Initial version
Contact information
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
AN10936 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2010. All rights reserved.
Application note Rev. 1 — 2 September 2010 2 of 42

1. Introduction
1.1 Solar photovoltaic energy and maximum power point

Dwindling fossil fuel resources and the adverse environmental effects arising from
converting these resources into energy have placed increasing focus on the use of
non-fossil fuel energy sources such as solar energy.
Solar illumination can be converted into electrical energy through solar cells and the
energy generated is called PhotoVoltaic (PV) energy. While the sun as a source is
available for free, generating PV energy is expensive. This makes it important to extract
the maximum PV energy from the incident sun light using the solar cells.
Typical solar cells comprise a PN junction made of a semiconductor material such as

silicon. Since the power from a single cell is too small to be of practical use, cells are
connected in series-parallel fashion to realize higher power, voltage and current. These
are called solar panels or modules. PV panels are rated in terms of peak-watt at standard
test conditions (25 °C, 1000 W/m2 power density and spectrum of AirMass 1.5).
A solar PV panel has the current/voltage/power characteristics shown in Figure 1.
019aaa242
6 80
(2) MPP (3) PMPP PV power
PV current (1) IMPP
(W)
(A) 70
5
60
4
50
3 40
(4) VMPP
30
2
20
1
10
0 0
0 5 10 15 20 25
PV voltage (V)
If a battery (typically 12 V) is connected directly to the panel, only 78 % of the available maximum
power is extracted.
(1) Current at maximum power point (IMPP).
(2) Maximum power point (MPP).
(3) Power at the maximum power point (PMPP) or peak-watt (WP).
(4) Voltage at maximum power point (VMPP).
Fig 1. PV current and power output as a function of voltage
There is a specific PV voltage at which the power delivered by the PV panel is the highest.
On the curve the point at which the power is the maximum is called the power at the
maximum power point (PMPP) or peak-watt (WP). The voltage at MPP is called the
maximum power point voltage (VMPP) and the current is called the maximum power point
current (IMPP). In Figure 1, PMPP is 70 W, VMPP is 16.2 V and IMPP is 4.3 A.

If the solar panel operates at its MPP, maximum power can be extracted from the panel.
Operating the panel at any other point amounts to under utilization of the PV power
available and thus inefficient use of expensive PV power. Tracking the MPP of a PV panel
(DC source) is called the Maximum Power Point Tracking (MPPT). MPPT and ensuring
that the panel operates at this MPP helps maximum utilization of the installed PV capacity.
1.2 Solar charge controller

The PV power extracted can be used:
• To directly power a DC load

• To be converted to AC using an inverter to drive an AC load
• To charge an energy storage device (battery, super capacitor etc.) enabling the power
to be used on demand
This application note focuses on charging batteries from a PV panel using an

MPPT-enabled charge controller.
Typically a charge controller performs the following basic functions:
• Controls maximum power extraction from a panel by tracking the MPP and ensuring
that the panel operates at MPP
• Controls battery charging as defined in the battery charge cycle specification to
improve usable battery life and protect it against reverse connection, over charging
and deep discharging
• Load protection against overloads and short-circuits
• LED or LCD Status indications
• Communication of system parameters to external systems using dedicated interfaces
Depending on the topology of the power electronics, an MPPT charge controller can be
either:
• Buck only – the PV voltage must be higher than the battery voltage
• Boost only – the PV voltage must be lower than battery voltage
• Buck-boost – both the PV voltage and battery voltage can be variable values with the
system switching between buck and boost based on the relative voltages
A simplified illustration of a solar battery charging system is shown in Figure 2.

panel
− +
solar charge
controller
12 V
+
battery loads
019aaa244
Fig 2. Simplified (DC only) PV system with PV panel, controller, battery and DC-loads

2. MPT612 IC
The MPT612 is an IC developed for Maximum Power Point Tracking (MPPT) applications
to extract the maximum power from a source such as a PV panel or fuel cell. The ICs
primary function is to track the MPP of the source based on the voltage and current. The
resulting Pulse-Width Modulated (PWM) output is sent to the MOSFET to control the
device switching, enabling the system to operate at MPP.
Utilizing a patent pending MPPT algorithm defined in the embedded software, the
MPT612 provides up to 15 kB of on-chip high-speed flash memory enabling enhanced
functionality using user software. Serial communication interfaces such as UART, SPI,
SSP and I2C-bus make the MPT612 ideally suited for integrating with real world systems.
The MPT612 is based on the ARM7TDMI-S 32-bit RISC core and operates at up to
70 MHz. Housed in a 48-pin LQFP IC package, the MPT612 provides a number of
standard software libraries for implementing the PV MPPT function and several other
optional functions as shown in Figure 3. See the MPT612 data sheet for full details on the
MPT612.
PV configuration parameters
MPT612
PV voltage sense PV VOLTAGE PV CONFIGURATION

STATUS INDICATION LEDs
MEASUREMENT BLOCK
PV current sense PV CURRENT

MPPT ALOGIRTHM
MEASUREMENT
SWITCH CIRCUIT
PWM
battery voltage sense BATTERY VOLTAGE BATTERY CHARGE CONTROL
MEASUREMENT CYCLE ALGORITHM
battery current sense BATTERY CURRENT BATTERY BATTERY

battery
MEASUREMENT CONFIGURATION BLOCK PROTECTION BLOCK
temperature sense TEMPERATURE

MEASUREMENT
LOAD MANAGEMENT LOAD PROTECTION load
load current sense LOAD CURRENT

MEASUREMENT
LOAD CONFIGURATION
BLOCK
load configuration
parameters
battery configuration
parameters
these blocks are needed for MPPT functionality
these blocks can be used for customer specific application

001aam089
Fig 3. MPT612 block diagram

3. MPT612 software
The MPT612 is bundled together with the software libraries for the MPPT function. The
high level software architecture of the IC is shown in Figure 4.
SAMPLE CHARGE CONTROLLER AND LOAD CONTROL APPLICATION
SAFETY STATUS BUCK-BOOST DATA

CHECK INDICATION CHANGE LOG
SAMPLE APPLICATION 2 LEAD-ACID BATTERY CHARGING MODULE
CHARGE
BATTERY BATTERY
CYCLE
CONFIG DATA LOG
IMPLEMENT
SAMPLE APPLICATION 1
MPT612 IC + SW
MPPT Core
MPPT
MPPT MPPT
SAFETY
MODULE CONFIG
CHECK
HARDWARE FUNCTIONAL ABSTRACTION LAYER (HFAL)
SYSTEM HARDWARE MPT612 IC
Required for MPPT functionality
Optional library
Sample application programs 019aaa378
Fig 4. MPT612 block diagram
The MPT612’s software consists of the following:
• Hardware Functional Abstraction Layer:

– This layer contains the abstraction of services for different peripherals
– Will be used by the different layers including MPPT Core and other application
layers
– This layer exports APIs for registering the callbacks that will be called periodically
– APIs are exported for peripherals such as ADC, PWM, interrupts/UART and
functions that are helpful in application layers such as software timer

• MPPT Core:
– MPPT Core is the main layer that implements the MPPT algorithm (patent pending)
– This layer always tracks the MPP (Maximum Power Point) when enabled
– The APIs exported by this block, should be called by the application to control the
functionality of the MPPT Core
– The application over this layer sends the configuration to the MPPT Core, which in
turn works within those configuration parameters
The optional lead-acid battery charging module is explained in the MPT612 data sheet.
This software is also used in the MPPT charge controller reference design.
The application software developed for the MPPT charge controller reference design has
the following features:
• This application software implements the product requirements for a sample charge
controller that controls the load and charges the battery
• The main functionality of this software invokes the MPPT Core and lead-acid battery
charging layers at an appropriate time as required. This application manages the
safety check of the system
• It also indicates the status of the charge controller
• Logs the relevant data into flash memory for further action
3.1 Software memory size

Table 1. Software memory size
Part Memory type Size
Total memory in MPT612 IC flash memory 32 kB
SRAM 8 kB
Memory used for HFAL, MPPT Core and lead-acid battery charging, excluding debug code
MPPT Core (whole layer) ROM 7 kB
RAM 1.2 kB[1]
HFAL ROM 8 kB[2]
RAM 1.2 kB
Lead-acid battery charging module ROM 3.5 kB
RAM 1.2 kB
[1] 1 kB is allocated for stack, which may be reduced.

[2] Includes scheduler, PWM, ADC, IRQ, GPIO, timer, flash, data logging, LED module etc.

4. MPPT charge controller reference system

The MPT612 and its associated software functionality can be demonstrated using an
MPPT enabled solar battery charge controller. This application note describes the design
and development of a charge controller specifically focusing on making optimal use of the
features and functionality of the MPT612 IC and software.
The charge controller takes power from a solar PV panel and charges the battery as
defined in the battery charge cycle specification. It also enables the battery supplying
power to the DC loads connected to the controller. Apart from this, a number of protection
mechanisms, system status indications, configurability and communication facilities are
implemented.
To ensure ease and safe use, a number of configuration parameters are available which
control protection mechanisms, system status indications and communication interfaces.
4.1 System specifications

The charge controller specifications are described in Table 2.
Table 2. MPPT charge controller reference design specifications

Tamb = 25 °C; parameters marked with * can be configured.
Feature and parameter Value
Input
Minimum input voltage at MPP* 10 V
Nominal PV voltage 12 V
Maximum PV voltage* 27 V
Maximum PV current 6A
Maximum PV module power rating 100 W
Connector type 2-terminal; screw type
Battery
Battery type* lead-acid
Nominal battery voltage 12 V
Maximum charging current 6A
Charge cycle* 3-stage in CC and CV modes define modes
Battery boost on voltage* 12.7 V ± 0.3 V
Battery boost off voltage* 15.3 V ± 0.3 V
Battery float on voltage* 13.8 V ± 0.3 V
Battery float off voltage* 14.6 V ± 0.3 V
Load disconnect voltage* 10.8 V ± 0.3 V
Load reconnect voltage* 12.2 V ± 0.3 V
Battery low alarm on voltage* 11.4 V ± 0.3 V
Battery low alarm off voltage* 11.6 V ± 0.3 V
Connector type 2-terminal; screw type

Table 2. MPPT charge controller reference design specifications …continued

Tamb = 25 °C; parameters marked with * can be configured.
Feature and parameter Value
Load
Load DC voltage same as battery voltage
Maximum load current 8A
Number of load connectors 2
Load connector type 2-terminal; screw type
Protection functions
PV reverse polarity protection yes
PV reverse current flow protection yes
Surge/transient protection 1.5 kVA
Stop charging at high temperature* 50 °C
Battery low voltage/deep discharge protection* 10.8 V
Battery reverse polarity protection yes; 12 A fuse
Battery short-circuit protection yes; 12 A fuse
Battery open protection yes; system is not on if the battery is not
connected
Load cut-off current overload for 500 ms* 10 A
Load cut-off current short-circuit 10 A
Indicators
System status indication (3 LEDs) green blinking: battery fully charged
green on: battery charging
yellow blinking: battery low
red on: battery low or overload cut-off
Self consumption
Maximum controller standby current; no load; PV 10 mA
voltage is zero
Configuration
System reset push button switch
Configuration methodology via UART
Communication
Data readout via UART
Environmental
Ambient temperature range 0 °C to 50 °C

4.2 MPPT charge controller reference system block

The block diagram of the MPPT charge controller reference system is shown in Figure 5.
The major functions of the reference design are sensing/measuring PV voltage and
current, MPPT algorithm implementation (including PV power calculation, tracking the
maximum power dynamically and ensuring that the required PWM output is supplied to
the gate drive circuit of the switching MOSFET), DC–DC conversion using the buck-boost
topology (which incorporates switching between buck and boost operation based on the
relative voltage levels of PV and battery), load current sense and overload protection,
system configuration (as needed through the UART) and communication of salient
parameters to user as required.
In addition, the charge controller system temperature is measured and battery charging
stopped, if the controller’s ambient temperature rises above a certain predefined value
(50 °C in this example).
MPPT charge controller
BUCK-BOOST CONVERTER
+ +
D1 + +
PWM
from
solar PV C1 L1 C2
BOOST
panel
ON to battery
− −
− −
PV
current
sense BUCK ON
and
voltage battery current and voltage sense
sense
PV voltage sense +
ANALOG SIGNAL LOAD CONTROL
CONDITIONING CIRCUIT PV current sense AND MONITOR to DC load
BAT voltage sense −
CIRCUIT
BAT current sense
temperature sense
MOSFET GATE PWM
MPT612 IC DRIVER CIRCUIT
3.3 V
POWER SUPPLY 1.8 V LED indications
RESET AND clock
CLOCK CIRCUIT control signals
reset
serial
communication
port
019aaa243
Fig 5. MPPT charge controller reference system block diagram

5. Schematics
5.1 Charge controller reference system boards

The MPT612 MPPT charge controller reference system is implemented using a 2-board
approach to minimize the charge controller Bill Of Materials (BOM) and cost.
• The charge controller board takes PV power, charges the battery and supplies power
to loads
• The JTAG/UART add-on board is used exclusively for configuration and data logging
The charge controller board is needed for every PV system. However, the JTAG/UART
add-on board is typically used by service providers sparingly. One JTAG/UART add-on
board can be used with multiple charge controller systems. Separating the JTAG/UART
configuration and data logging functionality from the main PV charge controller reduces
the size and cost of the charge controller board.
Figure 6 shows the charge controller reference system with the charge controller board
and the JTAG/UART add-on board connected.
019aaa245
Fig 6. Charge controller reference system
5.1.1 Charge controller board

The charge controller board takes the required input from the PV panel, supplies the
charging current to the battery and facilitates load supply from battery to load. It also
implements all protection functions as specified in Table 2 on page 9.
This charge controller board has one 8-pin input connector used for interfacing to all the
external systems (such as the PV panel, battery and loads).
The optional JTAG/UART add-on board can be connected to the JTAG/UART connector
to enable system configuration and data retrieval.
The charge controller board is shown in Figure 7.

019aaa246
a. Top view
019aaa247
b. Bottom view
Fig 7. Charge controller board

5.1.2 JTAG/UART add-on board

The add-on board is needed for configuring any of the configurable parameters
(highlighted with an * in Table 2 on page 9). This add-on board is also needed for
extracting any data/information like PV voltage, current, and power from the charge
controller for analytical purposes.
The JTAG/UART add-on board is shown in Figure 8.
019aaa248
a. Top view
019aaa249
b. Bottom view
Fig 8. JTAG/UART add-on board

5.2 Charge controller reference system; major circuit blocks

Major circuit blocks of the charge controller board are:
• PV voltage and current sense circuit

• Battery voltage and current sense circuit
• DC-DC buck-boost converter power electronics circuit
• MPT612 digital circuit
• Board power supply circuit
• JTAG/UART optional add-on circuit
5.2.1 PV voltage and current sense circuit

The PV voltage and current sense circuit is shown in Figure 9. Input to the PV voltage
sense circuit is from resistor dividers R3 and R5 shown in Figure 11. Two separate PV
voltage sense circuits are used: buck mode and boost mode voltage sense.
• Boost mode: quad opamps U4A and U4B with associated circuits are used for the
PV voltage sense in boost mode with a gain of 1.1.
• Buck mode: quad opamp U4C is used for PV voltage sense in buck mode with a gain
of 2.
Accurate measurement of PV current is important for latching to the maximum power

point. The current monitor IC U14 with a gain of 50 is used for PV current sense. The
low?pass filters formed by quad opamps U4A and U4D with their associated circuits are
used for filtering the noise.

C18
0.01 μF
2nd order low-pass filter
VDD(3V3) VDD(3V3)
TP13
R24 R25 3
R23 5 1 4 1
4 7
PV_voltage_ref 10 kΩ 68.1 kΩ PV volt sense_boost
10 kΩ 2 11
1% 1%
1% 6 11 U4A
C20 U4B C22 LPV324M
0.01 μF LPV324M 0.01 μF
VDD(3V3) VDD
GNDA
GNDA L8
GNDA GNDA 1 2
R26 R27 121E_bead
C19
10 kΩ 1 kΩ 10 μF C21
1% 1% 16 V 0.1 μF
CMAX
GNDA VDD(3V3)
R64 10 TP15
4 8
1 GNDA
10 kΩ PV volt sense_buck
1% 9 11
C68 U4C
0.01 μF LPV324M
GNDA
GNDA
R35 R66
10 kΩ 10 kΩ
1% 1%
GNDA 019aaa203
a. PV voltage sense circuit
VDD(3V3) C23
0.01 μF
VDD(3V3)
C24
0.1 μF
C49
GNDA V+ U14 0.1 μF
(1) R86 VIN+ 5
TP14
PV_current_ref_A 3 OUT 1 R29 R30 GND_A 12
100 Ω 4 14
VIN− 1
1% 68.1 kΩ 68.1 kΩ PV current sense
4
C25 1% 1% 13 11
2
0.01 μF U4D
GND INA194AIDBVT C26 LPV324M
(1) R87 0.01 μF
PV_current_ref_B GAIN 50
100 Ω GNDA
1%
GNDA GNDA
019aaa297
b. PV current sense circuit

VDD(3V3) is a 3.3 V supply.
(1) Keep ref_A and ref_B track the same length with differential routing.
Fig 9. PV voltage and current sense circuit schematics
5.2.2 Battery voltage and current circuit

The battery voltage and current sense circuit is shown in Figure 10. The battery voltage
sense circuit input is generated by the resistor divider R4 and R7 shown in Figure 11. The
battery voltage sense circuit comprises quad opamp U5B and its associated circuits which
operate with a gain of 1.1 dB. A low-pass filter formed by quad opamp U5C and its
associated circuit removes the noise.
U5A operates as a battery overvoltage indication circuit. The BAT_overvoltage signal is

used to cut-off the PWM if battery overvoltage level is reached. The opamps U6A and
U6B with their associated circuits perform battery current sensing.

A 2-stage amplifier is used to enhance the signal. The 1st stage operates with a gain of
5 dB and the 2nd stage operates with a gain of 10 dB. Opamp U6C is a low-pass filter for
removing the signal noise.
VDD(3V3)
C28
C50
0.01 μF
0.1 μF
VDD(3V3)
AGND
R36 5 TP16
4 7 R37 R38 10
BAT_voltage_ref 1 4 8
5.1 kΩ battery volt sense boost
6 11 10 kΩ 68.1 kΩ
1%
U5B 1% 1% 9 11
C29
U5C
0.01 μF LPV324M C30 LPV324M
0.01 μF
AGND
AGND
AGND
R39 R40 AGND
R112
5.1 kΩ 1 kΩ
1 MΩ
1% 1%
5%
AGND VDD(3V3)
R54 3 4 1
100 kΩ BAT_overvoltage
VDD(3V3) 1% 2 11
U5A
R55 R59 LPV324M
10 kΩ 18 kΩ
1% 1%
AGND AGND 019aaa204
a. BAT voltage sense circuit
VDD(3V3)
C32
VDD(3V3) 0.01 μF
C31 VDD(3V3)
0.1 μF
R41
(1) 3 4 1 AGND 5 TP18
BAT_current_ref_A 4 7 1 R42 R43 10 TP17
0Ω 4 8 1
1% 2 11 68.1 kΩ 68.1 kΩ BAT current charge
C34 C35
6 11
U6A 1% 1% 9 11
0.33 μF 0.33 μF LPV324M U6B U6C
LPV324M C36 LPV324M
0.01 μF
AGND
AGND AGND
AGND
R44 AGND
(1) R45 R46 R60
BAT_current_ref_B
DNI 10 kΩ 10 kΩ 100 kΩ
2.74 kΩ 1% 1% 1%
R48
1%
2.74 kΩ
1%
AGND AGND 019aaa282
b. BAT voltage sense circuit

(1) Keep ref_A and ref_B track the same length with differential routing.
Fig 10. Battery voltage and current sense circuit schematics

5.2.3 DC-DC buck-boost converter power electronics circuit

The DC-DC buck-boost converter power electronics circuit is shown in Figure 11. The
buck?boost converter can operate in buck-boost mode or buck-only mode. It comprises
MOSFETs (Q1, Q3, Q4), Schottky rectifier D2 and inductor L1.
When the system is in boost mode, MOSFET Q3 is closed and MOSFET Q4 is open. In
buck mode, Q4 is closed and Q3 is open. Capacitors C4 and C7 filter the output. Input
bulk capacitors C3 and C5 store energy when switching MOSFET Q1 is off.
Diode D13 protects the circuit if the PV terminals are connected incorrectly. Diode D5 and
fuse F1 protect the circuit if battery terminals are connected incorrectly. MOSFET Q2
controls the load. Load-side short-circuit protection is provided by the fuse F2. The
high-side gate driver circuit U3 drives the main switching MOSFET.
Low-ohmic current sense resistors R6, R8 and R10 are used for current measurement.
Resistor network R3 and R5 sense the PV voltage. Resistor network R4 and R7 sense the
battery voltage.

BAT_gate_drive
R1 C1 R2 C2
PV_power D7
2 1 BAT_12V
TP1 15 Ω 4.7 nF 15 Ω 4.7 nF
PV_voltage_ref 1 5% 200 V 5% 200 V ES1B D12
BAT_POWER 2 1
D1
2 1 ES1B
Q1
PV_positive ES1B PSMN8R2-80YS(1)
A2
TP3 TP2 TP4
1 1 K 1
F1
PV input 12 A fuse holder
(1) A1 LOAD 1 LOAD 2
J14D D2 C4 C7
282856-8 KK R4
R3
STPS40L45CG 680 μF 680 μF 27.4 kΩ J14B J14A
N 35 V N 35 V C27 12 V battery KK
68.1 kΩ 1% 282856-8 282856-8
7 8 1 MOV1 P P J14C
1% C3 C5 C62 +
+ − P P 4.7 μF KK 5
50 V
3 4 1 2
N 1000 μF N 1000 μF 4.7 μF A1 A2 + − + −
R5 6 5 4 3 2 1 − 6 D8
2 3.9 kΩ 50 V 50 V 50 V
A2 A1 N BYV44
1% 7 8 9 10 11 12 A1 A2 282856-8
D13 D5
BYV42E Q3 L1 BYV42E
R7
PSMN8R2-80YS 85 μH
4.7 kΩ
R6 20 A
1%
F2
CN2220K25G 0.010 Ω
R8 12 A fuse holder
TP8 1% Q4 Q2
Rsense 0.005 Ω (1)
PV_current_ref_B 1 PSMN1R3-30YL PSMN1R3-30YL
1%
(4) R10
R122
TP7
33 Ω 0.01 Ω
1 TP5
PV_current_ref_A 5% BAT_voltage_ref 1 1%
C69 VDD TP6

PV_positive Q13 0.1 μF BAT_current_ref_A 1
PBSS4160T (4)
R121 R113
3 2
BAT_current_ref_B 47 kΩ
C71
100 kΩ 5%
3 0.1 μF
R33
1 5% Load_current_ref_B
Q9 1 R111 (4)
Buck TP9
20 kΩ PBSS4160T 10 kΩ M6
mode_enable 1
5% 1 D19 2 5% PMV65XP Load_current_ref_A
M5 (4)
24 V PMV65XP BAT_12V
2 0.5 W
BAT_12 V R31
R81 R82 R124 R115 R16
C70
0Ω 0.1 μF
20 kΩ 20 kΩ Buck mode_enable 47 kΩ 33 Ω
5% 5% 1 kΩ 5% 5%
5% TP30
PV_power 1
R28 C14 U3 BAT_gate_drive 3
P R76
TP11 DNI 10 kΩ 10 μF IRS21171 TP12 (3) Q5 Load_cutoff 1 Q8 C13
R21 N VCC VB 0.1 μF
1 5% 25 V 1 PBSS8110Z
1 kΩ
PBSS4160T
Buck_PWM 1 8
10 kΩ IN HO R22 5% 2
5% 2 7
(2) NC1 VS P P
C 3 6 C15 C16 20 kΩ
R32 B Q11 10 μF 10 μF
1
COM NC2 D9 5%
BAT_overvoltage
10 kΩ PMBT2222A 4 5 N 63 V N 63 V 12 V
5% E 2 0.5 W
019aaa202

(1) The thermal pads for Q1 and Q2 must be properly designed.
(2) Pin NC1 is pulled HIGH to assemble NCP5104D. In NCP5104D, 3rd is active.
(3) Make collector mounting pad for PBSS8110Z as specified in data sheet.
(4) Route this trace as a differential signal.
Fig 11. DC-DC buck-boost converter power electronics circuit schematics
5.2.4 MPT612 digital circuit

The MPT612 digital circuit is shown in Figure 12. The MPT612 controller U15 is the heart
of the charge controller board. LEDs D16, D17 and D18 indicate the charge controller’s
status. NTC1 measures the ambient temperature. The clock circuit is formed by crystal X1
and capacitors (C42, C43). The reset circuitry is formed by resistor R72, capacitor C41
and switching diode D10. J6 is the UART and JTAG debug connector.

VDD(3V3)
J6 J15
VDD(3V3)
1 2 1
PIO21
3 4 2
TRST TDI PIO20
5 6 3
TMS TCK PIO18
7 8 4
RTCK TDO PIO17
9 10 5
RST DEBUGSEL PIO9
11 12 6
PIO8
13 14 7
PIO3
15 16 8
TxD0 PIO2
17 18 9
EINT1 RxD0
19 20 10
VDD(3V3) VDD(1V8) VDD(3V3)
JTAG/UART 2 2 2 GPIO_CON
L2 L3 L4
121E_bead 121E_bead 121E_bead
1 1 1
TP31 TP32 Buck mode_enable
C37 C38 C40 C39
VDD(ADC)
0.1 μF 0.1 μF 0.1 μF 0.1 μF 1 1 VDD(3V3)

VDD(IO)
VDD(IO)
VDDC
GND_A
40 17 5 42 1 PIO19/MAT1_2/MISO1 R53
10 kΩ VDD(3V3) VDD(3V3) VDD(3V3)
PIO20/MAT1_3/MOSI1
2 PIO20 5%
PIO21/SSEL1/MAT3_0
3 PIO21
PIO14/EINT1/SCK1/DCD1
44 EINT1 R56 R65 R57 R58
4.7 kΩ 4.7 kΩ 1 kΩ 2.2 kΩ
5% 5% 5% 5%
PIO17/CAP1_2/SCL1
47 PIO17
PIO18/CAP1_3/SDA1 A A
48 PIO18 D17 D16
LED_GREEN1 LED_YELLOW1
TRST/PIO27/CAP2_0
TRST 8 PIO13/MAT1_1/DTR1 K K
TMS/PIO28/CAP2_1 41
TMS 9 PIO15/EINT2/RI1
TCK/PIO29/CAP2_2 45
TCK 10 PIO16/EINT0/MAT0_2 R67
PIO30/MAT3_3/TDI 46 Powerdown_wakeup
TDI 15 10 kΩ
PIO31/TDO 5%
TDO 16 PIO0/MAT3_1/TXD0
RTCK 13 TXD0
RTCK 26 PIO1/MAT3_2/RXD0
JTAGSEL 14 RXD0
DEBUGSEL 27
VDD(3V3)
VDD(3V3) DR2 PIO08
PIO8/TXD1/PWMOUT1
29
PIO9/RXD1/PWMOUT2 DR1 PIO09 10 kΩ R75
U15 30 5% 2.2 kΩ
R72 3 D10 10 kΩ 5%
MPT612FBD48
47 kΩ 2 MMBD4148 5% A
PIO4/SCK0
5% 1 TP19 22 Buck_power_enable D18
1 RST PIO5/MISO0 LED_RED1
6 23 Load_cutoff
PIO6/MOSI0 K
SW2 C41 24
RESET SW 0.1 μF PWMOUT0
28 Buck_PWM
TP24
PIO2/SCL0 1
18 PIO2
C42 PIO3/SDA0 TP25
X1 21
11 1
PIO3
22 pF R120 X1
1 MΩ PVVOLTSENSEBUCK
C43
12.000 MHz 32 PV volt sense_buck
5% X2 PVVOLTSENSEBOOST
12 33 PV volt sense_boost
22 pF PVCURRENTSENSE
34 PV current sense
PIO10/CAP1_0/RTS1/AD3
VDD(RTC) 35 Load current sense
4 PIO11/CAP1_0/CTS1/AD4
36 BAT current charge
RTXC2 PIO12/MAT1_0/DSR1/AD5
25 37 BAT volt sense TP23
PIO25/AD6 1
RTXC1 38
20 PIO26/AD7
7 19 31 43 39
3.3 V_A
GND
GND
GNDADC
GND
DR3 DC1 DR4

10 kΩ 10 kΩ R79
0.1 μF 2.2 kΩ
5% 5%
TP21 1%
1
NTC for ambient R84 NTC response

temp measurement 100 Ω At 25 °C = 1.5 kΩ
GND_A 1% At 0 °C = 4.28 kΩ
At 85 °C = 440 Ω
NTC1
NTC
GND_A 019aaa205
VDD(3V3) is a 3.3 V supply and VDD(1V8) is a 1.8 V supply.

Fig 12. MPT612 digital circuit schematic

5.2.5 Charge controller board power supply circuit

The board power supply circuit is shown in Figure 13. The switching regulator U9 takes
battery voltage as the input for a 3.3 V (VDD(3V3)) regulated output supply. This 3.3 V
supply is used for powering the MPT612 IC and rest of the circuitry. The low dropout
regulator U10 is the core voltage for MPT612.
MOSFET switch M1 is used to switch off the power to the board during the standby
condition. The battery voltage comparator U11A, PV voltage comparator U11D and
overload comparator U11B with OR gate U12 forms the standby control circuit. The
Output of PV voltage comparator signal is also used as interrupt signal to the MPT612 to
wake it from the power-down state.
BAT_current_ref_B
L5 L6
2 1 1 2
121 Ω 121 Ω MOUNTING
Bead Bead HOLE
Switching regulator circuit for VDD(3V3) GND_A
BAT_12 V 3.3 V_standby VDD(3V3) VDD(3V3) MT1
U9 U10
Drive collector SW collector M1 TPS73018DBV 1
8 1 TP26
R93 I peak sense SW emitter L7 PMV65XP IN OUT
1 2 1
7 2 1 5
0.2 Ω VCC Timing cap K 47 μH
6 3 C56
C65
Comp inv IP GND C51 C54 0.1 μF C52
4.7 μF 5 4 R100 R101 EN NR R114
C61
50 V 680 μF 3 4 2.2 μF 2 MΩ(2)
A D11 2 4.7 nF
C53 MC33063A 330 pF 10 V 47 kΩ 10 kΩ C58 16 V 1%
PMEG6010CEJ R97
47 μF R96
5% 5%
C57
GND 0.1 μF
25 V C55 100 Ω
0.1 μF 0.1 μF
CMAX 5%
20.5 kΩ N BAT_current_ref_B
1% CMAX
R98 R99 C C
B B R118
Q6
100 Ω 12.4 kΩ Buck_power_enable
PMBT2222A
1% 1% Q7 4.7 kΩ
E E PMBT2222A 5%
3.3 V_standby 3.3 V_standby
R119
(1)BAT voltage comparator
U11A 4.7 kΩ
LPV324M 5%
Load current sense
C59
R123 2 11 TP27
0.1 μF 3.3 V_standby C60 C73
BAT_voltage_ref 1 1 5
1 0.1 μF 0.33 μF
100 kΩ 6 4
1% 3 4 R102
3.3 V_standby 3 2 U12 1 MΩ(2)
74LVC1G332GW 5% TP28 Load_current_ref_A
R77 4 10
R103 4 5 1 8
7
3.3 V_standby 100 kΩ R107 DNI
1 MΩ 11 9 Load_current_ref_B
5% U11B 11 6 1% U11C
R116 R106 10 kΩ
LPV324M LPV324M 1%
15 kΩ 15 kΩ
1% 1%
R108
R109 22 kΩ
1%
(1)PV voltage comparator R94
1 MΩ 2.2 kΩ
5% 1%
3.3 V_standby 3.3 V_standby
R104 TP29
GND_A
12 4 R78 R117
PV_voltage_ref 14 1
100 kΩ Powerdown_wakeup
13 11 U11D 10 kΩ 15 kΩ
1%
LPV324M 1% 1%
3.3 V_standby
R110 R105
20.5 kΩ 10 kΩ
1% 1% 019aaa206
VDD(3V3) is a 3.3 V supply and VDD(1V8) is a 1.8 V supply.

(1) To improve hysteresis, the resistor values can be changed without changing the schematic.
(2) Place all circuits containing higher resistance (1 MΩ) away from the switching circuit.
Fig 13. Charge controller board power supply schematic

5.2.6 JTAG/UART add-on board circuit diagram

The optional JTAG/UART add-on board circuit is shown in Figure 14. This board is an
add-on board which is used with the charge controller board for programming. U13 is the
RS232-level connector IC. The UART port with additional level-shifted RST and EINT
signals is used for ISP programming.
The JTAG connector J7 is used with the debugger. Jumper J9 is closed when JTAG is
selected. Jumper J13 and J11 are used to select the ISP programming.
VDD(3V3) VDD(3V3)
R49 R50 R51 R52

10 kΩ 10 kΩ 10 kΩ 10 kΩ
1 2 5% 5% 5% 5% 1 2
TRST
3 4 3 4
TRST TDI VDD(3V3) TDI
5 6 5 6
TMS TCK TMS
7 8 R69 7 8
RTCK TDO 10 kΩ TCK
9 J6 10 J9 9 J7 10
5%
RST DEBUGSEL 1 2 RTCK
11 JTAG/UART 12 11 JTAG CONN 12
JTAG select TDO
13 14 13 14
RST
15 16 15 16
TXD0
17 18 17 18
EINT1 RXD0
19 20 19 20
R60 R61 R62 R63
10 kΩ 10 kΩ 10 kΩ 10 kΩ
5% 5% 5% 5%
J13
EINT1 2 1
ISP select
VDD(3V3) VDD(3V3)
C C44
B R80 M1 R70 1 2
Q12
PMBT2222A
33 kΩ 10 kΩ 0.1 μF
E 3 COM0
5% 5%
D14 2 R73 R71
1 1 10 kΩ 10 kΩ
MMBD4148 6 TXD_DB9 5% 5%
2 VCC
7 RXD_DB9
J10 3 FORCEOFF 15 EN
C45 16 1
8 2 1 C1+ INVALID
J11
4
2 10
RST 2 1 9 C1− FORCEON
5 0.1 μF
4 12
ISP select Connector D-sub 9 pin C46 C47
2 1 C2+ U13 V+ 1 2
C 5 TI 3
R74
M2 0.1 μF C2− V− 0.1 μF
Q10 B 6 7
PMBT2222A
33 kΩ C48
E 3
5% DOUT DIN 1 2
D15 2 13 11 TXD0
1 RIN ROUT 0.1 μF
8 14 9 RXD0
MMBD4148
GND MAX3221IPW
019aaa201

Fig 14. JTAG/UART add-on board circuit schematic

6. Charge controller reference system bill of materials

The charge controller reference system comprises two boards; the charge controller
board and the JTAG/UART add-on board. The BOM for each board is described in Table 3
and Table 4.
6.1 Charge controller board Bill Of Materials (BOM)

The charge controller board BOM is given in Table 3.
Table 3. Charge controller board BOM

Component Description Manufacturer’s part Manufacturer
number
C1, C2 4700 pF, 200 V, ceramic capacitor X7R ECJ-2VB2D472K Panasonic Corp.
0805
C3, C5 1000 μF, 50 V, electrolytic capacitor, low UHD1H102MHD Nichicon Corp.
ESR
C4, C7 680 μF, 35 V electrolytic capacitor KY RAD EKY-350ELL681MK20S United Chemi-Con Inc.
C1, C13, C21, C24, 0.1 μF, 50 V, ceramic capacitor 08055C104MAT2A AVX Corp.
C31, C37, C38, C39,
C40, C41, C49, C50,
C55, C56, C57, C58,
C59, C60, C69, C70,
C71
C14 10 μF, 25 V, electrolytic capacitor UVZ1E100MDD Nichicon Corp.
C15, C16 10 μF, 63 V, electrolytic capacitor UVZ1J100MDD Nichicon Corp.
C25, C26, C28, C29,
C30, C32, C36, C68
C19 10 μF, 16 V, electrolytic capacitor, general UVZ1C100MDD Nichicon Corp.
C27, C62, C65 4.7 μF, 50 V, ceramic capacitor, X5R, 1206 C1206C475K5PACTU Kemet Corp.
C34, C35, C73 0.33 μF, 50 V, ceramic capacitor 08055C334MAT2A AVX Corp.
C42, C43 22 pF, 50 V, ceramic capacitor 08055A220KAT2P AVX Corp.
C51 330 pF, 50 V, ceramic capacitor 08055C331KAT2A AVX Corp.
C52 2.2 μF, 16 V, ceramic capacitor 08055C104MAT2A AVX Corp.
C53 47 μF, 25 V, electrolytic capacitor UVZ1E470MDD Nichicon Corp.
C54 680 μF, 10 V, electrolytic capacitor EEUFM1A681L Panasonic Corp.
C61 4700 pF, 1000 V, ceramic capacitor, X7R C1206C472KDRACTU Kemet Corp.
1206
DR1, DR2, DR3, DR4, 10 kΩ, 5 %, 1⁄8 W, 0805 SMD resistor MCR10EZHJ103 ROHM Co. Ltd
R21, R28, R32, R53,
R67, R101, R111
D1, D7, D12 fast recovery SMD diode ES1B Fairchild Semiconductor
D2 Schottky rectifier, 2 × 20 A, D2PACK STPS40L45CG STMicroelectronics
D5, D13 30 A, 100 V, ultra-fast diode, TO220 BYV42E-150 NXP Semiconductors
D8 30 A, 100 V ultra-fast diode, TO220 BYV44-500 NXP Semiconductors
D9 12 V, 0.5 W, SMD Zener diode BZT52H-C12 NXP Semiconductors
D10 high speed switching diode, SOT23 MMBD4148 NXP Semiconductors

Table 3. Charge controller board BOM …continued

number
D11 Schottky rectifier 60 V, 1 A, SOD323F PMEG6010CEJ NXP Semiconductors
D16 3 mm through hole; yellow LED HLMP-1719 Avago Technologies
D17 3 mm through hole; green LED HLMP-1790 Avago Technologies
D18 3 mm through hole; red LED HLMP-K150 Avago Technologies
D19 24 V, 0.5 W, SMD Zener diode BZT52H-C24 NXP Semiconductors
F1, F2 12 A high current fuse holder clips 751.0056 Schurter Group
J6 10-way, dual row 2.54 mm pitch connector SSW-110-01-T-D Samtec
J14 8-pin, side entry 5 mm, 300 V, 24 A terminal 282856-8 Tyco Electronics
block
J15 10-way single row, 2.54 mm pitch connector TSW-110-07-T-S Samtec
L1 85 μH, 25 A inductor - EPCOS AG
L2, L3, L4, L5, L6, L8 120 Ω, 100 MHz, 500 mA; ferrite bead EXC-3BP121H Panasonic Corp.
L7 47 μH, 1.5 A SMD shielded inductor B82464G4473M EPCOS AG
MOV1 SMD MOV for surge protection SIOV-CN2220K25G EPCOS AG
M1, M5, M6 P-channel MOSFET PMV65XP NXP Semiconductors
NTC1 1.5 kΩ at 25 °C (radial) leaded NTC 2381 640 63152 Vishay Electronic
Q1, Q3 N-channel Trench MOSFET PSMN8R2-80YS NXP Semiconductors
Q2, Q4 N-channel Trench MOSFET PSMN1R3-30YL NXP Semiconductors
Q5 NPN transistor 1 A PBSS8110Z NXP Semiconductors
Q6, Q7, Q11 NPN transistor, SW 600 mA, 40 V, SOT23 PMBT2222A NXP Semiconductors
Q8, Q9, Q13 NPN transistor, 1 A, 60 V SOT23 PBSS4160T NXP Semiconductors
R1, R2 15 Ω, 5 %, 1⁄
4 W, 0805 SMD resistor ESR10EZPJ150 ROHM Co. Ltd
R3, R25, R29, R30, 68.1 kΩ, 1 %, 1⁄ W, 0805 SMD resistor MCR10EZHF6812 ROHM Co. Ltd
8
R38, R42
R4 27.4 kΩ, 1 %, 1⁄8 W, 0805 SMD resistor MCR10EZHF2742 Yageo Corp.
R5 3.9 kΩ, 1 %, 1⁄ W, 0805 SMD resistor MCR10EZHF3901 Yageo Corp.
8
R6, R10 0.010 Ω, 1 %, 2 W, resistor, current sense MCS3264R010FER Ohmite Mfg. Co.
R7 4.7 kΩ, 1 %,1⁄8 W, 0805 SMD resistor MCR10EZHF4701 Yageo Corp.
R8 0.005 Ω, 1 %, 2 W, resistor, current sense MCS3264R005FER Ohmite Mfg. Co.
R22, R33, R81, R82 20 kΩ, 5 %, 1⁄8 W, 0805 SMD resistor MCR10EZHJ203 ROHM Co. Ltd
R23, R24, R26, R35, 10 kΩ, 1 %, 1⁄8 W, 0805 SMD resistor MCR10EZPF1002 ROHM Co. Ltd
R37, R45, R46, R55,
R64, R66, R78, R105,
R107
R27, R40 1 kΩ, 1 %, 1⁄8 W, 0805 SMD resistor MCR10EZHF1001 ROHM Co. Ltd
R31, R41 0 Ω, 1⁄8 W, 0805 SMD resistor MCR10EZHJ000 ROHM Co. Ltd
R36, R39 5.1 kΩ, 1 %, 1⁄ W, 0805 SMD resistor MCR10EZHF5101 ROHM Co. Ltd
8
R44, R48 2.74 kΩ, 1 %, 1⁄ W, 0805 SMD resistor MCR10EZPF2741 ROHM Co. Ltd
8
R54, R60, R77, R104, 100 kΩ, 1 %, 1⁄ W, 0805 SMD resistor MCR10EZPF1003 ROHM Co. Ltd
8
R123
R56, R65, R118, R119 4.7 kΩ, 5 %, 1⁄8 W, 0805 SMD resistor MCR10EZHJ472 ROHM Co. Ltd
R57, R76, R124 1 kΩ, 5 %, 1⁄ W, 0805 SMD resistor MCR10EZHJ102 ROHM Co. Ltd
8

Table 3. Charge controller board BOM …continued

number
R58, R75 2.2 kΩ, 5 %, 1⁄8 W, 0805 SMD resistor MCR10EZPJ222 ROHM Co. Ltd
R59 18.0 kΩ, 1 %, 1⁄ W, 0805 SMD resistor MCR10EZPF1802 ROHM Co. Ltd
8
R72, R100, R113, 47 kΩ, 5 %, 1⁄ W, 0805 SMD resistor MCR10EZPJ473 ROHM Co. Ltd
8
R115
R79, R94 2.2 kΩ, 1 %, 1⁄8 W, 0805 SMD resistor MCR10EZPF2201 ROHM Co. Ltd
R84, R86, R87, R98 100 Ω, 1 %, 1⁄8 W, 0805 SMD resistor MCR10EZHF1000 ROHM Co. Ltd
R93 0.2 Ω, 1 %, 1⁄4 W, 0805 SMD resistor MCR10EZHFLR200 ROHM Co. Ltd
R96, R110 20.5 kΩ, 1 %, 1⁄8 W, 0805 SMD resistor MCR10EZHF2052 ROHM Co. Ltd
R97 100 Ω, 5 %, 1⁄8 W, 0805 SMD resistor MCR10EZPJ101 ROHM Co. Ltd
R99 12.4 kΩ, 1 %, 1⁄8 W, 0805 SMD resistor MCR10EZHF1242 ROHM Co. Ltd
R102, R103, R109, 1.0 MΩ, 5 %, 1⁄ W, 0805 SMD resistor MCR10EZPJ105 ROHM Co. Ltd
8
R112, R120
R106, R116, R117 15 kΩ, 1 %, 1⁄8 W, 0805 SMD resistor MCR10EZHF1502 ROHM Co. Ltd
R108 22 kΩ, 1 % SMD resistor MCR10EZHF2202 ROHM Co. Ltd
R114 2.0 MΩ, 1%, 1⁄4 W, 1206 SMD resistor MCR18EZPF2004 ROHM Co. Ltd
R121 100 kΩ, 5 %, 1⁄8 W, 0805 SMD resistor MCR10EZHJ104 ROHM Co. Ltd
R122, R16 33 Ω, 5 %, 1⁄8 W, 0805 SMD resistor RMCF 1/10 33 5 % R Stackpole Electronics Inc.
SW2 switch TACT RA H = 1.24 mm, 160 GF FSMRA2J Tyco Corp.
U3 single channel high-side gate driver IRS21171STRPBF International Rectifier
U4, U5, U6, U11 quad, low voltage rail-to-rail opamp LPV324M National Semiconductor
U9 1.5 A, step-down switching regulator MC33063ADR2G On Semiconductor
U10 1.8 V, 200 mA, LDO TPS73018DBV Texas Instruments
U12 single 3 input OR gate 74LVC1G332GW NXP Semiconductors
U14 IC current monitor 3 %, SOT23-5 INA194AIDBVT Texas Instruments
U15 MPPT IC MPT612FBD48 NXP Semiconductors
X1 12 MHz, crystal, fundamental frequency ECS-120-20-4XDN ECS Inc.
F1 12 A, fast blow fuse, battery reverse PSF-12A Protectron
protection
F2 10 A, fast blow fuse, battery reverse PSF-10A Protectron
protection
PCB PCB, DS, 150 mm × 100 mm PCB -

6.2 JTAG/UART add-on board Bill Of Materials (BOM)

The JTAG/UART add-on board BOM is given in Table 4.
Table 4. JTAG/UART add-on board BOM

number
C48
D14, D15 high-speed switching diode, SOT23 MMBD4148 NXP Semiconductors
J6 10-way, dual row 2.54 mm pitch berg TSS-110-01-L-D Samtec
connector (20 pin)
J7 10-way, dual row 2.54 mm pitch berg TSW-110-07-T-D Samtec
connector (20 pin)
J9 2 pin, 2.54 mm jumper for JTAG selection 22032021 Molex Inc.
J10 D-sub connector 9 pin female vertical 171-009-213R001 Norcomp Inc.
J11, J13 2 pin, 2.54 mm, jumper for ISP selection 22032021 Molex Inc.
Q10, Q12 NPN SW 600 mA, 40 V transistor SOT23 PMBT2222A NXP Semiconductors
R49, R50, R51, R52, 10 kΩ, 5 %, 1⁄ W, 0805 SMD resistor MCR10EZHJ103 ROHM Co. Ltd
8
R60, R61, R62, R63,
R69, R70, R71, R73
R74, R80 33 kΩ, 5 %,1⁄8 W, 0805 SMD resistor RC0805JR-0733KL ROHM Co. Ltd
U13 driver/receiver RS-232 1-CH 16TSSOP MAX3221CPWR Texas Instruments
PCB PCB, DS, 75 mm × 40 mm - -
7. Component selection
7.1 PV System parameters

The following parameters must be considered for the major components in the design of
the MPPT charge controller reference system:
• PV panel rating: 100 W at STC

• PV voltage range: up to 27 V
• MPP voltage range: 10 V to 21 V
• Maximum input current: 6 A
• Resistance across the panel cables: 400 mΩ
• MPP voltage on board terminals: 7.5 V to 18.5 V (after 2.5 V maximum drop across
the cable)
7.2 Major components

The major MPPT charge controller reference system components are listed below:
• Frequency of DC-DC converter operation; see Section 7.2.1

• Inductor; see Section 7.2.2
• Input bulk capacitor; see Section 7.2.3
• Switching MOSFET; see Section 7.2.4

• Output diode; see Section 7.2.5

• Output capacitor; see Section 7.2.6
• Thermal pads; see Section 7.2.7
7.2.1 Frequency of DC-DC converter operation

The optimum frequency for DC-DC converter operation was arrived at after keeping in
mind the trade-off between switching losses, inductor size and inductor losses. The higher
the switching frequency, the smaller the inductor size. However, the switching loss in the
switching device and core loss in the inductor are directly proportional to the operating
frequency. In this design, the converter switching frequency is fixed at 20 kHz based on
the experimental results which ensures both switching loss and inductor size are
optimized.
7.2.2 Inductor
• IL(AV) = IO / (1 − δ)
Where IO is the output current and δ is the duty cycle. In buck-boost mode, the maximum
duty cycle is 60 %.
• IL(AV) = 6 / 0.4 = 15 A
• IL(pk) = (IO / 1 − δ) + ΔIL / 2 = 18.75 A; where ΔIL is the inductor ripple current
• VI = 19 V
• δ = 0.8 %
• ΔIL = 0.3 * IL(AV)
• fosc = 20 kHz
• Lmin = VI × δ / (fosc × ΔIL) = 76 μH
The inductor selected for proto stage is ~85 μH/20 A. Also refer to:
• www.coilcraft.com/apps/selector/selector_1.cfm
• schmidt-walter.eit.h-da.de/smps_e/ivw_smps_e.html
7.2.3 Input bulk capacitor

The input capacitor is mainly selected on its ESR value and on the RMS current rating to
support the high current changes on the input. Low ESR capacitors are recommended to
minimize the input voltage ripple and interference with other circuits in the system.
• CI(min) = (II * ton) / ΔVI

• II = 6 A
• ton = 25 μS (50 % δ)
• input ripple voltage (ΔVI) = 0.2 V
• CI(min) = (6 * 25) / 0.2 = 750 μF
• ESR = ΔVI / (II / δ) = 0.2 / (6 / 0.5) = 16 mΩ
To reduce the ESR, two 1000 μF, 50 V capacitors are used in parallel. Nichicon part
number UHD1H102MHD with ESR 21 mΩ, rated ripple current 3.01 A.

7.2.4 Switching MOSFET

• Peak current in the MOSFET ISW(pk) = IL(pk) = 18 A
• VI at some cases can go up to 21 V
• VDS(max) = VI + VO = 21 V + 16 V = 37 V
• Select a MOSFET with a VDS greater than 37 V and IDS greater than 15 A.
The MOSFET selected is NXP part number PSMN8R2-80YS: 82 A IDS(max), 8.2 mΩ

RDS(on), 80 V (VDS), Loss Free PACKage (LFPACK) SMD MOSFET.
7.2.5 Output diode

• ID(AV) ≥ Io = 6 A
• ID(pk) = IL(pk) = 18 A
• VRRM ≥ VI + VO = 37 V
The efficiency of the converter depends on the diode VF (in buck-boost operation), so a
diode with a low VF should be selected.
The Schottky diode selected is STPS40L45CG:
• 45 V, 40 A
• VF = 0.45 V
7.2.6 Output capacitor
C O ≥ I O ( max ) × ( ( V O + V F ) ÷ ( ( V I ( min ) – V sw ) + ( V O + V F ) ) )
-------------------------------------------------------------------------------------------------------------------------------------------------- (1)
f osc × ΔV OC
• IO(max) = 6 A
• VO = 16 V
• VF = 0.45 V
• VI(min) = 8 V
• Vsw = 0.4 V
• fosc = 20 kHz
• ΔVOC = 200 mV
• CO ≥ 1028 µF
• ESR = ΔVO / Isw(peak) = 11.1 mΩ
Select two output electrolytic capacitors of 680 μF, 35 V with an ESR of less than 25 mΩ.
Place them in parallel so that effective ESR is less than 11.5 mΩ.
The selected component is a Nichicon UHD1V680MHD.
• ESR 21 mΩ
• Rated ripple current is 2.36 mA

7.2.7 Thermal pads

Maximum junction temperature (Tj(max)) = PAV × Rth(tot) + Tamb
Where PAV = average power; Rth(tot) = total thermal resistance and Tamb = ambient
temperature.
The thermal resistance of the PCB in FR4 material (2 oz. copper ) is 90 °C/W for 1 cm2.
However, more thermal pads are required to minimize the MOSFET junction temperature.
One option is to add copper to be on the safer side. The PCB Rth is considered to be
300 °C/W with 70 micron for calculation purposes. The maximum device junction
temperature is limited to 100 °C. The ambient temperature is considered to be 50 °C.
7.2.7.1 Thermal pad for D2PACK diode
• Power dissipation at 2.88 W maximum (0.48 V VF and 6 A average current)

• Minimum pad area required: 31 mm × 31 mm on both sides
• Rth(j-a) = 30 °C/W
• Temperature increase = power dissipated × Rth(j-a)
• Temperature increase = 2.88 W × 30 °C = 86 °C
The above Rth(j-a) is based on a copper thickness of 35 micron. However, with a 75 micron
thickness of copper, the Rth(j-a) is further reduced. PCB thermal pad copper area is
calculated using Equation 2:
P d × R th ( pcb – a )
Area = ------------------------------------------------------------------------------------------------------ (2)
( T j – T amb – P d × ( R th ( j – c ) + R th ( c – pcb ) ) )
• Pd = power dissipated in the device in W

• Rth(pcb-a) = thermal resistance of a 1 cm2 PCB surface to ambient in °C/W
• Tj = maximum or desired junction temperature in °C
• Tamb = ambient temperature in °C
• Rth(j-c) = thermal resistance from junction to case in °C/W
• Rth(c-pcb) = thermal resistance from case to PCB surface in °C/W
Equation 2 calculates the total PCB copper area needed to keep the junction temperature
within the defined limits. The thermal pad area required for a single-sided PCB is
calculated. If both sides of the PCB are used as a thermal pad then this value is divided by
2. If thermal vias are not used, it is assumed that the heat is mainly dissipated on one side
of the board. However, the area on both sides of the PCB can be counted when adequate
thermal vias are used.

7.2.7.2 MOSFET thermal pad calculation

The minimum thermal pad area required for MOSFETs is as follows:
Q1; part number: PSMN8R2-80YS
• RDS(on) at 100 °C is 13.8 mΩ, current = 6 A

• Power: 1.5 W
• Pad area required: 25 mm × 25 mm on both sides
• Make an additional pouring because this is the switching device
Q2; part number: PSMN1R3-30YL

• Power: 250 mW
Q3; part number: PSMN8R2-80YS

• Power: 500 mW
Q4; part number: PSMN1R3-30YL

• Power: 200 mW (maximum)
Refer to Equation 2 for the calculation of the pad area and AN10874 LFPAK MOSFET
thermal design guide for detailed information on specifying PCB materials.

8. System test plan

This section describes the tests which are performed to demonstrate that the MPPT
charge controller reference system meets the specifications provided in Table 2 on
page 9.
• Test cases are decided based on requirements for demonstration to be completed in

10 hours
• When possible and acceptable, to speed up the testing, DC power supplies can
replace PV panel and battery
• Load means electronic DC-load
• Destructive tests (marked as D in the test title) are performed at the end of the test
cycle (as required)
• Test set-up combination abbreviations are described in Table 5.
Table 5. Test set-up abbreviations
Name Description
S DC-supply
P PV panel
N NXP charge controller
B battery with a maximum charge of 20 Ah to charge the battery in the short time
available
E Electronic DC-load
• Infrastructure required
Table 6. Infrastructure requirements
Description Limits
DC supply 20 V and 6 A maximum
DC supply maximum 20 V and 20 A maximum
Electronic DC-load (non-inductive) up to 20 A and 20 V
PV panel with cables to charge 70 W or 80 W
controller under test
Pre-charged 12 V lead-acid battery 20 Ah maximum
4-channel data logger two for voltages up to 20 V and two for currents up to
20 A
Current meter 1 A with 1 mA accuracy minimum; 0 A to 20 A
Oscilloscope to measure 500 ms time duration
PC/laptop with MS-Excel and other -
general purpose software packages

Table 7. System tests overview

See Table 5 for the test set-up abbreviation definitions.
Test Test description Set-up Expected result and behavior Time
(± min)
Functional
Boost and buck connect variable DC supply to PV SNB boost mode: when the input voltage 10
charging terminal and battery at 14 V to the is less than the battery voltage,
charge controller. Increase input voltage charging current flows to the battery
from 11 V to 19 V in steps of 2 V. buck mode: when the input voltage is
Measure input and output voltages and less than the battery voltage, charging
currents. current flows in to the battery
Standby current connect charge controller to the battery NB should be below 10 mA 10
without PV or load and measure battery
discharge current flowing into charge
controller.
MPP peak latching connect PV panel output to charge PNB the PV panel power should continue 30
controller and battery at 12 V to the to latch to the panel’s MPP under the
battery terminals. Measure input and given environmental conditions.
output voltages and currents through
data logger for 15 minutes minimum.
Plot input power (Watts) as a function of
time.
MPP tracking with repeat the above test with partial PNB the PV panel power should continue 30
shadowing shadowing of the panel (1⁄5th to 1⁄4th) to latch to the panel’s MPP under the
given environmental conditions.
Charging cycle connect DC power supply at 17 V and SNB battery charge cycle should be: 120
implementation 5 A, and pre-charged 20 Ah lead-acid CC mode: boost starts at 12.6 V
battery just below boost charge on and ends at 15.3 V.
voltage (12.4 V) to charge controller.
CV mode: float V = 13.6 V, battery
Charge battery at 4 A CC until float
light indication should be:
stage (fully charged) and track battery V
and I. Plot charging cycle to verify the green blinking: while charging
charging cycle control algorithm green on: battery is fully charged
functionality. Observe the battery and input supply present
indicator light status.
Battery status connect a DC supply with reverse battery light indication should be: 10
indication current blocking diode and minimal load green blinking: while charging
(to arrest any overshoot of inductor
green on: when battery is fully
voltage) at battery terminal of the
charged
charge controller. Connect load to the
load terminal. Increase voltage from yellow blinking: when battery is Low
10.8 V to 16 V and observe the battery (just above 10.8 V)
light status red: when battery voltage reaches
10.8 V and load is cut-off
Load status connect battery and electronic DC load NBE no indication until the load current is 20
indication to charge controller. Increase load within 12.5 A and red above 12.5 A
current from 0 A to 15 A and observe and load is cut-off
load indication lights.


(± min)
Protection
PV reverse current connect a DC voltage of 12 V to battery SNBE no current should flow into the load 20
flow prevention terminals on the charge controller with
no load at the load terminals. Connect
electronic DC load at PV terminals.
Decrease load from maximum to
minimum to simulate PV acting as load
to battery. Observe current flow to the
DC load.
Battery low load connect DC load to the charge controller NBE the load should be disconnected and 10
disconnection when and DC supply of 12 V to battery load light should turn red when battery
PV is not present terminals. Decrease DC supply voltage voltage is at 10.8 V
(MCU in standby) to below 10.8 V slowly. Observe load
status.
Battery low load connect DC load to the charge controller SNBE the load should be reconnected and 5
reconnection when and DC supply to battery terminals. load light should change from red to
PV is not present Increase supply from 12 V to 12.5 V off state at 12.2 V
(MCU in standby) slowly. Observe load status.
Battery low load connect DC load to the charge controller NBE the load should be disconnected and 5
disconnection when and DC supply of 12 V to battery the load light should turn red when
PV is present (MCU terminals. Decrease DC supply voltage battery voltage is at 10.8 V
active) to below 10.8 V slowly. Observe load
status.
Battery low load connect DC load to the charge controller NBE the load should be reconnected and 5
reconnection when and DC supply to battery terminals. load light should change from red to
PV is present (MCU Increase supply from 12 V to 12.5 V off-state at 12.2 V
active) slowly. Observe load status.
Load cut-off due to connect battery and electronic DC load NBE after 500 ms, the load should be 10
overload to charge controller and increase load disconnected and the load light
current to 8 A slowly. Connect should turn red
oscilloscope and observe load current
and voltage.
Efficiency
Converter efficiency connect DC supply and DC load to the SNE efficiency should be between 92 % 60
in buck-boost mode charge controller. Vary the input voltage minimum and 94 % maximum over
between 12 V and 20 V in such a way to the input range
set input power at 5 W intervals from
30 W to 80 W and note down output
voltage and current. Calculate efficiency
(output wattage/input wattage). Plot
efficiency as a function of input wattage.
Remark: This test can be run only if the
debug option is selected during the
initial setup.


(± min)
Converter efficiency DC supply and DC load to the charge SNE efficiency should be 98 % minimum 10
in buck mode controller. Make the system operate in
buck mode only through software. Vary
the input voltage between 12 V and
20 V in such a way to set input power at
5 W intervals from 0 W to 80 W and note
down output voltage and current.
Calculate efficiency (output
wattage/input wattage). Efficiency as a
function of input wattage.
Remark: This test can be run only if the
debug option is selected during the
initial setup.
Destructive
Battery reverse connect DC supply at 17 V and 3 A and NBE battery fuse should blow 10
connection battery in reverse (battery +ve to charge
protection controller −ve and vice versa) polarity to
(destructive) charge controller.
Load cut-off due to connect 13.8 V supply to battery NBE load should be cut-off, fuse should 10
short-circuit terminals. Short the load terminals and blow and red light should glow
(destructive) observe load and load side fuse.
Miscellaneous such as the explanation, - - 60
Q & A during testing
Total duration 435
9. Benchmarking strategy
The MPPT charge controller reference system was benchmarked against the best charge
controllers on the market.
Two identical test set-ups were made
• one for an MPT612-based MPPT charge controller reference design

• the other for the charge controller against which the reference design is bench
marked
Benchmarking was also done for two types of panels:
• PMPP = 80 W, VMPP = 17 V, IMPP = 4.71 A, Isc = 5.39 A and VOC = 21.20 V at STC
• PMPP = 70 W, VMPP = 17 V, IMPP = 4.12 A, Isc = 4.72 A and VOC = 21.20 V at STC
70 Ah, 12 V, lead-acid battery was used in all the set-ups. A data logger was used for
recording PV voltage/current and battery voltage/current.
Benchmarking criteria/parameters were as follows:
• Cumulative ampere hour (Ah) flowing into the battery from the charge controllers
under identical environmental and experimental test conditions
• Percentage difference in Ah of the charge controllers

10. System test and benchmarking results

All the system tests mentioned in Table 7 were performed and the expected results
obtained.
The benchmarking results were captured and Figure 15 shows the enhanced
performance provided by the MPT612-based MPPT charge controller reference board
when compared to other charge controllers on the market.
16.0 (1)
VBAT
(V) 15.5
(2)
15.0 (3)
14.5
(4)
14.0
13.5
13.0 (5)
12.5
12.0
12:00 14:00 16:00 18:00
Time (h)
019aaa209
(1) PV MPP.
(2) NXP MPPT charge controller reference design under battery voltage.
(3) MPPT charge controllers available on the market.
(4) Non-MPPT charge controllers available on the market under voltage.
(5) MPPT charge controllers on the market do not charge the battery with the highest available current
for about 2 hours when PV power is available.
Fig 15. Benchmarking results
11. Steps for evaluating the charge controller reference system

This section describes the steps needed to evaluate the charge controller reference
system. The reference system has a sample charge controller application programmed in
to the MPT612’s flash memory. This sample charge controller application conforms to the
parameters set in Table 2 on page 9.
11.1 Testing functionality

The charge controller board can be used to run all the tests in Table 6 “Infrastructure
requirements” on page 31 except the open-loop efficiency tests. The set of steps is as
follows:
1. Connect the external load terminal to the L1+/L2+ and L1−/L2− terminals of the
reference system ensuring correct polarity.

2. Connect 12 V battery terminal to the BAT+ and BAT− terminals of the reference
system ensuring correct polarity. The battery should meet the specification described
in Section 4.1 on page 9.
3. Connect PV input to the PV+ and PV− terminal of MPT612 reference board. The PV
should conform to the specification described in Section 4.1 on page 9.
4. The system function is indicated by the LEDs D16, D17 and D18. Table 8 shows the
LED status for different system functions.
5. When the PV terminals are connected, the system starts booting, indicated by the
LEDs D16, D17 and D18 (if sufficient PV power is available).
6. Measure PV voltage, PV current, battery voltage and battery current, using a
multi-meter. The values will vary depending on the maximum power generated from
the PV panel.
7. When sufficient PV power is available, the charge controller tracks the MPP, charges
the battery and supplies power to the loads after 10 s.
Table 8. LED status indications

Indication Value
Green on battery is charging
Green blinking battery fully charged
Yellow blinking battery is low
Red on battery low, cut-off or overload cut-off
All LEDs off system is in standby
11.2 Testing open loop efficiency

The JTAG/UART add-on board is needed for the open-loop efficiency tests. The steps are
as follows:
1. Connect JTAG/UART add-on board to the charge controller board’s J6 port.

2. Connect UART DB9 connector of the COM port of the PC to J10 of the JTAG/UART
add-on board.
3. Open a terminal application on the PC (HyperTerminal or TeraTerm) and configure the
following settings in that application:
a. Baud rate = 38400
b. Data bits = 8
c. Stop bits = 1
d. Flow control = None
e. Parity = None
4. Connect the external load terminal to the L1+/L2+ and L1−/L2− terminals of the
reference system ensuring the correct polarity.
5. Connect 12 V battery terminal to the BAT+ and BAT− terminals of the reference
system ensuring the correct polarity. The battery should meet the specification
described in Section 4.1 on page 9.
6. Connect PV input to the PV+ and PV− terminal of MPT612 reference board. The PV
should meet the specification described in Section 4.1 on page 9.

7. The application, present in the charge controller board waits for 10 seconds for a key
to be pressed on the console:
a. When a key is pressed, it displays a menu on the console for the open-loop
efficiency tests. The user can see the results on the console.
b. When a key is not pressed, the charge controller functionality is executed.
8. The system function is indicated by the LEDs D16, D17 and D18. Table 8 shows the
LED status for different system functions.
9. When the PV terminals are connected, the system starts booting, indicated by LEDs
D16, D17 and D18 (if there is sufficient PV power is available).
10. Measure the PV voltage, PV current, battery voltage and battery current, using a
multi-meter. The values will vary depending on the maximum power generated by the
PV panel.
11. When sufficient PV power is available, the output of the sample charge controller
application program is displayed on the PC’s terminal application (HyperTerminal or
TeraTerm).
Remark: The following output is only a sample and can differ from system to system. In
addition, the connected PV, battery and load parameters will have an effect on the
displayed values.
1
2 *******************************************
3 MPT612 Sample Charge controller Application
4 v1.0
5 *******************************************
6
7 SWCONV_BOOST
8 Waiting for minimum power to be present.........................
9 Scanning => full
10 Prtrb
11
12 *MPP LATCHED: Vmpp(mV) = 16101
13
14 Prtrb
15
17 Prtrb
18
20
21 SWCONV_BUCK
22 Prtrb
23
25 Prtrb
26
28 Prtrb
29

31 Prtrb
32
34 Prtrb
12. Steps to link and test new applications

This section describes the steps to be performed to link the libraries delivered with the
charge controller reference system and how to program the final application in to the
system.
The MPT612 software bundle is extracted in C:\. The following directory structure is
created as described in the MPT612 user manual.
019aaa250
Fig 16. MPT612 software bundle directory structure
The steps below must be followed to link and test a new application:
1. Create a directory C:\MPT612_NewApp

2. Open KEIL uVision4.
3. In KEIL uVision4 IDE, select “Project->New uVision Project..”.
a. Select C:\MPT612_NewApp directory and enter a new project name as
“MPT612_NewApp” and press “Save” button.
4. In the window displayed select “NXP->MPT612” device and press “OK” button.
5. Press “NO” to include the startup code to project folder in the window displayed.
6. In the project window, right-click on “Target 1” and select “Add group” and enter
“MPT612SW” and press “Enter”

7. Double-click on “MPT612SW”. In the window displayed, browse to

“C:\MPT612_nxLibMpt_vXX.YY\pub\src\nxLibMpt_Hfal_Startup”, select all the
files and press “Add” button.
8. Add the library files present in “C:\MPT612_nxLibMpt_vXX.YY\pub\cfg” directory.
9. Add the library files present in “C:\MPT612_nxLibMpt_vXX.YY\pub\lib” directory
after selecting your flavor (DEBUG mode or RETAIL mode).
a. Now add sysparams files present in
“C:\MPT612_nxLibMpt_vXX.YY\app\mpt612rb_SysParams\
src\mpt612cc_Params.c” file.
10. Add the new application files onto the project workspace by repeating steps 6 and 7.
11. Select “Project -> Options for Target ‘Target 1’”.
12. In the window displayed, select “Output” tab and select “Create Executable” and
select “Create HEX file”.
13. In the window displayed, select “C/C++” tab and enter in as
“C:\MPT612_nxLibMpt_vXX.YY\pub\inc,C:\MPT612_nxLibMpt_vXX.YY\app\
mpt612rb_SysParams\inc”.
14. In the window displayed, select “Linker” tab and deselect “Use memory layout from
target dialog”. Then select
“C:\MPT612_nxLibMpt_vXX.YY\pub\src\nxLibMpt_Hfal_Startup\nxLibMpt_Hfal_
Startup.ld” file for “Scatter file” and press “OK”
15. Now select “Project -> Build Target” to build the application.
16. When it is successfully built, a hex file is created.
“C:\MPT612_NewApp\MPT612_NewApp.hex” which is the hex file that should be
downloaded onto the charge controller reference system by selecting
“Flash->Download” option.
17. Alternatively you can use the FlashMagic tool to program the .hex file on the MPT612
reference board.
Remark: Once the new application is downloaded onto the flash, it will erase the previous
application in the flash which then cannot be retrieved.
Remark: The flash should be configured in Target options, please refer to the KEIL
uVision4 documentation.
18. To program the MPT612 IC using FlashMagic (ISP way of programming), J11 and J13
should be closed. When the application has been programmed, remove J11 and J13
and press “RESET” on the MPT612 reference board to execute the application.
19. To program the MPT612 IC using KEIL uVision4, J9 should be closed. After
programming the MPT612 IC, press “RESET” on the MPT612 reference board and
check that your application executes.

13. Abbreviations
Table 9. Abbreviations
Acronym Description
ADC Analog-to-Digital Converter
API Application Programming Interface
ESR Equivalent Series Resistance
FIFO First In, First Out
GPIO General Purpose Input/Output
I2C Inter-Integrated Circuit
IRQ Interrupt Request
ISP In-System Programming
LDO Low DropOut regulator
MCU MicroController Unit
MOV Metal-Oxide Varistor
MPPT Maximum Power Point Tracking
NTC Negative Temperature Coefficient
PLL Phase-Locked Loop
PV PhotoVoltaic
PWM Pulse-Width Modulator
RISC Reduced Instruction Set Computer
SMD Surface Mounted Device
SPI Serial Peripheral Interface
SRAM Static Random Access Memory
SSP Synchronous Serial Port
STC Standard Test Conditions
UART Universal Asynchronous Receiver/Transmitter

14. Legal information
14.1 Definitions design. It is customer’s sole responsibility to determine whether the NXP
Semiconductors product is suitable and fit for the customer’s applications and
products planned, as well as for the planned application and use of
Draft — The document is a draft version only. The content is still under
customer’s third party customer(s). Customers should provide appropriate
internal review and subject to formal approval, which may result in
design and operating safeguards to minimize the risks associated with their
modifications or additions. NXP Semiconductors does not give any
applications and products.
representations or warranties as to the accuracy or completeness of
information included herein and shall have no liability for the consequences of NXP Semiconductors does not accept any liability related to any default,
use of such information. damage, costs or problem which is based on any weakness or default in the
customer’s applications or products, or the application or use by customer’s
third party customer(s). Customer is responsible for doing all necessary
14.2 Disclaimers testing for the customer’s applications and products using NXP
Semiconductors products in order to avoid a default of the applications and
the products or of the application or use by customer’s third party
Limited warranty and liability — Information in this document is believed to
customer(s). NXP does not accept any liability in this respect.
be accurate and reliable. However, NXP Semiconductors does not give any
representations or warranties, expressed or implied, as to the accuracy or Export control — This document as well as the item(s) described herein
completeness of such information and shall have no liability for the may be subject to export control regulations. Export might require a prior
consequences of use of such information. authorization from national authorities.
In no event shall NXP Semiconductors be liable for any indirect, incidental, Evaluation products — This product is provided on an “as is” and “with all
punitive, special or consequential damages (including - without limitation - lost faults” basis for evaluation purposes only. NXP Semiconductors, its affiliates
profits, lost savings, business interruption, costs related to the removal or and their suppliers expressly disclaim all warranties, whether express, implied
replacement of any products or rework charges) whether or not such or statutory, including but not limited to the implied warranties of
damages are based on tort (including negligence), warranty, breach of non-infringement, merchantability and fitness for a particular purpose. The
contract or any other legal theory. entire risk as to the quality, or arising out of the use or performance, of this
Notwithstanding any damages that customer might incur for any reason product remains with customer.
whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards In no event shall NXP Semiconductors, its affiliates or their suppliers be liable
customer for the products described herein shall be limited in accordance to customer for any special, indirect, consequential, punitive or incidental
with the Terms and conditions of commercial sale of NXP Semiconductors. damages (including without limitation damages for loss of business, business
Right to make changes — NXP Semiconductors reserves the right to make interruption, loss of use, loss of data or information, and the like) arising out
changes to information published in this document, including without the use of or inability to use the product, whether or not based on tort
limitation specifications and product descriptions, at any time and without (including negligence), strict liability, breach of contract, breach of warranty or
notice. This document supersedes and replaces all information supplied prior any other theory, even if advised of the possibility of such damages.
to the publication hereof. Notwithstanding any damages that customer might incur for any reason
whatsoever (including without limitation, all damages referenced above and
Suitability for use — NXP Semiconductors products are not designed,
all direct or general damages), the entire liability of NXP Semiconductors, its
authorized or warranted to be suitable for use in life support, life-critical or
affiliates and their suppliers and customer’s exclusive remedy for all of the
safety-critical systems or equipment, nor in applications where failure or
foregoing shall be limited to actual damages incurred by customer based on
malfunction of an NXP Semiconductors product can reasonably be expected
reasonable reliance up to the greater of the amount actually paid by customer
to result in personal injury, death or severe property or environmental
for the product or five dollars (US$5.00). The foregoing limitations, exclusions
damage. NXP Semiconductors accepts no liability for inclusion and/or use of
and disclaimers shall apply to the maximum extent permitted by applicable
NXP Semiconductors products in such equipment or applications and
law, even if any remedy fails of its essential purpose.
therefore such inclusion and/or use is at the customer’s own risk.
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. NXP Semiconductors makes no 14.3 Trademarks
representation or warranty that such applications will be suitable for the
specified use without further testing or modification. Notice: All referenced brands, product names, service names and trademarks
are the property of their respective owners.
Customers are responsible for the design and operation of their applications
and products using NXP Semiconductors products, and NXP Semiconductors I2C-bus — logo is a trademark of NXP B.V.
accepts no liability for any assistance with applications or customer product

15. Contents
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 11 Steps for evaluating the charge controller
1.1 Solar photovoltaic energy and maximum reference system. . . . . . . . . . . . . . . . . . . . . . . 35
power point . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 11.1 Testing functionality . . . . . . . . . . . . . . . . . . . . 35
1.2 Solar charge controller . . . . . . . . . . . . . . . . . . . 4 11.2 Testing open loop efficiency . . . . . . . . . . . . . . 36
2 MPT612 IC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 12 Steps to link and test new applications . . . . 38
3 MPT612 software . . . . . . . . . . . . . . . . . . . . . . . . 7 13 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 40
3.1 Software memory size . . . . . . . . . . . . . . . . . . . 8 14 Legal information . . . . . . . . . . . . . . . . . . . . . . 41
4 MPPT charge controller reference system . . . 9 14.1 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.1 System specifications . . . . . . . . . . . . . . . . . . . . 9 14.2 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 41
4.2 MPPT charge controller reference system 14.3 Trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 41
block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 15 Contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
5 Schematics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.1 Charge controller reference system boards . . 12
5.1.1 Charge controller board . . . . . . . . . . . . . . . . . 12
5.1.2 JTAG/UART add-on board . . . . . . . . . . . . . . . 14
5.2 Charge controller reference system; major
circuit blocks . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.2.1 PV voltage and current sense circuit . . . . . . . 15
5.2.2 Battery voltage and current circuit . . . . . . . . . 16
5.2.3 DC-DC buck-boost converter power
electronics circuit . . . . . . . . . . . . . . . . . . . . . . 18
5.2.4 MPT612 digital circuit . . . . . . . . . . . . . . . . . . . 19
5.2.5 Charge controller board power supply circuit . 21
5.2.6 JTAG/UART add-on board circuit diagram . . . 22
6 Charge controller reference system bill of
materials . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.1 Charge controller board Bill Of Materials
(BOM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
6.2 JTAG/UART add-on board Bill Of Materials
(BOM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7 Component selection . . . . . . . . . . . . . . . . . . . 26
7.1 PV System parameters. . . . . . . . . . . . . . . . . . 26
7.2 Major components . . . . . . . . . . . . . . . . . . . . . 26
7.2.1 Frequency of DC-DC converter operation . . . 27
7.2.2 Inductor. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.2.3 Input bulk capacitor. . . . . . . . . . . . . . . . . . . . . 27
7.2.4 Switching MOSFET . . . . . . . . . . . . . . . . . . . . 28
7.2.5 Output diode . . . . . . . . . . . . . . . . . . . . . . . . . . 28
7.2.6 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . 28
7.2.7 Thermal pads . . . . . . . . . . . . . . . . . . . . . . . . . 29
7.2.7.1 Thermal pad for D2PACK diode . . . . . . . . . . . 29
7.2.7.2 MOSFET thermal pad calculation. . . . . . . . . . 30
8 System test plan . . . . . . . . . . . . . . . . . . . . . . . 31
9 Benchmarking strategy . . . . . . . . . . . . . . . . . . 34
10 System test and benchmarking results . . . . . 35
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010. All rights reserved.

For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: salesaddresses@nxp.com
Date of release: 2 September 2010
Document identifier: AN10936

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AN10936

Photovoltaic MPPT battery charge controller using the

Application note Rev. 1 — 2 September 2010 2 of 42

1.1 Solar photovoltaic energy and maximum power point

Typical solar cells comprise a PN junction made of a semiconductor material such as

A solar PV panel has the current/voltage/power characteristics shown in Figure 1.

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1.2 Solar charge controller

• To directly power a DC load

This application note focuses on charging batteries from a PV panel using an

Typically a charge controller performs the following basic functions:

A simplified illustration of a solar battery charging system is shown in Figure 2.

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PV voltage sense PV VOLTAGE PV CONFIGURATION

PV current sense PV CURRENT

battery current sense BATTERY CURRENT BATTERY BATTERY

temperature sense TEMPERATURE

load current sense LOAD CURRENT

these blocks are needed for MPPT functionality

these blocks can be used for customer specific application

Fig 3. MPT612 block diagram

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SAMPLE CHARGE CONTROLLER AND LOAD CONTROL APPLICATION

SAFETY STATUS BUCK-BOOST DATA

SAMPLE APPLICATION 2 LEAD-ACID BATTERY CHARGING MODULE

HARDWARE FUNCTIONAL ABSTRACTION LAYER (HFAL)

SYSTEM HARDWARE MPT612 IC

Required for MPPT functionality

Sample application programs 019aaa378

Fig 4. MPT612 block diagram

The MPT612’s software consists of the following:

• Hardware Functional Abstraction Layer:

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3.1 Software memory size

[1] 1 kB is allocated for stack, which may be reduced.

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4. MPPT charge controller reference system

4.1 System specifications

Table 2. MPPT charge controller reference design specifications

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Table 2. MPPT charge controller reference design specifications …continued

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4.2 MPPT charge controller reference system block

MPPT charge controller

Fig 5. MPPT charge controller reference system block diagram

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5.1 Charge controller reference system boards

Fig 6. Charge controller reference system

5.1.1 Charge controller board

The charge controller board is shown in Figure 7.

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5.1.2 JTAG/UART add-on board

The JTAG/UART add-on board is shown in Figure 8.

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5.2 Charge controller reference system; major circuit blocks

• PV voltage and current sense circuit

5.2.1 PV voltage and current sense circuit

Accurate measurement of PV current is important for latching to the maximum power

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a. PV voltage sense circuit

b. PV current sense circuit