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Colour Television Chassis
Q548.1E
LA
18560_000_090401.eps
090401
©
Copyright 2009 Koninklijke Philips Electronics N.V.
All rights reserved. No part of this publication may be reproduced, stored in a
retrieval system or transmitted, in any form or by any means, electronic, mechanical,
photocopying, or otherwise without the prior permission of Philips.
Published by ER/TY 0964 BU TV Consumer Care, the Netherlands Subject to modification EN 3122 785 18560
2009-Apr-03
EN 2 1. Q548.1E LA Revision List
1. Revision List
Manual xxxx xxx xxxx.0
• First release.
Notes:
• Figures can deviate due to the different set executions.
• Specifications are indicative (subject to change).
For on-line product support please use the links in Table 2-1.
Here is product information available, as well as getting started,
user manuals, frequently asked questions and software &
drivers.
2009-Apr-03
Technical Specifications and Connections Q548.1E LA 2. EN 3
2.3 Connections
1 11 10 9
19-22” AUDIO SPDIF EXT 2 EXT 1
3
12
4
VGA
6
AUDIO IN :
LEFT / RIGHT
HDMI 1 / DVI HDMI 3
HDMI 2 / DVI
7 HDMI 3 / DVI
VGA
13
8 EXT 3 HDMI 2 HDMI 1
TV ANTENNA
14 15 16
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Note: The following connector colour abbreviations are used 3 - S-Video (Hosiden): Video Y/C - In
(according to DIN/IEC 757): Bk= Black, Bu= Blue, Gn= Green, 1 - Ground Y Gnd H
Gy= Grey, Rd= Red, Wh= White, Ye= Yellow. 2 - Ground C Gnd H
3 - Video Y 1 VPP / 75 Ω j
2.3.1 Side Connections 4 - Video C 0.3 VPP / 75 Ω j
2009-Apr-03
EN 4 2. Q548.1E LA Technical Specifications and Connections
9 - EXT1 & 2: Video RGB - In, CVBS - In/Out, Audio - In/Out 13 - Mini Jack: Audio - In
Wh - Audio L 0.5 VRMS / 10 kΩ jo
20 2 Rd - Audio R 0.5 VRMS / 10 kΩ jo
2009-Apr-03
Precautions, Notes, and Abbreviation List Q548.1E LA 3. EN 5
• All ICs and many other semiconductors are susceptible to Due to lead-free technology some rules have to be respected
electrostatic discharges (ESD w). Careless handling by the workshop during a repair:
during repair can reduce life drastically. Make sure that, • Use only lead-free soldering tin. If lead-free solder paste is
during repair, you are connected with the same potential as required, please contact the manufacturer of your soldering
the mass of the set by a wristband with resistance. Keep equipment. In general, use of solder paste within
components and tools also at this same potential. workshops should be avoided because paste is not easy to
• Be careful during measurements in the high voltage store and to handle.
section. • Use only adequate solder tools applicable for lead-free
• Never replace modules or other components while the unit soldering tin. The solder tool must be able:
is switched “on”. – To reach a solder-tip temperature of at least 400°C.
• When you align the set, use plastic rather than metal tools. – To stabilize the adjusted temperature at the solder-tip.
This will prevent any short circuits and the danger of a – To exchange solder-tips for different applications.
circuit becoming unstable. • Adjust your solder tool so that a temperature of around
360°C - 380°C is reached and stabilized at the solder joint.
Heating time of the solder-joint should not exceed ~ 4 sec.
3.3 Notes Avoid temperatures above 400°C, otherwise wear-out of
tips will increase drastically and flux-fluid will be destroyed.
3.3.1 General To avoid wear-out of tips, switch “off” unused equipment or
reduce heat.
• Measure the voltages and waveforms with regard to the • Mix of lead-free soldering tin/parts with leaded soldering
chassis (= tuner) ground (H), or hot ground (I), depending tin/parts is possible but PHILIPS recommends strongly to
on the tested area of circuitry. The voltages and waveforms avoid mixed regimes. If this cannot be avoided, carefully
shown in the diagrams are indicative. Measure them in the clear the solder-joint from old tin and re-solder with new tin.
Service Default Mode with a colour bar signal and stereo
sound (L: 3 kHz, R: 1 kHz unless stated otherwise) and
2009-Apr-03
EN 6 3. Q548.1E LA Precautions, Notes, and Abbreviation List
It should be noted that on the European Service website, 0/6/12 SCART switch control signal on A/V
“Alternative BOM” is referred to as “Design variant”. board. 0 = loop through (AUX to TV),
6 = play 16 : 9 format, 12 = play 4 : 3
The third digit in the serial number (example: format
AG2B0335000001) indicates the number of the alternative AARA Automatic Aspect Ratio Adaptation:
B.O.M. (Bill Of Materials) that has been used for producing the algorithm that adapts aspect ratio to
specific TV set. In general, it is possible that the same TV remove horizontal black bars; keeps
model on the market is produced with e.g. two different types the original aspect ratio
of displays, coming from two different suppliers. This will then ACI Automatic Channel Installation:
result in sets which have the same CTN (Commercial Type algorithm that installs TV channels
Number; e.g. 28PW9515/12) but which have a different B.O.M. directly from a cable network by
number. means of a predefined TXT page
By looking at the third digit of the serial number, one can ADC Analogue to Digital Converter
identify which B.O.M. is used for the TV set he is working with. AFC Automatic Frequency Control: control
If the third digit of the serial number contains the number “1” signal used to tune to the correct
(example: AG1B033500001), then the TV set has been frequency
manufactured according to B.O.M. number 1. If the third digit is AGC Automatic Gain Control: algorithm that
a “2” (example: AG2B0335000001), then the set has been controls the video input of the feature
produced according to B.O.M. no. 2. This is important for box
ordering the correct spare parts! AM Amplitude Modulation
For the third digit, the numbers 1...9 and the characters A...Z AP Asia Pacific
can be used, so in total: 9 plus 26= 35 different B.O.M.s can be AR Aspect Ratio: 4 by 3 or 16 by 9
indicated by the third digit of the serial number. ASF Auto Screen Fit: algorithm that adapts
aspect ratio to remove horizontal black
Identification: The bottom line of a type plate gives a 14-digit bars without discarding video
serial number. Digits 1 and 2 refer to the production centre (e.g. information
AG is Bruges), digit 3 refers to the B.O.M. code, digit 4 refers ATSC Advanced Television Systems
to the Service version change code, digits 5 and 6 refer to the Committee, the digital TV standard in
production year, and digits 7 and 8 refer to production week (in the USA
example below it is 2006 week 17). The 6 last digits contain the ATV See Auto TV
serial number. Auto TV A hardware and software control
system that measures picture content,
MADE IN BELGIUM and adapts image parameters in a
MODEL : 32PF9968/10
220-240V ~ 50/60Hz dynamic way
128W AV External Audio Video
PROD.NO: AG 1A0617 000001 VHF+S+H+UHF AVC Audio Video Controller
S BJ3.0E LA AVIP
B/G
Audio Video Input Processor
Monochrome TV system. Sound
10000_024_090121.eps carrier distance is 5.5 MHz
090121
BLR Board-Level Repair
BTSC Broadcast Television Standard
Figure 3-1 Serial number (example) Committee. Multiplex FM stereo sound
system, originating from the USA and
3.3.7 Board Level Repair (BLR) or Component Level Repair used e.g. in LATAM and AP-NTSC
(CLR) countries
B-TXT Blue TeleteXT
If a board is defective, consult your repair procedure to decide C Centre channel (audio)
if the board has to be exchanged or if it should be repaired on CEC Consumer Electronics Control bus:
component level. remote control bus on HDMI
If your repair procedure says the board should be exchanged connections
completely, do not solder on the defective board. Otherwise, it CL Constant Level: audio output to
cannot be returned to the O.E.M. supplier for back charging! connect with an external amplifier
CLR Component Level Repair
3.3.8 Practical Service Precautions ComPair Computer aided rePair
CP Connected Planet / Copy Protection
CSM Customer Service Mode
• It makes sense to avoid exposure to electrical shock.
CTI Color Transient Improvement:
While some sources are expected to have a possible
manipulates steepness of chroma
dangerous impact, others of quite high potential are of
transients
limited current and are sometimes held in less regard.
CVBS Composite Video Blanking and
• Always respect voltages. While some may not be
Synchronization
dangerous in themselves, they can cause unexpected
DAC Digital to Analogue Converter
reactions that are best avoided. Before reaching into a
DBE Dynamic Bass Enhancement: extra
powered TV set, it is best to test the high voltage insulation.
low frequency amplification
It is easy to do, and is a good service precaution.
DDC See “E-DDC”
D/K Monochrome TV system. Sound
carrier distance is 6.5 MHz
DFI Dynamic Frame Insertion
DFU Directions For Use: owner's manual
DMR Digital Media Reader: card reader
DMSD Digital Multi Standard Decoding
DNM Digital Natural Motion
2009-Apr-03
Precautions, Notes, and Abbreviation List Q548.1E LA 3. EN 7
DNR Digital Noise Reduction: noise uses 8 bit or 10 bit data words, and has
reduction feature of the set a maximum data rate of 270 Mbit/s,
DRAM Dynamic RAM with a minimum bandwidth of 135
DRM Digital Rights Management MHz.
DSP Digital Signal Processing ITV Institutional TeleVision; TV sets for
DST Dealer Service Tool: special remote hotels, hospitals etc.
control designed for service LS Last Status; The settings last chosen
technicians by the customer and read and stored
DTCP Digital Transmission Content in RAM or in the NVM. They are called
Protection; A protocol for protecting at start-up of the set to configure it
digital audio/video content that is according to the customer's
traversing a high speed serial bus, preferences
such as IEEE-1394 LATAM Latin America
DVB-C Digital Video Broadcast - Cable LCD Liquid Crystal Display
DVB-T Digital Video Broadcast - Terrestrial LED Light Emitting Diode
DVD Digital Versatile Disc L/L' Monochrome TV system. Sound
DVI(-d) Digital Visual Interface (d= digital only) carrier distance is 6.5 MHz. L' is Band
E-DDC Enhanced Display Data Channel I, L is all bands except for Band I
(VESA standard for communication LPL LG.Philips LCD (supplier)
channel and display). Using E-DDC, LS Loudspeaker
the video source can read the EDID LVDS Low Voltage Differential Signalling
information form the display. Mbps Mega bits per second
EDID Extended Display Identification Data M/N Monochrome TV system. Sound
(VESA standard) carrier distance is 4.5 MHz
EEPROM Electrically Erasable and MIPS Microprocessor without Interlocked
Programmable Read Only Memory Pipeline-Stages; A RISC-based
EMI Electro Magnetic Interference microprocessor
EPLD Erasable Programmable Logic Device MOP Matrix Output Processor
EU Europe MOSFET Metal Oxide Silicon Field Effect
EXT EXTernal (source), entering the set by Transistor, switching device
SCART or by cinches (jacks) MPEG Motion Pictures Experts Group
FDS Full Dual Screen (same as FDW) MPIF Multi Platform InterFace
FDW Full Dual Window (same as FDS) MUTE MUTE Line
FLASH FLASH memory NC Not Connected
FM Field Memory or Frequency NICAM Near Instantaneous Compounded
Modulation Audio Multiplexing. This is a digital
FPGA Field-Programmable Gate Array sound system, mainly used in Europe.
FTV Flat TeleVision NTC Negative Temperature Coefficient,
Gb/s Giga bits per second non-linear resistor
G-TXT Green TeleteXT NTSC National Television Standard
H H_sync to the module Committee. Color system mainly used
HD High Definition in North America and Japan. Color
HDD Hard Disk Drive carrier NTSC M/N= 3.579545 MHz,
HDCP High-bandwidth Digital Content NTSC 4.43= 4.433619 MHz (this is a
Protection: A “key” encoded into the VCR norm, it is not transmitted off-air)
HDMI/DVI signal that prevents video NVM Non-Volatile Memory: IC containing
data piracy. If a source is HDCP coded TV related data such as alignments
and connected via HDMI/DVI without O/C Open Circuit
the proper HDCP decoding, the OSD On Screen Display
picture is put into a “snow vision” mode OTC On screen display Teletext and
or changed to a low resolution. For Control; also called Artistic (SAA5800)
normal content distribution the source P50 Project 50: communication protocol
and the display device must be between TV and peripherals
enabled for HDCP “software key” PAL Phase Alternating Line. Color system
decoding. mainly used in West Europe (color
HDMI High Definition Multimedia Interface carrier= 4.433619 MHz) and South
HP HeadPhone America (color carrier PAL M=
I Monochrome TV system. Sound 3.575612 MHz and PAL N= 3.582056
carrier distance is 6.0 MHz MHz)
I2 C Inter IC bus PCB Printed Circuit Board (same as “PWB”)
I2D Inter IC Data bus PCM Pulse Code Modulation
I2S Inter IC Sound bus PDP Plasma Display Panel
IF Intermediate Frequency PFC Power Factor Corrector (or Pre-
IR Infra Red conditioner)
IRQ Interrupt Request PIP Picture In Picture
ITU-656 The ITU Radio communication Sector PLL Phase Locked Loop. Used for e.g.
(ITU-R) is a standards body FST tuning systems. The customer
subcommittee of the International can give directly the desired frequency
Telecommunication Union relating to POD Point Of Deployment: a removable
radio communication. ITU-656 (a.k.a. CAM module, implementing the CA
SDI), is a digitized video format used system for a host (e.g. a TV-set)
for broadcast grade video. POR Power On Reset, signal to reset the uP
Uncompressed digital component or PTC Positive Temperature Coefficient,
digital composite signals can be used. non-linear resistor
The SDI signal is self-synchronizing, PWB Printed Wiring Board (same as “PCB”)
2009-Apr-03
EN 8 3. Q548.1E LA Precautions, Notes, and Abbreviation List
2009-Apr-03
Mechanical Instructions Q548.1E LA 4. EN 9
4. Mechanical Instructions
Index of this chapter: Notes:
4.1 Cable Dressing • Figures below can deviate slightly from the actual situation,
4.2 Service Positions due to the different set executions.
4.3 Assy/Panel Removal
4.4 Set Re-assembly
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2009-Apr-03
EN 10 4. Q548.1E LA Mechanical Instructions
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Mechanical Instructions Q548.1E LA 4. EN 11
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EN 12 4. Q548.1E LA Mechanical Instructions
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Mechanical Instructions Q548.1E LA 4. EN 13
1
3
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The foam bars (order code 3122 785 90580 for two pieces) can 4.3.4 Main Supply Panel
be used for all types and sizes of Flat TVs.
See figure Figure 4-9 for details. Sets with a display of 42" and 1. Unplug all connectors.
larger, require four foam bars [1]. Ensure that the foam bars 2. Remove the fixation screws.
are always supporting the cabinet and never only the display. 3. Take the board out.
Caution: Failure to follow these guidelines can seriously When defective, replace the whole unit.
damage the display!
By laying the TV face down on the (ESD protective) foam bars,
4.3.5 IR & LED Board / Stand Support
a stable situation is created to perform measurements and
alignments. By placing a mirror under the TV, you can monitor
the screen. Refer to Figure 4-11 for details.
4.3.2 Speakers
Figure 4-11 IR & LED Board / Stand Support
Each speaker unit is mounted with two screws.
1. Remove the stand.
When defective, replace the whole unit.
2. Remove the IR/LED cover [1].
3. Remove the connectors on the IR/LED board.
4.3.3 Ambi Light 4. Remove the fixation screws from the IR/LED board.
When defective, replace the whole unit.
Each Ambi Light unit is mounted on a subframe. Refer to
Figure 4-10 for details.
2009-Apr-03
EN 14 4. Q548.1E LA Mechanical Instructions
1 1
6 6
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Mechanical Instructions Q548.1E LA 4. EN 15
8 8
8
8
8 8 8 8
7
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Notes:
• While re-assembling, make sure that all cables are placed
and connected in their original position.
See Figure 4-1, Figure 4-2 and Figure 4-3
• Pay special attention not to damage the EMC foams in the
set. Ensure that EMC foams are mounted correctly.
2009-Apr-03
EN 16 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding
Note: For the new model range, a new remote control (RC) is
used with some renamed buttons. This has an impact on the
activation of the Service modes. For instance the old “MENU”
button is now called “HOME” (or is indicated by a “house” icon).
18440_200_090225.eps
5.2.1 Service Default Mode (SDM) 090306
2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 17
5.2.2 Service Alignment Mode (SAM) for the options can be found in chapter 8 “Alignments”) or
a method via a standard RC (described below).
Purpose Changing the display option via a standard RC: Key in the
• To perform (software) alignments. code “062598” directly followed by the “MENU” (or HOME)
• To change option settings. button and “XXX” (where XXX is the 3 digit decimal display
• To easily identify the used software version. code as mentioned in Table 6-4. Make sure to key in all three
• To view operation hours. digits, also the leading zero’s. If the above action is successful,
• To display (or clear) the error code buffer. the front LED will go out as an indication that the RC sequence
was correct. After the display option is changed in the NVM, the
TV will go to the Stand-by mode. If the NVM was corrupted or
How to Activate SAM
empty before this action, it will be initialized first (loaded with
Via a standard RC transmitter: key in the code “062596”
directly followed by the “INFO” or “I+” button. After activating default values). This initializing can take up to 20 seconds.
SAM with this method a service warning will appear on the
screen, continue by pressing the red button on the RC.
27mm
• AAAA= the chassis name, where “a” indicates the MODEL:
32PF9968/10
2009-Apr-03
EN 18 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding
all menu items fit on the screen, move the “CURSOR UP/ • Production Code. Displays the production code (the serial
DOWN” key to display the next/previous menu items. number) of the TV. Note that if an NVM is replaced or is
• With the “CURSOR LEFT/RIGHT” keys (or the scroll initialized after corruption, this production code has to be
wheel), it is possible to: re-written to NVM. ComPair will foresee a in possibility to
– (De) activate the selected menu item. do this.
– (De) activate the selected sub menu. • Installed date. Indicates the date of the first installation of
• With the “OK” key, it is possible to activate the selected the TV. This date is acquired via time extraction.
action. • Options 1. Gives the option codes of option group 1 as set
in SAM (Service Alignment Mode).
How to Exit SAM • Options 2. Gives the option codes of option group 2 as set
Use one of the following methods: in SAM (Service Alignment Mode).
• Switch the set to STAND-BY via the RC-transmitter. • 12NC SSB. Gives an identification of the SSB as stored in
• Via a standard RC-transmitter, key in “00” sequence, or NVM. Note that if an NVM is replaced or is initialized after
select the “BACK” key. corruption, this identification number has to be re-written to
NVM. ComPair will foresee in a possibility to do this. This
5.2.3 Customer Service Mode (CSM) identification number is the 12nc number of the SSB.
Remark: the content here can also be a part of the 12NC of
the SSB in combination with the serial number.
Purpose
• 12NC display. Shows the 12NC of the display
When a customer is having problems with his TV-set, he can
• 12NC supply. Shows the 12NC of the supply.
call his dealer or the Customer Helpdesk. The service
• 12NC “fan board”. Shows the 12NC of the “fan board”-
technician can then ask the customer to activate the CSM, in
module (for sets with LED backlight).
order to identify the status of the set. Now, the service
• 12NC “LED Dimming Panel”. Shows the 12NC of the
technician can judge the severity of the complaint. In many
LED dimming Panel (for sets with LED backlight).
cases, he can advise the customer how to solve the problem,
or he can decide if it is necessary to visit the customer.
The CSM is a read only mode; therefore, modifications in this Software versions
mode are not possible. • Current main SW. Displays the built-in main software
When CSM is activated, the layer 1 error is displayed via version. In case of field problems related to software,
blinking LED. Only the latest error is displayed. (see also software can be upgraded. As this software is consumer
section 5.5 Error Codes). upgradeable, it will also be published on the Internet.
Example: Q5431E_1.2.3.4.
• Stand-by SW. Displays the built-in stand-by processor
When CSM is activated and there is a USB stick connected to
software version. Upgrading this software will be possible
the TV, the software will dump the complete CSM content to the
via ComPair or via USB (see section Software Upgrading).
USB stick. The file (Csm.txt) will be saved in the root of the USB Example: STDBY_1.2.3.4.
stick. This information can be handy if no information is • MOP ambient light SW. Displays the MOP ambient light
displayed.
EPLD SW.
• MPEG4 software. Displays the MPEG4 software (for sets
Only for Q548.1: with MPEG4).
When in the Q548.1 chassis CSM is activated, a test pattern • PNX5120 boot NVM. Displays the SW-version that is used
will be displayed during 5 s.: 1 s. blue, 1 s. green, and 1 s. red, in the PNX5120 boot NVM (for sets with PNX5120).
then again 1 s. blue and 1 s. green. This test pattern is • LED Dimming SW. Displays the LED dimming EPLD SW
generated by the PNX5120. (for sets with LED backlight).
So if this test pattern is shown, it could be determined that the
back end video chain (PNX5120, LVDS, and display) of the
Quality items
SSB is working. • Signal quality. Poor/average/good
For LED backlight TV sets, the test pattern is build as follows:
• Child lock. Not active/active. This is a combined item for
1 s. blue, 1 s. green, 1 s. red (generated by the PNX5120) and
locks. If any lock (Preset lock, child lock, lock after or
further on with 3 seconds RGB pattern from the LED Dimming parental lock) is active, the item shall show “active”.
Panel.
• HDMI HDCP key. Indicates of the HDMI keys (or HDCP
keys) are valid or not. In case these keys are not valid and
How to Activate CSM the consumer wants to make use of the HDMI functionality,
Key in the code “123654” via the standard RC transmitter. the SSB has to be replaced.
• Ethernet MAC address. Not applicable.
Note: Activation of the CSM is only possible if there is no (user) • Wireless MAC address. Not applicable.
menu on the screen! • BDS key. Indicates if the “BDS level 1” key is valid or not.
• CI slot present. If the common interface module is
How to Navigate detected the result will be “YES”, else “NO”.
By means of the “CURSOR-DOWN/UP” knob (or the scroll • HDMI input format. The detected input format of the
wheel) on the RC-transmitter, can be navigated through the HDMI.
menus. • HDMI audio input stream. The HDMI audio input stream
is displayed: present / not present.
Contents of CSM • HDMI video input stream. The HDMI video input stream
The contents are displayed on three pages: General, Software is displayed: present / not present.
versions, and Quality items. However, these group names itself
are not shown anywhere in the CSM menu. How to Exit CSM
Press the “MENU” (or HOME) button twice on the RC-
General transmitter.
• Set Type. This information is very helpful for a helpdesk/
workshop as reference for further diagnosis. In this way, it
is not necessary for the customer to look at the rear of the
TV-set. Note that if an NVM is replaced or is initialized after
corruption, this set type has to be re-written to NVM.
ComPair will foresee in a possibility to do this.
2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 19
Mains
off Mains
on
- WakeUp requested
WakeUp
- Acquisition needed
requested
- Tact switch pushed
St by Semi
- stby requested and Active
no data Acquisition St by - St by requested
required - tact SW pushed
Tact switch
pushed
WakeUp
requested
- Tact switch pushed
(SDM)
- last status is hibernate
GoToProtection
after mains ON
Hibernate
GoToProtection
Protection
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EN 20 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding
Off
Mains is applied
Stand by or
Protection
Standby Supply starts running.
All standby supply voltages become available.
st-by µP resets
Power-OK error:
Detect2 high received
No Layer1: 3
within 2 seconds?
Layer2: 16
Yes
No
Enter protection
Wait fixed time of 15ms
Yes
Detect-1 I/O line Detect-2 I/O line Disable 3V3, switch standby
No No
High? High? line high and wait 4 seconds
Yes
No
No
Yes
EJTAG probe
Yes
connected ?
No
No Cold boot?
Yes
Release AVC system reset Release AVC system reset Release AVC system reset
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Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 21
AVC releases Reset-Ethernet when the AVC releases Reset-Ethernet when the
end of the AVC boot-script is detected end of the AVC boot-script is detected
This cannot be done through the bootscript,
the I/O is on the standby µP
Bootscript ready
No
in 1250 ms?
Yes
Timing needs to
be updated if more
Flash to Ram mature info is
No image transfer succeeded available.
within 30s?
Code =
Layer1: 2
Layer2: 15 Yes
Timing needs to be
updated if more
Code = mature info is
Switch AVC PNX8543 SW initialization
Layer1: 2 No available.
in reset (active low) succeeded
Layer2: 53
within 20s?
5100 SW start
Wait 5ms
Startup screen shall only be visible when there is a coldboot
Wake up reason to an active state end situation. The startup screen shall not
coldboot & not semi- be visible when waking up for reboot reasons or waking up to
switch off the remaining DC/DC
standby? semi-standby conditions.
converters
yes
Switch Standby I/O line high
3-th try?
and wait 4 seconds
The first time after the option turn on of the startup screen or
Startup screen cfg file when the set is virgin, the cfg file is not present and hence
present? the startup screen will not be shown.
Yes
yes
Blink Code as
error code
MIPS sends display parameters and
Bitmap to 5100
Initialize audio
Enable the PWM output towards the display LVDS In case of a LED backlight display, the PWM-dimming signal
cable in case of a LED Backlight set. needs to be routed to the LVDS cable. This routing is not
(CTRL4-PNX5100) allowed in non-LED sets (see also display configuration)
Initialize AutoTV
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Semi-Standby
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EN 22 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding
Semi Standby
The assumption here is that a fast toggle (<2s) can
only happen during ON->SEMI ->ON. In these states,
the AVC is still active and can provide the 2s delay. A
transition ON->SEMI->STBY->SEMI->ON cannot be
Wait until previous on-state is left more than 2
made in less than 2s, because the standby state will
seconds ago. (to prevent LCD display problems)
be maintained for at least 4s.
No
No PNX5100 present?
Release audio mute and wait 100ms before any other audio
handling is done (e.g. volume change)
Yes
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Active 270209
2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 23
Active
Wait 100ms
No PNX5100 present?
The exact timings to
switch off the
Yes display (LVDS
delay, lamp delay)
are defined in the
Switch off LVDS output in 8543
Switch off the display by sending: display file.
- TurnOnDisplay(0) (I²C) command to the PNX5100
Wait x ms - or sending OUTPUT-ENABLE(0) to the LED DIM
panel in case of a LED BL set.
18440_219_090227.eps
2009-Apr-03
EN 24 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding
Semi Stand by
Delay transition until ramping down of ambient light is *) If this is not performed and the set is
finished. *) switched to standby when the switch off of
the ambilights is still ongoing, the lights will
switch off abruptly when the supply is cut.
Wait 10ms
Wait 5ms
Important remarks:
2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 25
Introduction The error code buffer contains all detected errors since the last
ComPair (Computer Aided Repair) is a Service tool for Philips time the buffer was erased. The buffer is written from left to
Consumer Electronics products. and offers the following: right, new errors are logged at the left side, and all other errors
1. ComPair helps to quickly get an understanding on how to shift one position to the right.
repair the chassis in a short and effective way. When an error occurs, it is added to the list of errors, provided
2. ComPair allows very detailed diagnostics and is therefore the list is not full. When an error occurs and the error buffer is
capable of accurately indicating problem areas. No full, then the new error is not added, and the error buffer stays
knowledge on I2C or UART commands is necessary, intact (history is maintained).
because ComPair takes care of this. To prevent that an occasional error stays in the list forever, the
3. ComPair speeds up the repair time since it can error is removed from the list after more than 50 hrs. of
automatically communicate with the chassis (when the uP operation.
is working) and all repair information is directly available. When multiple errors occur (errors occurred within a short time
4. ComPair features TV software up possibilities. span), there is a high probability that there is some relation
between them.
Specifications
ComPair consists of a Windows based fault finding program New in this chassis is the way errors can be displayed:
and an interface box between PC and the (defective) product.
The ComPair II interface box is connected to the PC via an
USB cable. For the TV chassis, the ComPair interface box and There is a simple blinking LED procedure for board level repair
the TV communicate via a bi-directional cable via the service (home repair) so called LAYER 1 errors next to the existing
connector(s). errors which are LAYER 2 errors (see Table 5-3).
The ComPair fault finding program is able to determine the – LAYER 1 errors are one digit errors
problem of the defective television, by a combination of – LAYER 2 errors are two digit errors.
automatic diagnostics and an interactive question/answer • In protection mode.
procedure. – From consumer mode: LAYER 1.
– From SDM mode: LAYER 2.
How to Connect • Fatal errors, if I2C bus is blocked and the set re-boots, CSM
This is described in the chassis fault finding database in and SAM are not selectable.
ComPair. – From consumer mode: LAYER 1.
– From SDM mode: LAYER 2.
TO TV Important remark:
TO TO TO
For all errors detected by MIPS which are fatal =>
UART SERVICE I2C SERVICE UART SERVICE
CONNECTOR CONNECTOR CONNECTOR rebooting of the TV set (reboot starts after LAYER 1
error blinking), one should short the solder paths at
start-up from the power OFF state by mains
ComPair II
Multi interruption and not via the power button to trigger the
RC in function
RC out
SDM via the hardware pins.
• In CSM mode
Optional Power Link/ Mode
Switch Activity I2C RS232 /UART – When entering CSM: error LAYER 1 will be displayed
by blinking LED. Only the latest error is shown.
• In SDM mode
PC – When SDM is entered via Remote Control code or the
hardware pins, LAYER 2 is displayed via blinking LED.
• In the ON state
– In “Display error mode”, set with the RC commands
“mute_06250X _OK” LAYER 2 errors are displayed via
blinking LED.
ComPair II Developed by Philips Brugge
• Error display on screen.
Optional power – In CSM no error codes are displayed on screen.
HDMI 5V DC
I2C only – In SAM the complete error list is shown.
E_06532_036.eps
150208
Basically there are three kinds of errors:
• Errors detected by the Stand-by software which lead to
Figure 5-9 ComPair II interface connection protection. These errors will always lead to protection and
an automatic start of the blinking LED LAYER 1 error.
Caution: It is compulsory to connect the TV to the PC as (see section 5.6 The Blinking LED Procedure).
shown in the picture above (with the ComPair interface in • Errors detected by the Stand-by software which not
between), as the ComPair interface acts as a level shifter. If lead to protection. In this case the front LED should blink
one connects the TV directly to the PC (via UART), ICs will be the involved error. See also section Extra Information. Note
blown! that it can take up several minutes before the TV starts
blinking the error (e.g. LAYER 1 error = 2, LAYER 2
How to Order error = 15 or 53).
ComPair II order codes: • Errors detected by main software (MIPS). In this case
• ComPair II interface: 3122 785 91020. the error will be logged into the error buffer and can be read
• Software is available via the Philips Service web portal. out via ComPair, via blinking LED method LAYER 1-2
• ComPair serial interface cable for Q52x.x. error, or in case picture is visible, via SAM.
(using 3.5 mm Mini Jack connectors): 3138 188 75051.
2009-Apr-03
EN 26 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding
5.5.2 How to Read the Error Buffer content, as this history can give significant information). This to
ensure that old error codes are no longer present.
Use one of the following methods: If possible, check the entire contents of the error buffer. In
• On screen via the SAM (only when a picture is visible). some situations, an error code is only the result of another error
E.g.: code and not the actual cause (e.g. a fault in the protection
– 00 00 00 00 00: No errors detected detection circuitry can also lead to a protection).
– 23 00 00 00 00: Error code 23 is the last and only
detected error.
– 37 23 00 00 00: Error code 23 was first detected and There are several mechanisms of error detection:
error code 37 is the last detected error. • Via error bits in the status registers of ICs.
– Note that no protection errors can be logged in the • Via polling on I/O pins going to the stand-by processor.
error buffer. • Via sensing of analogue values on the stand-by processor
• Via the blinking LED procedure. See section 5.5.3 How to or the PNX8543.
Clear the Error Buffer. • Via a “not acknowledge” of an I2C communication.
• Via ComPair.
Take notice that some errors need several minutes before they
5.5.3 How to Clear the Error Buffer start blinking or before they will be logged. So in case of
problems wait 2 minutes from start-up onwards, and then
Use one of the following methods: check if the front LED is blinking or if an error is logged.
• By activation of the “RESET ERROR BUFFER” command
in the SAM menu. Table 5-2 Layer 1 code overview (multi chassis overview)
• With a normal RC, key in sequence “MUTE” followed by
“062599” and “OK”. LAYER 1 codes
• If the content of the error buffer has not changed for 50+ SSB 2
hours, it resets automatically. Display supply 3
Platform supply 4 Only for display option 196 and 197
Fan 7
5.5.4 Error Buffer
AmbiLight or DC/DC or 3D LED dim panel 8
Special Remarks
Defective board
LAYER 1 error
LAYER 2 error
Description
Error/Prot.
Monitored
Medium
Device
Main NVM 2 0 MIPS I2C1 E x STM24C128 SSB TV shut down with red LED blinking 2.
Temp. protection 3 12 MIPS I2C4 P BL/EB Supply
I2C3 2 13 MIPS I2C3 E BL/EB SSB SSB TV is rebooting endlessly with red LED blinking “2”.
I2C2 2 14 MIPS I2C2 E BL/EB SSB SSB
PNX does not boot (HW cause) 2 15 St-by µP I2C1 P BL SSB SSB TV is rebooting endlessly with red LED blinking “2”
PNX 5100 does not boot
12V 3 16 St-by µP I/O P BL Supply TV shut down with red LED blinking “3”.
12V 3 16 St-by µP I/O P BL Platform Supply
Inverter or display supply 3 17 Mips I/O E EB Supply TV still in normal operation mode, but without backlights.
Enter CSM Layer 1 red LED blinking “3”.
Only for display option 196 and 197 4 17 Mips I/O E EB Display Supply
1V2, 1V2, 3V3, 5V to low 2 18 St-by µP I/O P BL SSB TV shut down with red LED blinking “2”.
PNX 5100 2 21 MIPS I2C3 E EB PNX 5100 SSB TV is rebooting endlessly, with red LED blinking “2” (shown
every 20 second).
HDMI MUX 2 23 MIPS I2C3 E EB TDA9996 SSB Activate CSM red LED blinking “2”.
I2C switch 2 24 Mips I2C2 E EB PCA9540 SSB
Boot-NVM PNX5120 2 25 MIPS I2C3 E EB STM24C08 SSB TV is rebooting endlessly, with red LED blinking “2” (shown
every minute).
Multi Standard demodulator (Micronas IF) 2 27 MIPS 2
I C3 E EB DRX3616K SSB TV is in normal operation but without video displayed (RF).
DRX3626K
2
ARM (AL) 8 28 MIPS I C3 E EB NXP LPC2103 AL mod. or DC/DC TV is in normal operation but without AMBILIGHT “on”.
FPGA (Local contrast) 2 29 MIPS I2C3 E EB Altera SSB
Tuner1 2 34 MIPS I2C3 E EB UV1783S SSB TV is in normal operation but without video displayed (RF).
HD1816
FAN I2C expander 7 41 MIPS I2C2 E EB PCA 9533 FAN mod.
T× sensor 7 42 MIPS I2C2 E EB LM 75 T×sensor
FAN 1 7 43 MIPS I2C2 E EB FAN
FAN 2 7 44 MIPS I2C2 E EB FAN
MIPS does not boot (SW cause) 2 53 St-by µP I2C1 P BL PNX8543 SSB TV is rebooting endlessly with white LED blinking.
Display 5 64 MIPS I2C2 E BL/EB Altera Display
FPGA LED dim 2D 2 65 MIPS I2C3 E EB Xilinx SSB
FPGA LED dim 3D 8 65 MIPS I2C2 E EB Altera SSB
2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 27
2009-Apr-03
EN 28 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding
Important remark: 5.7.3 Important remark regarding the blinking LED indication
For all errors detected by MIPS which are fatal =>
rebooting of the TV set (reboot starts after LAYER 1 error As for the blinking LED indication, the blinking LED of layer 1
blinking), one should short the solder paths at start-up from error displaying can be switched “off” by pushing the power
the power OFF state by mains interruption and not via the button on the keyboard.
power button to trigger the SDM via the hardware pins. This condition is not valid after the set was unpowered (via
• Transmit the commands “MUTE” - “062500” - “OK” mains interruption). The blinking LED starts again and can only
with a normal RC. The complete error buffer is shown. be switched “off” by unplugging the mains connection.
Take notice that it takes some seconds before the blinking This can be explained by the fact that the MIPS can not load
LED starts. the keyboard functionality from software during the start-up and
• Transmit the commands “MUTE” - “06250x” - “OK” does not recognise the keyboard commands at this time.
with a normal RC (where “x” is a number between 1
and 5). When x = 1 the last detected error is shown, x = 2
the second last error, etc.... Take notice that it takes some 5.8 Fault Finding and Repair Tips
seconds before the blinking LED starts.
Read also section “5.5 Error Codes, 5.5.4 Error Buffer, Extra
Information”.
5.7 Protections
5.8.1 Ambilight
5.7.1 Software Protections
2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 29
• The consumption of controller IC 7103 is around 19 mA 5.8.5 Fan self test (only for sets with LED backlight)
(that means almost 200 mV drop voltage across resistor
3108). In case fans are present, a softest can be done by pushing the
• The current capability of DC-DC converters is quite high red coloured button on the remote control while the TV set is in
(short-circuit current is 7 to 10 A). CSM. Exit CSM and check the status of the fans in the error
• The DETECT1 signal (active “low”) is an internal protection buffer by entering SAM (062596 + info button on the RC). In
(error 18) of the DC-DC convertor and will occur if the case of failure (fully red screen) more detailed information is
output voltage of any DC-DC convertor is out of limits (10% available in the error buffer (error 41, 42, 43, 44).
of the normal value).
5.8.6 UART Logging
Fault Finding
• Symptom: +1V2 not present (even for a short while ~10
When something is wrong with the TV set (f.i.the set is
ms)
rebooting) checking the UART logging using hyperterminal can
– Check 12 V availability (resistor 3108, MOS-FETs
be done to find more information. Hyperterminal is a standard
7101 and 7102), value of +12 V, and surrounding
Windows application. It can be found via Programs,
components) Accessories, Communications, Hyperterminal. Connect a
– Check the voltage on pin 9 (1.5 V),
“ComPair UART”-cable (3138 188 75051) from the Service
– Check for +1V2 output voltage short-circuit to GND that
connector in the TV set, via the ComPair interface (this is
can generate pulsed over-currents 7...10 A through coil compulsory, otherwise ICs are blown in the PC), to the
5103.
“COMx”-port of the PC. After start-up of Hyperterminal, fill in a
– Check the over-current detection circuit (2106 or 3131
name (f.i. “logging”) in the “Connection Description” box, then
interrupted). apply the following settings:
• Symptom: +1V2 present for about 100ms, +3V3 not rising.
1. COMx
– Check the ENABLE-3V3 signal (active “low”),
2. Bits per second = 115200
– Check the voltage on pin 8 (1.5 V), 3. Data bits = 8
– Check the under-voltage detection circuit (the voltage
4. Parity = none
on collector of transistor 7105-1 should be less than
5. Stop bits = 1
0.8 V), 6. Flow control = none
– Check for output voltages short-circuits to GND (+3V3)
During the start-up of the TV set, the logging will be displayed.
that can generate pulsed over currents 7...10 A
This is also the case during rebooting of the TV set (the same
through coil 5101, logging appears time after time). Also available in the logging
– Check the over-current detection circuit (2105 or 3127
is the “Display Option Code” (useful when there is no picture),
interrupted).
look for item “DisplayRawNumber” in the beginning of the
• Symptom: +1V2 OK, +3V3 present for about 100 ms. logging.
Possible cause: SUPPLY-FAULT line stays “low” even
Tip: When there is no picture available during reboot, it is
though the +3V3 and +1V2 is available - the stand-by
possible to check for “error devices” in the logging (LAYER 2
microprocessor is detecting that and switching “off” all
error). This can be very helpful to determine the failure cause
supply voltages. of the reboot. For protection state, there is no logging.
– Check the drop voltage across resistor 3108 (they
could be too high, meaning a defective controller IC or
5.8.7 Loudspeakers
MOS-FETs),
– Check if the boost voltage on pin 4 of controller IC 7103
is less than 14 V (should be 19 V), Make sure that the volume is set to minimum during
– Check if +1V2 or +3V3 are higher than their normal disconnecting the speakers in the “on” state of the TV. The
values - that can be due to defective DC feedback of audio amplifier can be damaged by disconnecting the speakers
the respective DC-DC convertor (ex. 3152, 3144). during “on” state of the set! Sometimes the set can go into
• Symptom: +1V2 and +3V3 show a high level of ripple protection, but that is not always the case.
voltage (audible noise can come from the filtering coils
5101, 5103). Possible cause: instability of the frequency 5.8.8 Tuner
and/or duty cycle of a DC-DC converter or stabiliser.
– Check the resistor 3164, capacitors 2102 and 2103, Attention: In case the tuner is replaced, always check the tuner
input and output decoupling capacitors. options!
– Check AC feedback circuits (2120, 2129, 3141, 3153,
2110, 2114 and 3135). 5.8.9 Display option code
• Symptom: +1V2, +3V3 ok, no +5V5-TUN (analogue sets
only). Possible cause: the “+5V5-TUN GENERATOR”
Attention: In case the SSB is replaced, always check the
circuit (7202 and surroundings components) is defective:
display option code in SAM, even when picture is available.
check transistor 7202 (it has to have gate voltage pulses of
Performance with the incorrect display option code can lead to
about 10 V amplitude and drain voltage pulses of about 35
unwanted side-effects for certain conditions.
V amplitude) and surrounding components. A high
See also Table 6-4 for the code.
consumption (more than 6 mA) from +5V5-TUN voltage
can cause also +5V5-TUN voltage to be too low or zero.
5.8.10 Upgrade HDMI EDID NVM
Note: when a pair of power MOSFETs (7101 or 7102)
becomes defective, the controller IC 7103 should be replaced To upgrade the HDMI EDID, see ComPair for further
as well. instructions.
2009-Apr-03
EN 30 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding
To upgrade the VGA EDID NVM, pin 7 of the EDID NVM [2] has
to be short circuited to ground. See ComPair for further
instructions.
1
2
SDM
EDID
18440_201_090225.eps
090306
2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 31
START
Set is still
Set is going into protection after operating?
replacing the SSB
(blinking LED, error 2). No
Create “repair” directory on USB stick and
Take care that speakers are connected! connect USB stick to TV-set
In some sets, the speakers are in the rear Go to SAM mode (062596 i+) and
cover, and when the set is switched “on” save the TV settings via “Upload to USB”.
without speakers, it is possible that the Audio
protection is triggered.
- Replace SSB board by a Service SSB.
Advise: remount rear cover before switching - Make the SSB fit mechanically to the set.
“on” (see also SCC_71772).
Start-up set.
Set behaviour?
Set is starting up but no display. Set is starting up & display is OK. Set is starting up in “Factory” mode.
After entering “Display Option” code, set is Unplug the mainscord to verify the correct
going to Standby (= validation of code). disabling of the factory-mode.
Saved settings
No After entering “Display Option” code, set is going
on USB stick?
to Standby (= validation of code).
2009-Apr-03
EN 32 5. Q548.1E LA Service Modes, Error Codes, and Fault Finding
5.9 Software Upgrading 5. The renamed “upg” file will be visible and selectable in the
upgrade application.
5.9.1 Introduction
Back-up Software Upgrade Application
The set software and security keys are stored in a NAND- If the default software upgrade application does not start (could
Flash, which is connected to the PNX8543 via the PCI bus. be due to a corrupted boot 2 sector) via the above described
method, try activating the “back-up software upgrade
application”.
It is possible for the user to upgrade the main software via the
How to start the “back-up software upgrade application”
USB port. This allows replacement of a software image in a
manually:
stand alone set, without the need of an E-JTAG debugger. A
1. Disconnect the TV from the Mains/AC Power.
description on how to upgrade the main software can be found
2. Press the “INFO”-button on a Philips remote control or
in the DFU.
“CURSOR DOWN” button on a Philips DVD RC-6 remote
control (it is also possible to use a TV remote in “DVD”
Important: When the NAND-Flash must be replaced, a new mode). Keep the “INFO”-button (or “cursor down” button)
SSB must be ordered, due to the presence of the security keys! pressed while reconnecting the TV to the Mains/AC Power.
(copy protection keys, MAC address, ...). It is not possible 3. The software upgrade application will start.
anymore to replace the NAND-Flash with another one from a
scrap-board.
5.9.3 Stand-by Software Upgrade via USB
Perform the following actions after SSB replacement:
1. Set the correct option codes (see sticker inside the TV).
2. Update the TV software (see the DFU for instructions). In this chassis it is possible to upgrade the Stand-by software
3. Perform the alignments as described in section Reset of via a USB stick. The method is similar to upgrading the main
Repaired SSB. software via USB.
4. Check in CSM if the HDMI keys are valid. Use the following steps:
For the correct order number of a new SSB, always refer to the 1. Create a directory “UPGRADES” on the USB stick.
Spare Parts list, available on the Philips Spare Part web portal. 2. Copy the Stand-by software (part of the one-zip file, e.g.
StandbySW_CFT69_84.0.0.0.upg) into this directory.
3. Insert the USB stick into the TV.
5.9.2 Main Software Upgrade
4. Start the download application manually (see
section Manual Software Upgrade.
• The “UpgradeAll.upg” file is only used in the factory. 5. Select the appropriate file and press the “red” button to
• The “FlashUtils.upg” file is only used by Service centres upgrade.
that are allowed to do component level repair on the SSB.
5.9.4 Content and Usage of the One-Zip Software File
Automatic Software Upgrade
In “normal” conditions, so when there is no major problem with
Below the content of the One-Zip file is explained, and
the TV, the main software and the default software upgrade instructions on how and when to use it.
application can be upgraded with the “AUTORUN.UPG”
(FUS part of the one-zip file: e.g. FUS _Q5431E_
1.25.5.0_commercial.zip). This can also be done by the File name Description
consumers themselves, but they will have to get their software 907.5_PnSEsticker.zip Contains the E-sticker data. Not to be
used by Service technicians.
from the commercial Philips website or via the Software Update
cabinet_TV543_x.x.x.x.zip Contains acoustic parameters per
Assistant in the user menu (see DFU). The “autorun.upg” file cabinet. Not to be used by Service
must be placed in the root of the USB stick. technicians.
How to upgrade: ceisp2padll_P2PAD_x.x.x.x.zip Not to be used by Service technicians.
For ComPair development only.
1. Copy “AUTORUN.UPG” to the root of the USB stick.
display_TV543_x.x.x.x.zip Not to be used by Service technicians.
2. Insert USB stick in the set while the set is in ON MODE.
EJTAGDownload_Q5431_x.x.x.x.zip Only used by service centra which are
The set will restart and the upgrading will start allowed to do Component Level Repair.
automatically. As soon as the programming is finished, a Factory_Q5431_x.x.x.x.zip Only for production purposes, not to be
message is shown to remove the USB stick and restart the used by Service technicians.
set. FlashUtils_Q5431_x.x.x.x.zip Not to be used by Service technicians.
FUS_Q5431_x.x.x.x.zip Contains the “autorun.upg” which is
needed to upgrade the TV main software
Manual Software Upgrade and the software download application.
In case that the software upgrade application does not start HDMI_FHD_EDID_Q5431_x.x.x.x.zip Contains the EDID content of the different
automatically, it can also be started manually. (FHD) HDMI NVM’s. See ComPair for
further instructions.
How to start the software upgrade application manually:
HDMI_HD_EDID_Q5431_x.x.x.x.zip Contains the EDID content of the different
1. Disconnect the TV from the Mains/AC Power. (HD) HDMI NVM’s. See ComPair for
2. Press the “OK” button on a Philips TV remote control or a further instructions.
Philips DVD RC-6 remote control (it is also possible to use lightGuide_TV543_x.x.x.x.zip Not to be used by Service technicians.
a TV remote in “DVD” mode). Keep the “OK” button OAD_Q5431_x.x.x.x.zip Not to be used by Service technicians.
pressed while reconnecting the TV to the Mains/AC Power. Pgamma_xxxxxxxx_Q5431_x.x.x.x.zip Contains NVM data for the specific
3. The software upgrade application will start. display control board. Not to be used by
Service technicians.
PQ_Q5431_x.x.x.x.zip Not to be used by Service technicians.
Attention! processNVM_Q5431_x.x.x.x.zip Default NVM content. Must be
In case the download application has been started manually, programmed via ComPair.
the “autorun.upg” will maybe not be recognized.
What to do in this case:
1. Create a directory “UPGRADES” on the USB stick.
2. Rename the “autorun.upg” to something else, e.g. to
“software.upg”. Do not use long or complicated names,
keep it simple. Make sure that “AUTORUN.UPG” is no
longer present in the root of the USB stick.
3. Copy the renamed “upg” file into this directory.
4. Insert USB stick into the TV.
2009-Apr-03
Service Modes, Error Codes, and Fault Finding Q548.1E LA 5. EN 33
2009-Apr-03
EN 34 6. Q548.1E LA Alignments
6. Alignments
Index of this chapter: • EU/AP-PAL models: a PAL B/G TV-signal with a signal
6.1 General Alignment Conditions strength of at least 1 mV and a frequency of 475.25 MHz
6.2 Hardware Alignments • US/AP-NTSC models: an NTSC M/N TV-signal with a
6.3 Software Alignments signal strength of at least 1 mV and a frequency of 61.25
6.4 Option Settings MHz (channel 3).
6.5 Reset of Repaired SSB • LATAM models: an NTSC M TV-signal with a signal
6.6 Total Overview SAM modes strength of at least 1 mV and a frequency of 61.25 MHz
(channel 3).
2009-Apr-03
Alignments Q548.1E LA 6. EN 35
• Set the RED, GREEN and BLUE default values according 6.4.4 Opt. No. (Option numbers)
to the values in Table 6-1.
• When finished press OK on the RC, then press STORE (in Select this sub menu to set all options at once (expressed in
the SAM root menu) to store the aligned values to the NVM. two long strings of numbers).
• Restore the initial picture settings after the alignments. An option number (or “option byte”) represents a number of
different options. When you change these numbers directly,
Table 6-2 White tone default settings Frame sets you can set all options very quickly. All options are controlled
(7000 series) via eight option numbers.
When the NVM is replaced, all options will require resetting. To
White Tone 32" 42" Black level be certain that the factory settings are reproduced exactly, you
offset must set both option number lines. You can find the correct
Colour Temp R G B R G B R G option numbers on a sticker inside the TV set and in Table 6-4.
Normal 127 93 100 127 116 112 8 8 Example: The options sticker gives the following option
Cool 127 98 122 125 114 124 8 8 numbers:
Warm 127 83 61 127 108 73 8 8 • 08192 00133 01387 45160
• 12232 04256 00164 00000
The first line (group 1) indicates hardware options 1 to 4, the
Table 6-3 White tone default settings Roadrunner sets
second line (group 2) indicate software options 5 to 8.
(8000 series) Every 5-digit number represents 16 bits (so the maximum value
will be 65536 if all options are set).
White Tone 32" 42" Black level When all the correct options are set, the sum of the decimal
offset
values of each Option Byte (OB) will give the option number.
Colour Temp R G B R G B R G
SeeTable 6-4 for the options.
Normal 127 93 97 127 103 99 8 8
Cool 127 100 120 127 109 118 8 8
Warm 127 83 59 127 94 61 8 8 Diversity
Not all sets with the same Commercial Type Number (CTN)
necessarily have the same option code!
Note: tint settings Frame sets (7000 series) 47" and 52", as Use of Alternative BOM An alternative BOM number usually
well as Roadrunner sets (8000 series) 37" and 47", were not indicates the use of an alternative display or power supply. This
available at time of publishing. results in another display code thus in another Option code. For
the power supply there is no difference.
6.3.3 LCD Panel Flicker Alignment Refer to Chapter 3. Precautions, Notes, and Abbreviation List.
Note: This is only necessary for Forward Integration models 6.4.5 Option Code Overview
(sets that have the LCD Timing Controller (TCON) located on
the SSB) - not applicable to sets in this chassis. Table 6-4 Option and display code overview
See ComPair for further instructions. CTN Options Group 1 Options Group 2 Disp.
(Alt. BOM#) code
32PFL7404H/12 08193 00649 01391 45288 10165 28832 00162 00000 181
6.4 Option Settings 42PFL7404H/12 08193 00651 01391 45288 10167 28832 00178 00000 183
47PFL7404H/12 08193 00651 01391 45288 10170 28832 00162 00000 186
6.4.1 Introduction 52PFL7404H/12 08193 00651 01391 45288 10192 28832 00186 00000 208
32PFL8404H/12 08209 00656 02031 45288 26549 28834 00162 00000 181
The microprocessor communicates with a large number of I2C 37PFL8404H/12 08209 00656 02031 45288 26549 28834 00170 00000 161
ICs in the set. To ensure good communication and to make 42PFL8404H/12 08209 00657 02031 45288 26551 28834 00178 00000 183
digital diagnosis possible, the microprocessor has to know 47PFL8404H/12 08209 00657 02031 45288 26554 28834 00162 00000 186
2009-Apr-03
EN 36 6. Q548.1E LA Alignments
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2009-Apr-03
Alignments Q548.1E LA 6. EN 37
2009-Apr-03
EN 38 6. Q548.1E LA Alignments
2009-Apr-03
Circuit Descriptions Q548.1E LA 7. EN 39
7. Circuit Descriptions
Index of this chapter: Main difference with the previous chassis is the addition of the
7.1 Introduction PNX5120 Video Back-End Processor.
7.2 Power Supply
7.3 DC-DC Converter Roadrunner sets (8000 series) are equipped with AmbiLight.
7.4 Front-End
7.5 HDMI
7.1.1 Implementation
7.6 Video and Audio Processing - PNX8543
7.7 Common Interface CI+
Key components of this chassis are:
• PNX8543 Digital Colour Decoder
Notes:
• HD1816AF Hybrid Tuner
• Only new circuits (circuits that are not published recently)
• DRX3926K Demodulator
are described. • TDA9996 HDMI Switch
• Figures can deviate slightly from the actual situation, due
• TPA3123D2PWP Class D Power Amplifier
to different set executions.
• PNX5120 Video Back-End Processor.
• For a good understanding of the following circuit
descriptions, please use the wiring, block (see chapter
7.1.2 TV543 Architecture Overview
9. Block Diagrams) and circuit diagrams (see chapter
10. Circuit Diagrams and PWB Layouts).Where necessary,
you will find a separate drawing for clarification. • For details about the chassis block diagrams refer to
chapter 9. Block Diagrams. An overview of the TV543
architecture can be found in Figure 7-1.
7.1 Introduction
Optional for
Q548 chassis
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EN 40 7. Q548.1E LA Circuit Descriptions
18540_201_090327.eps
090327
2009-Apr-03
Circuit Descriptions Q548.1E LA 7. EN 41
the boards.
+12V, +Vsnd, +24V
7.2.1 Specifications
18440_209_090226.eps
090227
Most sets in the TV543 platform use the Integrated Power
Board (IPB) - incl. inverter. The 52" sets in this chassis have a
conventional PSU - with separate inverter. Figure 7-4 PSU Timing Diagram
In this Service Manual, no detailed information is available 7.2.5 Power Supply Protection
because of design protection issues.
Power supply protection is implemented via the stand-by
7.2.2 Diversity controller of the PNX8543 via the following signals:
• POWER-OK: signal from PSU to indicate if the supply
Below find an overview of the different PSUs that are used: output from the IPB is normal
• DETECT1: signal to indicate if the +5V, +3V3 and +1V2
voltages on the chassis are present
Table 7-1 Supply diversity
• DETECT2: signal to indicate if the +12V voltage on the
chassis is present.
Supplier PSU Model Input Voltage Range
LGIT PLHL-T826B 32PFL7404H/12 High Mains (198 to 265 VAC)
Delta DPS-298CP-4 A 42PFL7404H/12 High Mains (198 to 265 VAC) 7.3 DC-DC Converter
Delta DPS-298CP-2 A 47PFL7404H/12 High Mains (198 to 265 VAC)
Delta DPS-411AP-3 A 52PFL7404H/12 High Mains (198 to 265 VAC) Input power is obtained from the IPB module via the following
LGIT PLHL-T826B 32PFL8404H/12 High Mains (198 to 265 VAC) voltages:
Delta DPS-298CP A 37PFL8404H/12 High Mains (198 to 265 VAC) • +3V3-STANDBY (stand-by-mode only)
Delta DPS-298CP-4 A 42PFL8404H/12 High Mains (198 to 265 VAC) • +12V (on-mode)
Delta DPS-298CP-2 A 47PFL8404H/12 High Mains (198 to 265 VAC) • +Vsnd (audio power) (on-mode)
• +24V (bolt-on power) (on-mode).
7.2.3 Application Control is achieved by the PNX8543 controller via the
STANDBY signal.
An application diagram can be found below:
Audio power is specifically for audio supply usage only and
does not go through any DC conversion.
Inverter
Below find a block diagram of the on-board DC-DC converters.
To Lamps
+12V NCP5422 + 2x
AC Input Vo=400V Si4936 +1V2-PNX8543
RELAY
PFC Audio Supply (+12V) (Sync Dual
+12V Controller +3V3
+24V + Dual FETs)
LD1117 +1V8-PNX8543
STANDBY (Linear Regulator)
Flyback (HIIGH=OFF, LOW=ON)
LD1117
(Linear Regulator) +1V8-PNX5100
+3V3_STANDBY
ENABLE-3V3
2009-Apr-03
EN 42 7. Q548.1E LA Circuit Descriptions
7.4 Front-End
P la tfo rm w ith e m b e d d e d E D ID
The Front-End consist of the following key components:
• Tuner HD1816AF
E D ID : 2 5 3 B IIC
• IF demodulator DRX3926K CPU
• AGC amplifier UPC3221GV TDA 9996
• SAW filter 36M125. 3B 3B 3B 3B
2 5 3 co m m o n B yte s
Below find a block diagram of the front-end application.
+ 1 B su b a d d re s o f
S o u rce P h ysica l A d d re ss
+3 B fo r inp u t A
I2C-SSB +3 B fo r inp u t B
NXP Hybrid SAW
CVBS 4 * HDMI +3 B fo r in p u t C
IF Amplifier DRX3926K 2nd SIF PNX8543
Tuner Filter
TS
inputs +3 B fo r in p u t D
IF-AGC 18440_214_090227.eps
I2C-TUNER 090227
18440_211_090227.eps
090227 Figure 7-8 EDID control (embedded EDID)
PNX8543
A B
H D M IB-R X
1P 05
DRX
H D M IA-R X D
Out
H D M I Side
C
TDA9996 (optional)
CRX
A
AR X
E d id B
BR X
HDMI 4
1P06
1P04
1P03
1P02
(optional)
HDMI 3
HDMI 2 HDMI 1
1M 96 (optional)
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2009-Apr-03
Circuit Descriptions Q548.1E LA 7. EN 43
7.6 Video and Audio Processing - PNX8543 The PNX8543 handles the digital and analogue audio- and
video decoding and processing. The processor is a MIPS32
The PNX8543 is the main audio and video processor (or general purpose CPU and a 8051-based TV controller for
power management and user event handling.
System-on-Chip) for this platform. It is a member of the
PNX85xx SoC family (described in earlier chassis) with the
addition of the MPEG4 functionality; the separate STi710x • For a functional diagram of the PNX8543, refer
MPEG4 decoder is no longer implemented in this platform. to Figure 7-9.
PNX8543x
MEMORY
CONTROLLER
TS in from
channel decoder MPEG
CI/CA SYSTEM LVDS for
TS out/in for PROCESSOR PRIMARY flat panel display
PCMCIA VIDEO LVDS (single or dual
OUTPUT channel)
DV-ITU-656 DV INPUT
AV-PIP
SUB-PICTURE
VIDEO
CVBS, Y/C, 3D COMB
DECODER
RGB
SECONDARY VIDEO
VIDEO ENCODER analog CVBS
OUTPUT
AUDIO DSP
Dual SPDIF I2S
AUDIO IN AUDIO OUT
I2S SPDIF
300 MHz
AV-DSP
HDMI
Dual HDMI
RECEIVER DRAWING
ENGINE
I 2C PWM GPIO IR ADC SPI UART I2C GPIO Flash USB 2.0 CA PCI 2.2
x 22 x 10
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2009-Apr-03
EN 44 7. Q548.1E LA Circuit Descriptions
Refer to Figure 7-10 for the main video interfaces for the
PNX8543 and the video signal flow between blocks and
memory.
DDR2-SDRAM
PNX8543x
MCU-DDR
VCP/PC 2D_DE
VCP_
UIP
LOW IF VCP_RX GFX1
CVBS VCP_ LCD panel
WIFD GFX2
RGB AFE CPIPE_ LVDS_BUF FPD-LVDS1
(ADC) PIP L2QTV LVDS_TX
YPbPr LCD panel
PC_
VGA PC_RX FPD-LVDS2
UIP
DMA BUS
main
HDMI
MBVP_
L2QTV
Dual HDMI HDMI_ HDMI_UIP
RX
MBVP_
L2VO1
monitor
CVBS/Y DAC
CPIPE_ CVBS1/Y
MBVP_ DENC
L2VO C
DV (including L2VO2
VIP
ITU-656) (ITU-656)
monitor
MUX DAC CVBS2/C
A
TS
TSI
PCMCIA
CAI MSVD
TSDO
TSDI VMSP
CMD
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Circuit Descriptions Q548.1E LA 7. EN 45
Refer to Figure 7-11 for the main audio interfaces for the
PNX8543 and the audio signal flow between blocks and
memory.
DDR2-SDRAM
PNX8543x
MCU
TM2270
TS-IN CAI VMSP (MPEG, AC-3, MP3
DECODER)
XB4
XB1
fast SPDIF
I2S-IN-SD1
I2S-IN-SD2
XB2
I2S-IN-SD3
I2S-IN-SD4
AI AO
I2S-IN-WS
I2S-IN-SCK
I2S-IN-OSC
4 × I2S
SPDIF
4 × I2S
HDMI HDMI_RX XB3
4
I 2S
4 × I2S
I2S-OUT-SD1
4 I2S-OUT-SD2
IF ADC I2S-OUT-SD3
SSIF ASDEC APP - AUDIO DSP I2S-OUT-SD4
DigIF (DEMODULATION (POST PROCESSING)
from AND DECODING)
SPDIF I2S-OUT-WS
XB4 I2S-OUT-SCK
I2S-OUT-OSC
L, R ADC
2 Main L, R
DAC
2
HP L, R
DAC
2
SCART2 L, R
DAC
2
SCART1 L, R
DAC
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2009-Apr-03
EN 46 7. Q548.1E LA Circuit Descriptions
DDR2-SDRAM
PNX8543x
MCU_DDR
I2C-1 IIC4_DMA
I2C-3 IIC3_DMA
AVDSP
DMA BUS
UART-1 UART1
PCI_XIO
PCI/XIO
UART-2 UART2
CAI
CI/CA
USB USB2.0
I2C-MC
SYSTEM UART-3
CONTROLLER
JTAG_MMIO 80C51 PWMs
EJTAG
GPIOs
18440_205_090226.eps
090226
The Connectivity Subsystem consists of: 7.6.4 Service Notice - FLASH RAM / PNX8543 exchange
• PCI/XIO interface
• USB2.0 interface The FLASH RAM (item 7M00) and/or PNX8543 (item 7600)
• Three 2-wire UARTs can only be exchanged by an authorised central workshop with
• Four Master/Slave I2C interfaces dedicated programming tools. Due to the presence of (CI+)
• Common Interface/Conditional Access Interface. keys in the components, unauthorised exchange of these
components will always result in a defective board.
The Computing Subsystem consists of:
• 32-bit MIPS RISC core
• Enhanced JTAG (EJTAG) block inside the MIPS 7.7 Common Interface CI+
• JTAG_MMIO blocks
• TV controller Together with this platform, an extension to the Common
• Audio/Video DSP (AV_DSP) Interface (CI) Conditional Access system is added, called CI+.
• Memory Control Unit (MCU).
CI+ or Common Interface Plus is a specification that extends
the Common Interface (DVB-CI) as described in the digital
broadcasting standard DVB.
2009-Apr-03
Circuit Descriptions Q548.1E LA 7. EN 47
C A-C TR L
C A-M D I
C A-M D O
P C I/X IO
derived/copied from POD (with the exception of Out Of Band interface interface
(OOB) used in US CA systems). For more information about
MHEG MMI
ap p licatio n
scram b ler
C A clien t
D E S /AE S
conventional CA systems using a CI module, refer to the Tran sp o rt S tream s
CAM P ro p rietary C A
scram b ling
The CI+ standard is downwards compatible with the existing CI (S C ) C I + S tan d ard ised C C S
18440_221_090227.eps
090227
The Ambi Light architecture in this platform has been entirely The use of the DC/DC board is optional. In case no DC/DC
renewed. The characteristics are: board is implemented, the ARM processor is located on one of
• Additional DC/DC board generating 12/16/24 V (optional) the AL boards.
• ARM processor (on DC/DC panel or AL board)
• Low-power LEDs Refer to Figure 7-14 for the Ambi Light architecture.
• SPI interface from ARM to LED drivers
• I2C upgradeable via USB
• Each AL module has a temperature sensor.
18310_203_090317.eps
090317
Refer to Figure 7-15 below for signal interfacing to and from the SD A SPI C LO C K
S da1 Sck
ARM controller. The ARM controller is located on the DC/DC
SC L
board (item no. 7302) or AL panel (item no. 7102). S c l1
P 0. 7
SPI LATC H
S E L1 SPI LATC H 2
t bd (only on dc/dc for aurea)
P 0. 8
S E L2
t bd
SPI D ATA O U T
M OSI
PW M C LO C K
M A T0.0
AR M M ISO
SPI D ATA R ETU R N
BLAN K
M A T1.0
PR O G
t bd
Tx D
Tx d0 C S EEPR O M
t bd
RxD
R x d0 TEM P
P 0. 10
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2009-Apr-03
EN 48 7. Q548.1E LA Circuit Descriptions
The SPI bus is a synchronous serial data link standard that Also PWM clock and BLANK signals are generated by the
operates in full duplex mode. controller. The controller can be reprogrammed via I2C (via
USB). The controller can receive matrix values via I2C, which
For debugging purposes, the working principle is given below: will be stored in the EEPROM of each AL module via the SPI
• At startup the controller will read-out matrix data from the bus. The temperature sensor in each AL module controls the
EEPROM devices (via SPI DATA RETURN) TEMP line; in case of a too high temperature the controller will
• Before operation, the driver current is set via SPI, with reduce the overall brightness.
driver in DC mode
• During normal operation the controller receives RGB-, 7.8.2 LED driver communication (via SPI bus)
configuration-, operation mode- and topology data via I2C
• The controller converts the I2C RGB data via the matrixes Refer to Figure 7-16 below for signal interfacing between the
to SPI LED data ARM controller and the LED drivers on the AL boards, and the
• Via data return the controller receives error data (if LED drivers and the EEPROMs on the AL boards.
applicable).
o ut16
o ut16
S o ut S in S o ut S in S o ut
LED LED LED
D R IV E R D R IV E R D R IV E R
1 2 N
S P I d ata in
18310_205_090318.eps
090318
Figure 7-16 SPI communication between ARM controller and LED drivers
The ARM controller communicates with the LED drivers (on Each AL board is equipped with a temperature sensor. If one of
each AL module) via an SPI bus. For debugging purposes, the the sensors detects a temperature over the threshold, the
working principle is given below: TEMP line is pulled LOW which results in brightness reduction.
• Data from the ARM controller is linked through the drivers,
which are connected in cascade
• SPI CLK, SPI LATCH, PROG, BLANK and PWM CLOCK
are going directly from the controller to each driver
• SPI DATA RETURN is linked from the last driver to the
controller: controller decides which driver returns data.
ARM
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2009-Apr-03
IC Data Sheets Q548.1E LA 8. EN 49
8. IC Data Sheets
This chapter shows the internal block diagrams and pin electrical diagrams (with the exception of “memory” and “logic”
configurations of ICs that are drawn as “black boxes” in the ICs).
8.1 Diagram SSB: DC/DC +3V3 +1V2 B01A, NCP5422AD (IC 7103)
BIAS CURRENT
+ SOURCE
GEN RAMP1 RAMP2
−
+ VCC
8.6 V BST
−
7.8 V
IS+1
CLK1
+ BST
OSC GATE(H)1
IS−1
− + − CLK2 S
Reset non−overlap
IS+2 70 mV Dominant VCC
PWM FAULT GATE(L)1
+ Comparator 1 R
IS−2
− + − FAULT
70 mV S Q FAULT
Set RAMP1
Dominant
− 0.425 V BST
R GATE(H)2
+ − S
+ + non−overlap
− 0.25 V Reset
FAULT Dominant VCC
PWM GATE(L)2
Comparator 2 R
RAMP2 FAULT
E/A OFF
GND
+ E/A OFF
− 0.425 V 1.2 mA FAULT
5.0 A + E/A1 −
1.0 V −
− +
+
E/A2
1.0 V
Pin Configuration
SO−16
1 16
GATE(H)1 GATE(H)2
GATE(L)1 GATE(L)2
NCP5422A
GND VCC
AWLYWW
BST ROSC
IS+1 IS+2
IS−1 IS−2
VFB1 VFB2
COMP1 COMP2
A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
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2009-Apr-03
EN 50 8. Q548.1E LA IC Data Sheets
8.2 Diagram SSB: DC/DC +3V3 +1V2 Standby B01B, ST1S10PH (IC 7202/7222)
Block Diagram
Pin Configuration
2009-Apr-03
IC Data Sheets Q548.1E LA 8. EN 51
8.3 Diagram SSB: DC/DC +3V3 +1V2 Standby B01B, LD3985M (IC 7201)
Block Diagram
Pin Configuration
TSOT23-5L/SOT23-5L Flip-Chip
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2009-Apr-03
EN 52 8. Q548.1E LA IC Data Sheets
Block Diagram
RF AGC MPEG-2
DVB-T/QAM TS
IF AGC FEC
SAW
Main
IF AMP ADC CVBS
Tuner
DVB-T/QAM/ATV DAC
Demodulator
Stereo Decoder
Integrated Tuner SIF
DAC
I2S Audio
Presaw
Sense
I2 C
I2C
System Controller
GPIO
Pin Configuration
VSSAH_CVBS INP
VDDAH_CVBS INN
CVBS VSSAH_AFE1
SIF VDDAH_AFE1
VSSAL_AFE2 VDDAL_AFE1
VDDAL_AFE2 VSSAL_AFE1
PDP IF_AGC
PDN RF_AGC
48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33
XI 49 32 RSTN
XO 50 31 SAW_SW
VSSAH_OSC 51 30 GPIO2
VDDAH_OSC 52 29 VSYNC
VDDH 53 28 VSSL
VSSH 54 27 VDDL
VSSL 55 26 VDDH
VDDL 56 25 VSSH
TDO 57
DRXK 24 I2C_SDA1
TMS 58 23 I2C_SCL1
TCK 59 22 MD7
TDI 60 21 MD6
I2C_SDA2 61 20 MD5
I2C_SCL2 62 19 MD4
I2S_CL 63 18 VDDH
I2S_DA 64 17 VSSH
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
I2S_WS VDDL
VDDL VSSL
VSSL MD3
GPIO1 MD2
MSTRT MD1
MERR MD0
VSSH MVAL
18440_300_090303.eps
VDDH MCLK 090303
2009-Apr-03
IC Data Sheets Q548.1E LA 8. EN 53
Block Diagram
PNX8543x
MEMORY
CONTROLLER
TS in from
channel decoder MPEG
CI/CA SYSTEM LVDS for
TS out/in for PROCESSOR PRIMARY flat panel display
PCMCIA VIDEO LVDS (single or dual
OUTPUT channel)
DV-ITU-656 DV INPUT
AV-PIP
SUB-PICTURE
VIDEO
CVBS, Y/C, 3D COMB
DECODER
RGB
SECONDARY VIDEO
VIDEO ENCODER analog CVBS
OUTPUT
AUDIO DSP
Dual SPDIF I2S
AUDIO IN AUDIO OUT
I2S SPDIF
300 MHz
AV-DSP
HDMI
Dual HDMI
RECEIVER DRAWING
ENGINE
I2C PWM GPIO IR ADC SPI UART I2C GPIO Flash USB 2.0 CA PCI 2.2
x 22 x 10
Pin Configuration
ball A1
index area 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33
A
B
C
D
E
F
G
H
J
K PNX8543xEH
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
AG
AH
AJ
AK
AL
AM
AN
AP
Transparent top view
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2009-Apr-03
EN 54 8. Q548.1E LA IC Data Sheets
RXDV/MA11
RXER/MA10
MA4/EECLK
TXD3/MA15
TXD2/MA14
TXD1/MA13
TXD0/MA12
RXD3/MA9
RXD2/MA8
RXD1/MA7
RXD0/MA6
COL/MA16
MA3/EEDI
AUXVDD
AUXVDD
AUXVDD
AUXVDD
RXCLK
TXCLK
RXOE
TXEN
MDIO
M DC
C RS
M A5
VSS
VSS
VSS
VSS
VSS
VSS
NC
NC
C1
X2
X1
TPRDP/M TPTDP/M
3V DSP Physical Layer
33
32
31
30
29
28
36
35
34
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
NC 37 144 MA2/LED100N
38 143 MA1/LED10N
VSS
IAUXVDD 39 142 MA0/LEDACTN
VREF 40 141 MD7
RESERVED 41 Pin1 140 MD6
Test data out
MII Mgt
139 MD5
MII RX
42
MII TX
Identification
Test data in
NC
NC 43 138 MD4/EEDO
VSS 44 137 AUXVDD
25 MHz Clk TPRDM 45 136 VSS
TPRDP 46 135 MD3
SRAM IAUXVDD 47 134 MD2
48 133 MD1/CFGDISN
RX-2 KB REGEN
132 MD0
VSS 49
RAM MII RX RESERVED
VSS
50
51
131
130
MWRN
MRDN
SRAM MII TX 129 MCSN
RXFilter BIST Interface MII Mgt
VSS
TPTDM
52
53 128 EESEL
.5 KB
SRAM
TX-2 KB
Logic Logic BIOS ROM Cntl
BIOS ROM Data
EEPROM/LEDs
TPTDP
VSS
AUXVDD
VSS
AUXVDD
54
55
56
57
58
DP83816 127
126
125
124
123
RESERVED
NC
NC
NC
PWRGOOD
PMEN/CLKRUNN 59 122 3VAUX
PCICLK 60 121 AD0
INTAN 120 AD1
Rx rd data
61
Tx rd data
BROM/EE
AD2
Rx wr data
119
Tx wr data
RSTN 62
MII Mgt
R x A ddr
MII RX
Tx Addr
MII TX
100
101
102
103
104
105
106
107
108
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
PCI AD
PCIVDD
VSS
VSS
PCIVDD
AD25
AD24
C B EN 3
IDSEL
AD23
AD22
AD21
AD20
AD19
AD18
AD17
AD16
CBEN2
IRDYN
CBEN1
AD15
AD14
AD13
AD12
AD11
AD10
FRAMEN
TRDYN
DEVSELN
STOPN
PERRN
SERRN
PAR
PCIVDD
VSS
NC
DP83816 NC
F_15710_167.eps
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2009-Apr-03
IC Data Sheets Q548.1E LA 8. EN 55
Block Diagram
1 F
0.22 F
LIN BSR
22 H 470 F
RIN ROUT
1 F 0.68 F
PGNDR
PGNDL 0.68 F
1 F
BYPASS LOUT
22 H 470 F
AGND BSL
0.22 F
PVCCL
AVCC
PVCCR
VCLAMP
Shutdown
SD 1 F
Control
MUTE
GAIN0
GAIN1
} Control
Pin Configuration
PVCCL 1 24 PGNDL
SD 2 23 PGNDL
PVCCL 3 22 LOUT
MUTE 4 21 BSL
LIN 5 20 AVCC
RIN 6 19 AVCC
BYPASS 7 18 GAIN0
AGND 8 17 GAIN1
AGND 9 16 BSR
PVCCR 10 15 ROUT
VCLAMP 11 14 PGNDR
PVCCR 12 13 PGNDR
TERMINAL
24-PIN I/O/P DESCRIPTION
NAME
(PWP)
Shutdown signal for IC (low = disabled, high = operational). TTL logic levels with compliance to
SD 2 I
AVCC
RIN 6 I Audio input for right channel
LIN 5 I Audio input for left channel
GAIN0 18 I Gain select least-significant bit. TTL logic levels with compliance to AVCC
GAIN1 17 I Gain select most-significant bit. TTL logic levels with compliance to AVCC
Mute signal for quick disable/enable of outputs (high = outputs switch at 50% duty cycle, low =
MUTE 4 I
outputs enabled). TTL logic levels with compliance to AVCC
BSL 21 I/O Bootstrap I/O for left channel
PVCCL 1, 3 P Power supply for left-channel H-bridge, not internally connected to PVCCR or AVCC
LOUT 22 O Class-D 1/2-H-bridge positive output for left channel
PGNDL 23, 24 P Power ground for left-channel H-bridge
VCLAMP 11 P Internally generated voltage supply for bootstrap capacitors
BSR 16 I/O Bootstrap I/O for right channel
ROUT 15 O Class-D 1/2-H-bridge negative output for right channel
PGNDR 13, 14 P Power ground for right-channel H-bridge.
PVCCR 10, 12 P Power supply for right-channel H-bridge, not connected to PVCCL or AVCC
AGND 9 P Analog ground for digital/analog cells in core
AGND 8 P Analog ground for analog cells in core
Reference for preamplifier inputs. Nominally equal to AVCC/8. Also controls start-up time via
BYPASS 7 O
external capacitor sizing.
AVCC 19, 20 P High-voltage analog power supply. Not internally connected to PVCCR or PVCCL
Connect to ground. Thermal pad should be soldered down on all applications to properly
Thermal pad Die pad P
secure device to printed wiring board.
18440_302_090303.eps
090303
2009-Apr-03
EN 56 8. Q548.1E LA IC Data Sheets
Block Diagram
PNX51xx
MEMORY
CONTROLLER
TM327x 1
LVDS RX 1 GIC 1
Video
UIP L3K7
TM327x 2
GIC 2
LVDS RX 2
TM327x 3
GIC 3
PCI/XIO
LVDS TX 1
I2C Video
LVDS TX 2
I2C-DMA
CPIPE L3K7
I2C
GFX LVDS TX 3
LVDS TX 4
UART UART
16 X GPIO
EJTAG
CLOCK CAB
AUDIO IN
AUDIO OUT
Pin Configuration
ball A1
index area 2 4 6 8 10 12 14 16 18 20 22 24 26
1 3 5 7 9 11 13 15 17 19 21 23 25
A
B
C
D
E
F
G
H PNX51xx
J
K
L
M
N
P
R
T
U
V
W
Y
AA
AB
AC
AD
AE
AF
2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 57
9. Block Diagrams
Wiring Diagram 32" (Frame)
WIRING DIAGRAM 32" (FRAME / ROADRUNNER)
8M85
1G51 (B07B)
1. +VDISP-OUT
SSB
8G51
2. +VDISP-OUT
3. +VDISP-OUT
4. +VDISP-OUT
...
B (1150)
8316
8M85 ...
...
51. GND
1M20 (B03G)
8. +5V
7. KEYBOARD
6. LED1
DANGEROUS DANGEROUS 8M20 5. +3V3-STANDBY
5. +24V
3. +24V
1. +24V
6. GND
4. GND
2. GND
HIGH VOLTAGE HIGH VOLTAGE
CN7
4. LED2
3. RC
2. N.C.
1. HV1
3. HV1
2. N.C.
1. HV2
3. HV2
2. GND
CN2
CN3
1. LIGHT-SENSOR
8. +12V 8. +12V
7. +12V 8M95 7. +12V
6. +12V 6. +12V
5. GND1 5. GND
(OPTIONAL)
4. GND1 4. GND
MAIN POWER SUPPLY 3. GND1 3. GND
2. STANDBY 2. STANDBY
IPB PLHL-T826B 1. 3V3_ST 1. +3V3-STANDBY
(1005)
1M99 (B01B)
AMBI-LIGHT MODULE
CN5 12. GND
12. GND1 11. SDA-SET
(1114)
(1175)
1. +12V
1735 (B06A)
4. RIGHT-SPEAKER
(OPTIONAL)
3. GNDSND
AL
2. GNDSND
T3.15A 1. LEFT-SPEAKER
CN1
1. N
2. L
1736 (B06A)
AMBI-LIGHT MODULE
3. RIGHT-SPEAKER
2. GNDSND
1. LEFT-SPEAKER
1M83 (AL1)
14. GND
8736 13. VLED2
12. GND
11. VLED1
10. PROG
(1176)
9. TEMP-SENSOR
8. EEPROM-CS
7. GND
6. +3V3
5. CONTROL-2
AL
4. CONTROL-1
3. SDA
Board Level Repair
INLET
2. GND
8308 1. SCL
18560_400_090326.eps
090401
2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 58
8M85
1G51 (B07B)
1. +VDISP-OUT
SSB
8G51
2. +VDISP-OUT
3. +VDISP-OUT
4. +VDISP-OUT
...
B (1150)
8316
8M85 ...
...
51. GND
1M20 (B03G)
8. +5V
7. KEYBOARD
6. LED1
8M20 5. +3V3-STANDBY
2. N.C.
1. HV1
3. HV1
2. N.C.
1. HV2
3. HV2
5. +24V
3. +24V
1. +24V
6. GND
4. GND
2. GND
CN2
CN3
CN7
4. LED2
3. RC
2. GND
1. LIGHT-SENSOR
8. +12V 8. +12V
7. +12V 8M95 7. +12V
6. +12V 6. +12V
5. GND1 5. GND
4. GND1 4. GND
MAIN POWER SUPPLY 3. GND1 3. GND
2. STANDBY 2. STANDBY
IPB DPS-298CPA B 1. 3V3_ST 1. +3V3-STANDBY
(1005)
1M99 (B01B)
AMBI-LIGHT MODULE
CN5 12. GND
12. GND1 11. SDA-SET
(1114)
(1175)
1. +12V
1735 (B06A)
4. RIGHT-SPEAKER
3. GNDSND
AL
2. GNDSND
FUSE 1. LEFT-SPEAKER
CN1
1. N
2. L
1736 (B06A)
AMBI-LIGHT MODULE
3. RIGHT-SPEAKER
2. GNDSND
1. LEFT-SPEAKER
1M83 (AL1)
14. GND
13. VLED2
12. GND
11. VLED1
10. PROG
(1176)
9. TEMP-SENSOR
8736
8. EEPROM-CS
7. GND
6. +3V3
5. CONTROL-2
AL
4. CONTROL-1
3. SDA
Board Level Repair
INLET
2. GND
8308 1. SCL
RIGHT SPEAKER Component Level Repair IR LED PANEL SUBWOOFER (5214) LEFT SPEAKER
P2 P1
(5213) (1112) + - (5213)
18560_410_090331.eps
090403
2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 59
8M85
1G51 (B07B)
1. +VDISP-OUT
2. +VDISP-OUT
3. +VDISP-OUT
8G51 4. +VDISP-OUT
...
8316
...
...
8M85
51. GND
1M20 (B03G)
8. +5V
CN4
7. KEYBOARD
11. FAN_PWM
6. LED1
10. GND_SND
8M20 5. +3V3-STANDBY
9. +VSND
2. N.C.
1. HV1
3. HV1
2. N.C.
1. HV2
3. HV2
5. +24V
3. +24V
1. +24V
4. LED2
6. GND
4. GND
2. GND
CN2
8. +12V
CN3
CN7
3. RC SSB
7. +12V
6. +12V
5. GND1
2.
1.
GND
LIGHT-SENSOR
B (1150)
4. GND1
3. GND1 1M95 (B01B)
2. STANDBY 11. N.C
1. 3V3_ST 10. GNDSND
9. +AUDIO-POWER
KEYBOARD CONTROL
8. +12V
8M95 7. +12V
CN5 6. +12V
(OPTIONAL)
12. GND1 5. GND
11. I2C_DATA 4. GND
MAIN POWER SUPPLY 10. I2C_SCL 3. GND
9. INV_OK 2. STANDBY
IPB DPS-298CP-4A 8. A/P_DIM 1. +3V3-STANDBY
(1005) 7. BOOST
AMBI-LIGHT MODULE
6. DIM 1M99 (B01B)
5. BL_ON_OFF 12. GND
4. GND1 11. SDA-SET
3. GND1
(1114)
10. SCL-SET
2. +12V 9. POWER-OK
1. +12V 8. GND
8M99 7. BACKLIGHT-BOOST
6. BACKLIGHT-OUT
5. LAMP-ON-OUT
4. GND
3. GND
2. +12VD
(1175)
1. +12VD
1735 (B06A)
(OPTIONAL)
4. RIGHT-SPEAKER
3. GNDSND
AL
2. GNDSND
1. LEFT-SPEAKER
CN1
8308
1. N
FUSE
2. L
8735
1736 (B06A)
AMBI-LIGHT MODULE
3. RIGHT-SPEAKER
INLET 2. GNDSND
1. LEFT-SPEAKER
1M83 (AL1)
14. GND
13. VLED2
12. GND
11. VLED1
10. PROG
(1176)
9. TEMP-SENSOR
8. EEPROM-CS
7. GND
6. +3V3
5. CONTROL-2
AL
4. CONTROL-1
3. SDA
2. GND
Board Level Repair 1. SCL
+ -
+ -
Component Level Repair IR LED PANEL
P2 P1
(1112)
SPEAKER RIGHT (5212) Only For Authorized Workshop 3P 8P SPEAKER LEFT (5211)
18560_412_090331.eps
090403
2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 60
TO TO
BACKLIGHT BACKLIGHT
1G50 (B07B)
1. N.C
2. N.C
...
8G50 ...
...
39. N.C
40. N.C
41. N.C
1G51 (B07B)
1. +VDISP-OUT
2. +VDISP-OUT
3. +VDISP-OUT
8G51 4. +VDISP-OUT
...
8316
...
...
51. GND
1M20 (B03G)
8. +5V
CN4
7. KEYBOARD
11. FAN_PWM
6. LED1
10. GND_SND
8M20 5. +3V3-STANDBY
9. +VSND
2. N.C.
1. HV1
3. HV1
2. N.C.
1. HV2
3. HV2
4. LED2
CN2
8. +12V
CN3
3. RC SSB
7. +12V
6. +12V
5. GND1
2.
1.
GND
LIGHT-SENSOR
B (1150)
4. GND1
3. GND1 1M95 (B01B)
2. STANDBY 11. N.C
1. 3V3_ST 10. GNDSND
9. +AUDIO-POWER
KEYBOARD CONTROL
8. +12V
8M95 7. +12V
CN5 6. +12V
12. GND1 5. GND
11. I2C_DATA 4. GND
MAIN POWER SUPPLY 10. I2C_SCL 3. GND
9. INV_OK 2. STANDBY
IPB DPS-298CP-2A 8. A/P_DIM 1. +3V3-STANDBY
(1005) 7. BOOST
6. DIM 1M99 (B01B)
5. BL_ON_OFF 12. GND
4. GND1 11. SDA-SET
3. GND1
(1114)
10. SCL-SET
2. +12V 9. POWER-OK
1. +12V 8. GND
8M99 7. BACKLIGHT-BOOST
6. BACKLIGHT-OUT
5. LAMP-ON-OUT
4. GND
3. GND
2. +12VD
1. +12VD
1735 (B06A)
4. RIGHT-SPEAKER
3. GNDSND
2. GNDSND
1. LEFT-SPEAKER
CN1
8308
1. N
FUSE
2. L
8735
1736 (B06A)
3. RIGHT-SPEAKER
INLET 2. GNDSND
1. LEFT-SPEAKER
+ -
+ -
IR LED PANEL
(1112) P2 P1
SPEAKER RIGHT (5212) 3P 8P SPEAKER LEFT (5211)
18560_401_090326.eps
090331
2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 61
AMBI-LIGHT MODULE
8316
8M59
(1178)
(1178)
1G50 (B07B) 1M59 (B08E)
1. N.C 1. SCL-AMBI-3V3
2. N.C 2. GND
... 3. SDA-AMBI-3V3
AL
AL
8G50 ... 4. GND
... 5. GND
39. N.C 6. +3V3
40. N.C 7. GND
41. N.C
1G51 (B07B)
1. +VDISP-OUT
2. +VDISP-OUT
1M85 (AL4) 3. +VDISP-OUT
8G51 4. +VDISP-OUT
1M83 (AL1)
1. SPI-CLOCK-BUF 14. GND
2. SPI-DATA-OUT ...
13. VLED2
3. SPI-DATA-RETURN ...
12. GND
4. SPI-LATCH ...
8M90 11. VLED1
5. PWM-CLOCK-BUF 51. GND
10. PROG
6. +3V3 9. TEMP-SENSOR
1M20 (B03G)
KEYBOARD CONTROL
7. BLANK-BU 8. EEPROM-CS
8. EEPROM-CS 8. +5V 7. BLANK
9. TEMP-SENSOR 7. KEYBOARD 6. +3V3
10. PROG 6. LED1 5. CONTROL-2
11. VLED1 5. +3V3-STANDBY 4. CONTROL-1
CN4
5. +24V
3. +24V
1. +24V
6. GND
4. GND
2. GND
2. N.C.
1. HV2
3. HV2
4. LED2
2. N.C.
1. HV1
3. HV1
12. GND
CN7
3. SDA
CN3
CN2
13. VLED2
11. FAN_PWM 3. RC SSB 2. SPI-DATA-IN
14. GND
10. GND_SND
9. +VSND
2.
1.
GND
LIGHT-SENSOR
B (1150) 1. SCL
8. +12V
7. +12V
1M95 (B01B)
8M82
8M95
6. +12V
11. N.C
8M81
5. GND1
10. GNDSND
4. GND1
(1114)
9. +AUDIO-POWER
3. GND1
8. +12V
2. STANDBY
1M83 (AL1) 1. 3V3_ST
7. +12V
1M84 (AL1)
1. SCL 6. +12V
5. GND 14. GND
2. SPI-DATA-IN
4. GND 13. VLED2
3. SDA
5. CONTROL2
4. CONTROL1
12. GND
1M90 (AB1)
1M59 (AB1)
4. CONTROL-1 CN5 3. GND
12. GND1 2. STANDBY 11. VLED1
5. CONTROL-2
10. PROG
7. GND
11. I2C_DATA 1. +3V3-STANDBY
5. +24V
3. +24V
1. +24V
6. +3V3
6. +3V3
6. GND
4. GND
2. GND
2. GND
3. SDA
1. SCL
7. BLANK MAIN POWER SUPPLY 10. I2C_SCL 9. TEMP-SENSOR
8. EEPROM-CS
8. EEPROM-CS 9. INV_OK 1M99 (B01B)
9. TEMP-SENSOR IPB DPS-298CP-2A 8. A/P_DIM 8M99 12. GND
7. BLANK-BUF
6. +3V3
10. PROG (1005) 7. BOOST 11. SDA-SET
DC-DC 5. PWM-CLOCK-BUF
11. VLED1
12. GND
13. VLED2
6. DIM
5. BL_ON_OFF
4. GND1
AB INTERFACE (1179)
10. SCL-SET
9. POWER-OK
8. GND
4. SPI-LATCH
3. SPI-DATA-RETURN
3. GND1 2. SPI-DATA-OUT
14. GND 7. BACKLIGHT-BOOST
2. +12V 1. SPI-CLOCK-BUF
6. BACKLIGHT-OUT
1. +12V 5. LAMP-ON-OUT
1M84 (AB1)
14. GND 4. GND
3. GND
AMBI-LIGHT MODULE
8M20
13. VLED2
12. GND 2. +12VD
1. +12VD
AMBI-LIGHT MODULE
11. VLED1
10. PROG
9. TEMP-SENSOR 1735 (B06A)
8. EEPROM-CS 4. RIGHT-SPEAKER
7. BLANK-BUF 3. GNDSND
6. +3V3 2. GNDSND
5. PWM-CLOCK-BUF 1. LEFT-SPEAKER
8308 4. SPI-LATCH1CONN
8735
3. SPI-DATA-RETURN
2. SPI-CLOCK-BUF 1736 (B06A)
3. RIGHT-SPEAKER
INLET
CN1
1. SPI-LATCH2CONN
(1177)
1. N
FUSE 2. GNDSND
2. L
1. LEFT-SPEAKER
(1177)
AL
8M84
AL
1M84 (AL1) 1M83 (AL1)
1. SPI-CLOCK-BUF
14. GND
2. SPI-DATA-OUT
13. VLED2
3. SPI-DATA-RETURN
12. GND
4. SPI-LATCH
11. VLED1
5. PWM-CLOCK-BUF
10. PROG
6. +3V3
7. BLANK-BUF Board Level Repair 9. TEMP-SENSOR
8. EEPROM-CS
8. EEPROM-CS
7. BLANK
9. TEMP-SENSOR
6. +3V3
10. PROG
5. CONTROL-2
11. VLED1
Component Level Repair 4. CONTROL-1
+ -
+ -
12. GND
3. SDA
13. VLED2
14. GND Only For Authorized Workshop IR LED PANEL
2. SPI-DATA-IN
1. SCL
(1112) P2 P1
SPEAKER RIGHT (5212) 3P 8P SPEAKER LEFT (5211)
18560_411_090331.eps
090401
2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 62
1G50 (B07B)
INVERTER
1. N.C
2. N.C
...
CN2/1319 ...
14. PDIM_Select 8G50
CN6/1M95 ...
8316
13. PWM
11. FAN_PWM 39. N.C
12. On/Off
10. GND_SND 40. N.C
11. Vbri
9. +VSND 41. N.C
10. GND3
9. GND3 8. +12V
8. GND3 7. +12V 1G51 (B07B)
7. GND3 6. +12V 1. +VDISP-OUT
5. GND1 2. +VDISP-OUT
INVERTER 6. GND3
5. 24Vinv 4. GND1
8G51
3. +VDISP-OUT
4. 24Vinv 3. GND1 4. +VDISP-OUT
3. 24Vinv 2. STANDBY ...
2. 24Vinv 1. 3V3_ST ...
1. 24Vinv ...
51. GND
CN3/1316 CN7/1M99
12. N.C. 12. GND1 1M20 (B03G)
11. I2C_DATA 8. +5V
11. N.C.
10. GND3 MAIN POWER SUPPLY 10. I2C_SCL 7.
6.
KEYBOARD
LED1
9. GND3 9. INV_OK
8. GND3 PSU DPS-411AP3A B 8. A/P_DIM 8M20 5.
4.
+3V3-STANDBY
LED2
7. GND3 (1005) 7. BOOST
6. DIM 3. RC SSB
6. GND3
5. 24Vinv
4. 24Vinv
5. BL_ON_OFF
4. GND1
2.
1.
GND
LIGHT-SENSOR
B (1150)
3. 24Vinv 3. GND1
2. 24Vinv 2. +12V 1M95 (B01B)
1. 24Vinv 1. +12V 11. N.C
10. GNDSND
9. +AUDIO-POWER
KEYBOARD CONTROL
8. +12V
7. +12V
8319
8M95
6. +12V
5. GND
4. GND
3. GND
2. STANDBY
1. +3V3-STANDBY
1M99 (B01B)
12. GND
11. SDA-SET
CONNECTOR
(1114)
10. SCL-SET
INVERTER
9. POWER-OK
8. GND
8M99 7. BACKLIGHT-BOOST
6. BACKLIGHT-OUT
5. LAMP-ON-OUT
4. GND
3. GND
2. +12VD
1. +12VD
FUSE
1735 (B06A)
4. RIGHT-SPEAKER
CN1/1308
3. GNDSND
2. GNDSND
1. LEFT-SPEAKER
8308
1. N
2. L
1736 (B06A)
3. RIGHT-SPEAKER
INLET 2. GNDSND
1. LEFT-SPEAKER
+ -
+ -
IR LED PANEL
(1112) P2 P1
SPEAKER RIGHT (5212) 3P 8P SPEAKER LEFT (5211)
18560_402_090326.eps
090401
2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 63
68P
A_N TO DISPLAY
PCMCIA AL18 RX51001B+ AC20
B_P TX2 1080p 50/60Hz
CA-MDI(0-7) CA_MDI AK18 RX51001B- AD20
17 B_N 37
AP19 RX51001C+ AC19
PCMCIA-VCC-VPP C_P
CONDITIONAL 18 AN19 RX51001C- AD19 38
C_N
ACCESS 33 AP20 RX51001D+ AE19
D_P 39
RX51001D-
51
52
D_N
E_P
AN20
AM20
AL20
RX51001E+
RX51001E-
AF19
AE18
AF18
PNX5100 N.C.
40
41
E_N
7303 AM19 RX51001CLK+ AC18 E17
1301 CLK_P +3V3
DRX3926K AL19 RX51001CLK- AD18 QUAD LVDS
HD1816AF/BHXP
4302 3306 2364 33AA 2365
CLK_N
HD-NM E14
+3V3
1920x1080
1G51
51
10 PDP 47 AP22 RX51002A+ AE17
FE-DATA(0-7) TNR_TSDI
IF-OUT1 PD_P LOUT2_A_P
RX51002A- FHD 100Hz 100/120HZ 50
5311
AN22 AF17
4303 2367 33AC 2368 LOUT2_A_N I2C 49
11 PDN 48 AL22 RX51002B+ AC17
IF-OUT2 PD_N LOUT2_B_P TX3
B03E ANALOG VIDEO AK22 RX51002B- AD17 40
7302 3311 LOUT2_B_N
44 SIF F2 AP23 RX51002C+ AC16
UPC3221GV SIF AI51 LOUT2_C_P
+5V-TUNER AN23 RX5100C- AD16
DEMODULATOR 7345 LOUT2_C_N
1 AGC AMPLIFIER 43 3348 4314 CVBS H3 AP24 RX51002D+ AE16 TX4
CVBS AI44 LOUT2_D_P TO DISPLAY
MAIN HYBRID VCC AN24 RX51002D- AF16 11
LOUT2_D_N 1080p 100/120Hz
TUNER 1
1303
5 2306 2 7 3303 IF-N 39 4315 CVBS-TER-OUT LOUT2_E_P
AM24 RX51002E+ AE15
AL24 RX51002E- AF15 5
LOUT2_E_N 4
2307 3304 8,18,26,53 AM23 RX51002CLK+ AC15
2 4 3 6 IF-P 40 VDDH +3V3B LOUT2_CLK_P
2,16,27,56 AL23 RX51002CLK- AD15 3
IN OUT VDDL +1V2 LOUT2_CLK_N
SAW 36M125 37 2
4 49 VDDAH_AFE1 +3V3A
AGC CONTROL XI 42 B08A 1
VDDAH_CVBS +3V3E AK19 +VDISP-OUT
1304 52 IREF_LVDS VDDA-LVDS SUPPLY
VDDAH_OSC +3V3D AB20
+3V3A 27M +3V3
36,46 AA5
50 VDDAL_AFE +1V2A +1V2-PNX5100
XO L16
3305
+5V-TUNER +1V8-PNX5100
P22
IF-AGC 34 +1V2-PNX5100-DDR-PLL1
IF_AGC AB18
3301
+3V3-PNX5100-LVDS-IN
3 33 J5
RF-AGC +1V2-PNX-TRI-PLL1
PNX8543
RF-AGC RF_AGC L5
+1V2-PNX-TRI-PLL2
T5
+1V2-PNX-TRI-PLL3
M22
+1V2-PNX5100-DLL
B05A HDMI 1H03
B04B ANALOG IO - SCART 1&2 AE25
7F02 +3V3-PNX5100-DDR-PLL0
1 74HC4053PW E15
DRX2+ +1V2-PNX5100-LVDS-PLL
16 B15
3 DRX2- MDX +5V +3V3-PNX5100-LVDS-PLL
H264 AE14
1
4
2
DRX1+ +1V2-PNX5100-CLOCK
5 CVBS-TER-OUT AD14
6 DRX1- 14 +3V3-PNX5100-CLOCK
7F07-7F08
7
9
DRX0+
DRX0-
1F01
7F03
1 Y_CVBS-MON-OUT-SC Y-CVBS-MON-OUT A3
CVBS1Y_P USB 2.0
18
10 19
DRXC+ 9,10,11 7F01
HDMI SIDE 12 DRXC- REGIMBEAU_CVBS-SWITCH P24
1 B03H VREF PNX5100-DDR2-VREF-CTRL
CONNECTOR
CONTROL 7C01
1H01 8 AV1_STATUS
EXT 1 B03H B03A VDD EDE5116AJBG
7 7F06
1 CRX2+ CONTROL
16 AV1_BLK AJ6
3 CRX2- 11 B03H VDDA_3V3_AADC VDDA-DAC DDR2
(0-12)
SDRAM
1
15
16 AI32 VDDA_3V3_ADAC VDDA-ADC
6 CRX1-
7 SC1-B L2 AK20 J1
7 CRX0+ 20
21 AI22 VDD_3V3_LVDS VDDA-LVDS D PNX5100-DDR2-D(0-15) VDDL +1V8-PNX5100
J2
9 CRX0- SCART1 11 SC1-G N2 F16 VREF PNX5100-DDR2-VREF-DDR
RREF-PNX85XX
18
AI12 VDDA_HDMI_3V3_BIAS
19
10 CRXC+
20 CVBS1 G4 AC6 7C02
HDMI 1 12 CRXC- AI41 VDD_3V3_SBPER +3V3-STANDBY
EDE5116AJBG
CONNECTOR 1F02 AJ12
7F04 VDD_1V2_CORE +1V2-PNX85XX
1H00 19 AF5 DDR2
VDD_1V2_SBCORE 1V2-STANDBY A PNX5100-DDR2-A(0-12)
1 BRX2+ SDRAM
7 AV2-PB_SC2-B L3 AI23 AJ21
3 BRX2- 1
VDD_3V3_PER +3V3-PER
1
J1
2
AI42
19
10 BRXC+ 16
15
7F05 B03G PNX8543 - CONTROL MIPS/FLASH/PCI
HDMI 2 12 BRXC- 16 AV2-BLK_LCD-SDA B03G CONROL +5V
20
21
B03H
CONNECTOR
SCART2 CONTROL
8 AV2-STATUS
1H02 B03H
3M31
1 ARX2+ CONTROL 1M09
+T
3 ARX2- AL16 USB-OC 1
USB_FAULT USB 2.0
B04C YPBR / SIDE IO / S-VIDEO
1
AN16 USB20-DM 2
1
3 2
USB_DM
6 ARX1- AP16 USB20-DP 3 SW UPLOAD
1G30 USB_DP
4 JPEG
4
7 ARX0+ 1 R-VGA K4 PC3_AI3 AM17 3M21 MP3
9 ARX0- USB_RPU +3V3-PER
2 G-VGA P4
18
10
19
15
CONNECTOR
11
14 V-SYNC-VGA T2
VSYNCIN 7M00
B03G PCI NAND01GW3B2BN6F
7H11 VGA
TDA9996 CONNECTOR NAND
CRX2+ 72 90 DRX2+ 1G22 FLASH
PCI PCI-AD<->NAND-AD
CRX2- 71 89 DRX2- 7 AV3-PR K1 1G
DRX1+ PR PC3_AI1
CRX1+ 69 87
12,37
68 86 DRX1- 12 AV3-Y P1 VCC +3V3-NAND
CRX1- EXT 3
RXC RXD 84 DRX0+ Y PC1_AI1
CRX0+ 66
65 83 DRX0- 9 AV3-PB M1
CRX0-
81 DRXC+ PB PC2_AI1
63 B03F MEMORY
CRXC+
HDMI 80 DRXC-
B03F PNX8543 - SDRAM
CRXC- 62
BRX2+ 42
SWITCH 1G20
AA31 3B03
M_IREF +1V8-PNX85XX
BRX2- 41 8,45,91,24, AB32
2 FRONT-Y_CVBS H2 M_VREF DDR2-VREF-CTRL
BRX1+ 39 75,95 CVBS AI43
VDDx_1V8 VDD_1V8
BRX1- 39 4 SIDE 7B01
RXB VDDO_3V3 VDDO_3V3 FRONT-C G1
36 46,55 I/O 1G37 AI54 EDE1116AEBG
BRX0+ VDDx_3V3 VDDS_3V3 1
BRX0- 35 3
15,21,34,40,
BRXC+ 33 64,70,85,88 SVHS IN 5 SDRAM
VDDH_3V3 VDDH_3V3 4 (0-12)
BRXC- 32 2
18560_403_090326.eps
090326
2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 64
68P
PCMCIA VDDA_3V3_DAC VDDA-DAC PVCC_L +AUDIO-POWER
CA-MDI(0-7) 10,12 5L08
CA_MDI PVCC_R
17 1735
PCMCIA-VCC-VPP
CONDITIONAL 18 ADAC(1) 5 22 LEFT-SPEAKER 1
AN14 OUT-L
ACCESS ADAC1 IN-L
33
51
CLASS D 5L09 2
POWER
52 SPEAKER L
AMPLIFIER
3
AP13 ADAC(2) 6
7303 ADAC2 IN-R
1301 DRX3926K
HD1816AF/BHXP 15 RIGHT-SPEAKER 4
OUT-R
10 4302 3306 2364 33AA 2365 PDP 47 A-STBY 2 SPEAKER R
FE-DATA(0-7) TNR_TSDI B03H STANDBY SD
IF-OUT1 PD_P
5311
1736
11 4303 2367 33AC 2368 PDN AC5 3L17
48 AUDIO-MUTE MUTE 4 1
IF-OUT2 PD_N PO_7 MUTE
B03E ANALOG VIDEO 5L10
7302 3311 2
44 SIF F2
UPC3221GV SIF AI51 7L03
+5V-TUN 3
DEMODULATOR 7345 A-STBY STANDBY &
1 AGC AMPLIFIER 43 3348 4314 CVBS H3 PROTECTION SUBWOOFER
MAIN HYBRID VCC CVBS AI44
(OPTIONAL)
TUNER 1
1303
5 2306 2 7 3303 IF-N 39
B03C PNX8543 - AUDIO AMPLIFIER B04C YPBR / SIDE IO / S-VIDEO
2307 3304 8,18,26,53
2 4 3 6 IF-P 40 VDDH +3V3B
2,16,27,56 7807-1 7807-2
SAW 36M125 IN OUT VDDL +1V2
37 AD1 AUDIO-RESET A-PLOP B04B
4 49 VDDAH_AFE1 +3V3A PO_6
AGC CONTROL XI 42 B04C
VDDAH_CVBS +3V3E
1304 52
+3V3A 27M VDDAH_OSC +3V3D
36,46
PNX8543
50 VDDAL_AFE +1V2A
XO 7830
3305
+3V3A
TPA6111A2DGN
IF-AGC 34
IF_AGC
3305
HEADPHONE
3 RF-AGC 33
RF-AGC RF_AGC AMPLIFIER
AUDIO-RESET 5
SHUTDOWN 1G21
B05A HDMI 1H03 B04B ANALOG - SCART 1&2 B03C PNX8543 - AUDIO B03D AUDIO H264 AM12 ADAC(3) 2
VO_1
1 HP_LOUT 2
8
1 HEADPHONE
OUT 3.5mm
ADAC4 IN-2 VDD +3V3
1
4
2
DRX1+ 3F02
6 1 AP-SCART-OUT-R AUDIO-CL-R 7 5 ADAC(8) AL8 ADAC8
DRX1- 7
7 DRX0+ EXT 1
11
6 AUDIO-IN1-L AN7 AIN_1_L
9 DRX0-
18
19
10 DRXC+ 16
15
B03G PNX8543 - CONTROL MIPS/FLASH/PCI
12 2 AUDIO-IN1-R AP7
HDMI SIDE DRXC- 20
AIN_1_R
21
CONNECTOR
1H01 SCART1
1F02
1 CRX2+
1 3 AP-SCART-OUT-L 7F00
3 CRX2- A-PLOP
A-PLOP B03C
1
4 CRX1+
2
7 1 AP-SCART-OUT-R
6 CRX1- B03G CONROL +5V
7 EXT 2 11
CRX0+
6 AUDIO-IN2-L AK6
9 CRX0- 15 AIN_2_L
3M31
18
16
19
10 CRXC+ 1M09
2 AUDIO-IN2-R AL6
+T
HDMI 1 12 CRXC- 20
21 AIN_2_R AL16 USB-OC 1
USB_FAULT USB 2.0
1
CONNECTOR SCART2 AN16 USB20-DM 2 CONNECTOR SIDE
3 2
USB_DM
1H00 AP16 USB20-DP 3 SW UPLOAD
USB_DP JPEG
1 4
4
BRX2+
3 BRX2- B04C YPBR / SIDE IO / S-VIDEO USB_RPU
AM17 3M21
+3V3-PER
MP3
1
AN17 3M23
2
4 BRX1+
6 USB_VBUS +3V3-PER
BRX1-
7 BRX0+ 1G25 7M00
9 BRX0- 7G01 B03G PCI
18
DIGITAL EF NAND01GW3B2BN6F
19
2 SPDIF-OUT-1 V1
10 BRXC+ SPDIF_OUT
AUDIO
HDMI 2 12 BRXC- OUT NAND
CONNECTOR 4 AUDIO-OUT-L 8 7803-3/4 10 ADAC(5) AN11 FLASH
ADAC5 PCI PCI-AD24<->NAND-AD
1H02 AUDIO OUT 1G
L+R 6 AUDIO-OUT-R 14 12 ADAC(6) AP10
1 ARX2+ ADAC6
3 ARX2- 12,37
1
7G00 +3V3-NAND
2
4 ARX1+ A-PLOP
1G22 A-PLOP B03C
6 ARX1-
5 AUDIO-IN3-L AM6
7 ARX0+ AIN_3_L
9
18
BRX2+ 42
SWITCH EDE1116AEBG
2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 65
1304
27M
DEMODULATOR
17 E19 TX1CLK+ 24
50 TO
9 FE-CLK B10 9
1N02
TNR_MICLK E20 TX2CLK- DISPLAY
PNX5100
25M
MAC 10 FE-VALID C10
PHYTER II TNR_MIVAL AL23 RX51002CLK- AE16
5 FE-SOP B9 TNR_MISTRT LOUT2_CLK_N E21 TX2CLK+ 8
ETHERNET 18 32
10/100 Mb/S B03G
RESET-SYSTEM
AM23 RX51002CLK+ AD16
CONNECTOR LOUT2_CLK_P
PCI-CLK-ETHERNET 60 AL19 RX51001CLK- AD19
B03G CLK_N 1G51
RESET-ETHERNET 62 PCI-AD(0-31) B05C PCMCIA 1K00
RX51001CLK+ AC19 33
B03H AM19 E10 TX3CLK-
1 CLK_P
CA-MICLK H32
CA_MICLK PNX8543 E11 TX3CLK+ 32
TO
CA-MDI(0-7) CA_MDI
E12 TX4CLK- 17 DISPLAY
61 IRQ-PCI 7K04-7K05 A34
COMMON INTERFACE
CA_VSN_0 16
MOCLKA CA-MOCLK_VS2 H31 E13 TX4CLK+
CA_MOCLK
MDO(0-7) CA-MDO(0-7) CA_MDO
OPTIONAL
B08 PNX5100 7K03 CA-DATADIR D31
CA_DATA_DIR B03F MEMORY B03F PNX8543 - SDRAM
PCMCIA CA-DATAEN A31
CA_DATA_EN 7B00
7C00
PNX5100EH/M2 EDE1116AEBG
PCMCIA-D(0-7) PCI-AD(24-31)
M_DQ DDR2-D(0-31)(0-15) 7B01
B08C CONTROL CONDITIONAL
7K00 EDE1116AEBG
AF24 RESET-PNX5100 ACCESS
B03H 7K01
CA-ADDEN B31
CA_ADD_EN
M_A DDR2-A(0-12)
PNX5100 AE13 PCMCIA-A(0-14) PCI-AD(0-14)
SDRAM
AB34 DDR2-CLK_P J8
1CD0
27M
7M00
L3 PCI-CLK-PNX5100 NAND01GW3B2BN6F
B03G PCI-CLK-OUT 3M30 PCI-CLK-PNX5100
AP28
PLL_OUT B08C
3M46
NAND-AD(0-7) <-- PCI-AD(24-31)
NAND A30 PCI-CLK-PNX8543
TRDY_CLK
FLASH 7 XIO-ACK A20
XIO_ACK
WP-NANDFLASH 19
(1G) 9 XIO-SEL-NAND B20
XIO_SEL_0
B03G CONTROL
B08B DDR2 B08B PNX5100 - SDRAM AN28 RESET-SYSTEM
IRQ-CA L34 RESET_SYS B02A B03H
GPIO_3
IRQ-PC1 U4 U3 WC-EEPROM-PNX5100_SPI-DI
7C01 GPIO_2 GPIO_2 B04C
1M09
EDE5116AJBG V2 PNX8543-LCD-PWR-ON_SPI-DI
1 USB-OC AL16 GPIO_6 B07B 1M04
PNX5100-DDR2-D(0-31) 7C02 USB_FAULT
1
DDR2-A(0-12) 1 CONNECTOR
STANDBY
AD2 B03H
SDRAM P0_5
P26 PNX5100-DDR2-CLK_P J8 1M20 B03H PNX8543 - STANDBY-CONTROL / DEBUG
1 LIGHT-SENSOR AN2
P25 PNX5100-DDR2-CLK_N K8 CADC_1
2 B03H
3 RC 4D00 RC_uP AF2 P1_0 1M01
AG1 RXD-UP 3
UA_RX_0
TO IR/LED PANEL 4 LED2 AJ2
PWM_1 TXD-UP 1
AND KEYBOARD CONTROL AH5
5 UA_TX_1 FOR
B08C GPIO +3V3-STANDBY 7M81 2 FACTORY USE
6 LED1 AJ3 PWM_0 2D08 ONLY
B23 PNX5100-BL-CTRL AG2 SDM
P1_7 4
7 KEYBOARD AN3 SDM
CADC_0
RES
8 2D07
+5V P6_4 AK2 SPI-PROG
SPI-PROG
B07B DISPLAY INTERFACE B07A DISPLAY INTERFACE (COMMON) B03H PNX8543 - STANDBY-CONTROL / DEBUG
DETECT-12V 4D09 DETECT2 AD3 7D06
B01B P2_5 M24C64-WDW6P
7D07
DETECT1 AD4
B01A P2_4 RESET-NVM
P0_1 AC1 8
EEPROM
RESET-SYSTEM AH3 P3_3
B03G
W1
(8Kx8)
AV1-BLK AH1 XTAL_I
B04B P3_5
1D00
AV2-BLK_LCD-SDA AH2
27M
B04B P3_4
AV1-STATUS AP2 7D09
B04B CADC_2 W2
XTAL_O M25P05-AVMN6P
3P24 BACKLIGHT-IN BACKLIGHT-OUT AV2-STATUS AP1
B04B CADC_3
CONTROL B01B
AJ1 SPI-CLK 6
+3V3-STANDBY 7D05 SPI_CLK 512K
NCP303LSN30G AK4 SPI-WP 3
P6_5 FLASH
AK3 SPI-CSB 1 B01B DC / DC +3V3-STANDBY_+1V2-STANDBY
SPI_CSB
SPI-SDO 5
OUTP 1 RESET-STBY AF3
RESET_IN SPI_SDO
AJ4
2 AK1 SPI-SDI 2
INP SPI_SDI
1M99
3 LAMP-ON-OUT 5
GND P2_2 AE1
ENABLE-3V3 6 TO
AE4 BACKLIGHT-OUT
P2_7 B01A B01B B07A POWER
B05A HDMI 7H09 AF1 REGIMBEAU_CVBS-SWITCH BACKLIGHT-BOOST 7 SUPPLY
CEC-HDMI AG4 P1_1 B04B N.C.
CONTROL P1_2
POWER-OK 9
7H11 P2_6 AE5
TO PIN:
TDA9996 AD1 AUDIO-RESET
1H02-13 B05A HDMI_DV P0_6 B03C
1H00-13 CEC 57
1H01-13 AC5 AUDIO-MUTE
1
2
BRX-DDC-CLK 31
19
1H00-15
CRX-DDC-CLK 61
4x HDMI 1H01-15
DRX-DDC-CLK 79
CONNECTOR 1H03-15
18560_405_090326.eps
090331
2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 66
7600 +3V3-PER
PNX85433EH/M2A
SSB BUS
400 kHz
3M27
3M26
G32 SDA3 3M19 SDA-SSB
SDA 3
D33 SCL3 3M18 SCL-SSB
SCL 3
3H66
3H65
3CDD
3CDC
3399
3398
3CD8
3CD9
+3V3
PNX8543 ERR
ARX-5V
13 B03F PNX8543 - SDRAM 49 50 24 23 5 6 K1 K2
AMBILIGHT BUS
B03F +3V3B 30 kHz
3388
3365
3H08
3H07
7B01 1H02 1M59
EDE1116AEBG 7H11 7303 TUNER BUS 7CD0 7C00 3CDA
11 ARX-DDC-DAT 16 400 kHz L1 SDA-AMBI-3V3 3
MEMORY TDA9996 DRX3926K-XK M24C08 PNX5100EH
3388
3365
7B00 HDMI
M_DQ DDR2-D L2 3CD9 1
EDE1116AEBG 12 ARX-DDC-CLK 15 CONNECTOR 3 SCL-AMBI-3V3
HDMI DEMODULATOR 61 SDA-TUNER EEPROM PNX5100
MUX BRX-5V MICRONAS 2
M_A DDR2-A SDRAM 62 SCL-TUNER
4 TO AMBILIGHT
ERR ERR ERR ERR ERR
3H10
3H09
5 (OPTIONAL)
3317
3316
23 1H00 27 25 15 21
B05A +5V
30 BRX-DDC-DAT 16 7
7 6
HDMI 5CE5 1CE2 6
HDMI_DV
3H01
3H02
31 BRX-DDC-CLK 15 CONNECTOR 2 +3V3
1301 T1.0A
D15 DDC-SDA 6 CRX-5V HD1816AF
DDC_SDA_B
DDC_SCL_B
C15 DDC-SCL 5 MAIN B08B PNX5100 - SDRAM
3H14
3H13
1H01 TUNER
B03G PNX8543 - CONTROL 60 CRX-DDC-DAT 16 7C01
MIPS/FLASH/PCI EDE5116AJBG
HDMI ERR
B03G CRX-DDC-CLK 15 34
7M00 61 CONNECTOR 1 7C02
PNX5100-DDR2-D(0-31)
NAND01GW3B2 DRX-5V EDE5116AJBG
PCI
FLASH PNX5100-DDR2-A(0-12) SDRAM
1G
3H12
3H11
PCI_AD PCI-AD 1H03
78 DRX-DDC-DAT 16 HDMI
CONNECTOR
79 DRX-DDC-CLK 15
SIDE
+3V3-PER
+5V
SET BUS
100 kHz
3M93
3M92
3G60
3G56
1G30
B33 SDA2 3M91 SDA-SET
10
15
12 DATA-SDA
5
SDA 2
D32 SCL2 3M90 SCL-SET
SCL 2 15 CLK-SCL
6
11
3G61
3G58
ERR +3V3-PER
14 VGA
STANDBY BUS CONNECTOR 5 6
400 kHz
3M25
3M24
1M99 7G31
H33 SDA1 3M15 SDA-UP-MIPS 4202 11 WC-EEPROM-PNX5100_SPI-DI 7G32 7 M24C02
SDA 1 TO B03G
F33 SCL1 3M14 SCL-UP-MIPS 4201 10 POWER
SCL 1 EEPROM
SUPPLY
RES 256x8
3G63
B03H PNX8543 - STANDBY - CONTROL / DEBUG
+3V3
+3V3-STANDBY
B03H
3D39
3D38
5 6
7D07
AC1 RESET-NVM 3D56-1 8 7D06
PO_1 M24C64
7D09 EEPROM
ERR M25P05 (NVM)
53
512K
FLASH
+3V3-STANDBY
3D21
3D22
1M01
AG1 RXD-UP 3M74 3
UA_RX_0
AH5 TXD-UP 3M73 1
UA_TX_1 FOR
2 FACTORY USE
ONLY
B04A BOLT-ON 4
+3V3-PER
RES
3M09
3M10
1M04
L32 RXD-MIPS 4E18 RXD 3M76
3
GPIO_4
4E19 3M75 UART
L31 TXD-MIPS TXD 2
GPIO_5 SERVICE
1 CONNECTOR
18560_406_090326.eps
090331
2009-Apr-03
Block Diagrams Q548.1E LA 9. EN 67
4P26
4P28
4P39
A/P_DIM +5V5-TUN +5V5-TUN
9 9 POWER-OK B01b RES +VDISP-IN
B03H 7307 B07b
INV_OK
MAIN +5V-TUNER
4P29
4P30
4P31
CONTROL IN OUT +1V2-PNX85XX +1V2-PNX8541
COM B01a +12VD +12VD
POWER SUPPLY 7315 3389 ANTENNA-SUPPLY
B01b
+1V2-PNX5100 +1V2-PNX5100
B01b
+3V3-STANDBY +3V3-STANDBY
+12V +12V B01b
B01b +3V3 +3V3
CN4 1M95 RES B01a B07B DISPLAY SUPPLY
1 1 +3V3-STANDBY +3V3-PER +3V3-PER
3V3_ST B03a,g,h,
+3V3 +3V3
7201 B04a,B05a, B03a
+1V2-STANDBY +5V +5V B01a
B01b +VDISP-IN +VDISP-IN
IN OUT
COM
B03a B03A PNX8543 - POWER B07a
7P02 +VDISP-OUT
+1V2-PNX85XX +1V2-PNX85XX
2 2 STANDBY B01a
STANDBY B03H
3 3 CONTROL
SENSE+1V2-PNX85XX
B01A
B04A BOLT-ON
7P03
GND1
PNX8543-LCD-PWR-ON_SPI-DI
4 4 +1V2-STANDBY +1V2-STANDBY +3V3-STANDBY +3V3-STANDBY
GND1 B01b B01b
5 5 +3V3F +3V3F +5V +5V
GND1 B01b
B01a
6 6 +12V 7601
B01a,B02a, +1V8-PNX85XX +12V +12V
+12V B01b
5203
7202
5204 6217 +5V B04a IN OUT B03f,B05a RES B08A PNX5100 - POWER
7 7 VOLT. COM
+12V B02a,
REG.
8 8 B03d,g,h, +1V2-PNX5100 +1V2-PNX5100
+12V B01b
B04a,b,c,
B05a,c, 5C60 +1V2-PNX5100-CLOCK
B07a
+3V3-STANDBY +3V3-STANDBY B04B ANALOG IO - SCART 1&2
B01b
+5V5-TUN +3V3 +3V3 5C61 +1V2-PNX5100-TRI-PLL1
7222 B02a B01a +3V3 +3V3
5221 +1V2-PNX5100 5612 +3V3-PER B01a 5C62 +1V2-PNX5100-TRI-PLL2
VOLT.
B03h,B08a B03b,g,h +5V +5V
REG. B01b
5600 RREF-PNX85xx 5C63 +1V2-PNX5100-TRI-PLL3
9 9 +AUDIO-POWER B05a
+VSND B03c,B06a 5615 VDDA-LVDS 5C64 +1V2-PNX5100-DDR-PLL1
B03b
GND_SND
10 10 B04C YPBR / SIDE IO / S-VIDEO 5C65 +1V2-PNX5100-LVDS-PLL
VDDA-AUDIO VDDA-AUDIO
B03d
+3V3 +3V3 5C66 +1V2-PNX5100-DLL
11 11 5621 VDDA-DAC B01a
N.C. N.C. B03d
+5V +5V CC60 SENSE+1V2-PNX5100
5622 VDDA-ADC B01b B01b
+3V3 +3V3
B01a
5C67 +3V3-PNX5100-LVDS-IN
B05A HDMI
5C68 +3V3-PNX5100-CLOCK
+3V3 +3V3
B03B PNX8543 - VIDEO STREAMS/LVDS OUTPUT B01a
5C69 +3V3-PNX5100-DDR-PLL0
5H01 VDDO_3V3
SENCE+1V2-PNX5100 SENCE+1V2-PNX5100 5C70 +3V3-PNX5100-LVDS-PLL
B08a 5H06 VDDS_3V3
VDDA-LVDS VDDA-LVDS
B03a
5H03 VDDH_3V3 +3V3F +3V3F
+3V3-PER +3V3-PER B01a 7C60
B03a +1V8-PNX85XX +1V8-PNX85XX
B03a IN OUT
+1V8-PNX5100
B08b
5H00 VDD_1V8 COM
B01A DC / DC +3V3_+1V2
B03C PNX8543 - AUDIO AMPLIFIER
B01b
+3V3-STANDBY +3V3-STANDBY
+5V +5V
SENSE+1V2-PNX85XX SENSE+1V2-PNX85XX B01b
B03a +AUDIO-POWER +AUDIO-POWER
RREF-PMX85XX RREF-PMX85XX
B08B PNX5100 - SDRAM
B01b B03a
+12V +12V 4801 +1V8-PNX5100 +1V8-PNX5100
B01b B08a
RES 1H02 3C20 PNX5100-DDR2-VREF-CTRL
5104 +12VF HDMI 3
3819 7801 AUDIO-VDD 18 ARX-5V
CONNECTOR
3C22 PNX5100-DDR2-VREF-DDR
1H00
3108
B05C PCMCIA
B03F PNX8543 - SDRAM
B01a
+3V3 +3V3
+3V3 +3V3
B01a
+1V8-PNX85XX +1V8-PNX85XX
B03a 5K00 +3V3_BUF 1M59
3B47 DDR2-VREF-CTRL 6 TO AMBI-LIGHT
+5V +5V (OPTIONAL)
3B48 DDR2-VREF-DDR B01b
3K00 PCMCIA-VCC-VPP
+T
18560_407_090326.eps
090401
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 68
A 1 2 3 4 5 6 7 8 9 1100 A6 F123 E2 A
1101 A7 F124 E2
1M59 C2 F125 B3
1M84 A2 F126 A2
1M85 A2 I100 A6
1M90 D2 I101 C6
INTERFACE + SINGLE DC-DC 5107 RES
2100 A6
2101 B5
I102 C6
I103 C6
30R 2102 C6 I104 D9
B 5108 RES
+24VF +16V
2103 D6 I105 D5 B
2104 D5 I106 D7
A A
5100 RES
5101 RES
30R 2105 D9 I108 D6
2106 D9 I109 A8
30R
30R
1100 I100 5102
F126 +24V 2107 E9 c001 E2
SPI-LATCH2CONN T 3.0A 32V 10u
F107
1101 * I109 2108 D3 c002 E2
* 2109 E3
2100
220n
1M85 1M84
2.0A T 63V 3100 B5
1 1
F101 SPI-CLOCK-BUF
* * 3101 C5
5103
5104
30R
30R
F102 SPI-DATA-OUT
C 2
3
2
3
F103
F104
SPI-DATA-RETURN
SPI-LATCH1CONN
3102 D6 C
4 4 3103 D9
F105 PWM-CLOCK-BUF +12V
5 5 3104 D6
is prohibited without the written consent of the copyright
6 6 F106 +3V3
All rights reserved. Reproduction in whole or in parts
3100 3105 D5
B 7 7
F108 BLANK-BUF
* * B 3106 D5
5105
5106
F109
30R
30R
8 8 EEPROM-CS 0R1
F110 TEMP-SENSOR RES 3107 D5
9 9
10 10 F111 PROG 3108 E9
F112 VLED1 +16V
11 11 3109 D2
100R
2101
3112
10n
12 12 7100
F113 F114 NCP3163BMNR2G 3110 D3
3
D 13
14
13
14
F125
VLED2
VCC
Φ
3111 E8 D
15 16 15 16 3112 B6
4 15 5100 A8
LPK_SENSE LVI_OUT
502382-1470 502382-1470 5101 A8
5 10 VSW
3101 I101 DRV_COL 5102 A7
11
SPI-LATCH1 47R
6 SWI_EMIT 12 5103 B8
9101 SPI-LATCH1CONN 7 13 5104 B8
C 9102 (RES) 8 SWI_COL
C 5105 B8
owner.
9 20
5106 B8
SS24
6100
9103(RES)
E 9104 SPI-LATCH2CONN
2102 I103
14
BOOT_IN
21
22 5107 A6 E
SPI-LATCH2 23 5108 A6
2n2
1M59 17 24 6100 C8
1
F115 SCL I102 16 VFB 25 7100 B7
1 2
+16V I108 VIA 26
2
1 27
9101 C3
3 F116 SDA TIM_CAP 9102 C3
3103
3109 RES 28
3K3
4 F117 CONTROL1
F118 100R 3110 RES CONTROL2 2 29 9103 C3
5 NC
2104
100n
2103
220p
3102
100R 30 9104 C3
15K
6 F119 +3V3
330R
3104
F120 31 F101 B3
7 I104
F D D F102 B3 F
2108
100p
RES
2105
100n
2106
100n
18
19
1%
F104 B3
3105
3106
3107
1M0
F105 B3
33K
12K
F106 B3
1M90 I106 F107 A7
F121 F108 B3
1 +24V
F109 B3
1%
F122
2
3
F123 +24V F110 B3
G G
100K
2109
100p
3111
3108
2107
100n
3K3
RES
F124 F111 B3
4
5 +24V F112 B3
6 F113 B3
1735446-6 F114 B5
E E F115 C2
F116 D2
F117 D2
c001 F118 D2
+12V VLED1
F119 D2
H c002
F120 D2 H
+16V VLED2 F121 E2
F122 E2
1 2 3 4 5 6 7 8 9
CLASS_NO 1 08-06-19
3104 328 58341 in in in out 24V 16V DC-DC INTERFACE 2 08-08-06
J 3104 328 58351 out out out in 12V 12V 08-06-19 1 3 08-09-18 J
3104 313 6325
3104 328 58361 out out out in 16V 16V 08-08-06 2 AMBI 2K9 4 08-10-23
3104 328 58371 out out out out 12V 16V 08-10-23 3 5 08-12-06
CT MGr CHECK ******** DATE 08-06-06 C ROYAL PHILIPS ELECTRONICS N.V. 2008
1 2 3 4 5 6 7 8 9 10 11 12 13
18310_600_090305.eps
090305
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 69
A A
2200 A4 I213 D5
1 2 3 4 5 6 7 8 2201 A4 I214 D4
2202 A5 I215 D3
2203 A5 I216 B5
2204 B3 I217 B4
DUAL DC-DC 2205 B6
+24VF 2206 B1
B 2207 B2
2208 B7
B
A A 2209 B7
2210 B8
100u 35V
100u 35V
2211 C3
2200
2201
220n
2202
220n
2203
2212 C4
RES RES
2213 C6
3200 I200 I201 3201 2214 C3
VSW 2215 C6
C 6R8
** 2204 7200 2205
6R8
2216 C2 C
3202
** * 3203
*
14
TPS54283PWP 2217 C7
1
PVDD1 PVDD2
**5200 6R8 47n F204 Φ F203 47n 6R8 (VLED1) 2218 D1
is prohibited without the written consent of the copyright
3 12 +12V
+16V SW1 SW2 2220 D7
B **
10u
5
EN1 EN2
6
10u B 2221 D3
7 8
* * RES RES
*
100u 35V
220u 25V
** ** ** FB1 FB2
SS24
SS24
2206
2207
6200
3204
3205
6201
2208
2209
2210
2222 D5
10R
10R
I206
4u7
22u
22u
I217 9 16 I216 2223 D8
ILIM2
10 17
I208 SEQ
* 2224 D8
9201
11 18
D BP
19
I209 3200 A3
3201 A6
D
**
20
*
2211
2213
21 3202 B3
**
1n0
1n0
9202
VIA2 22 3203 B6
23
24
3204 B3
I211 I210 3205 B6
F207 25
3206 D3
C ** 26
* C
2214
2215
GND GND_HS 3207 D2
1n0
1n0
owner.
2212
15
4u7
3208 D7
E 3209 D5
3210 D3
E
3211 D3
RES
2216 RES I212 2217 F201 3212 D6
+16V +12V 3213 D6
RES
22n 22n 5200 B2
RES 3206
3207
** 3208
* 5201 B7
3K3
3K3
3209
2218 RES
6200 B2
2219 RES
68K 47K
** ** *
*
*
1% 1% 1% 6201 B7
F F
3210
3211
3212
3213
2220
3K9
33K
3K3
33K
4u7
4u7
10u
I214 I213 7200 B4
D D
1%
9201 B5
2222 RES
RES 2221
9202 C4
22n
22n
VLED1
F200 B2
I215
F201 C7
* *
2223
2224
10u
10u
F202 D3
F202 F203 B5
F204 B4
F207 C4
7200 : TPS54383 in case of 16V or dual dc-dc converter
G I200 A3
I201 A6
G
The components marked with one star (*) belong to the 12V versions (3104 328 58351, 3104 328 58371). I204 B2
I205 B6
E The components marked with two stars (**) belong to the 16V versions E I206 B6
I208 B3
(3104 328 58331, 3104 328 58341, 3104 328 58361, 3104 328 58371). I209 B6
I210 C6
I211 C3
H I212 C3 H
1 2 3 4 5 6 7 8
I I
CHN SETNAME
CLASS_NO 1 08-06-19
J 08-06-19 1
3104 313 6325 3 08-09-18 J
08-08-06 2 AMBI 2K9 4 08-10-23
08-10-23 3 5 08-12-06
1 2 3 4 5 6 7 8 9 10 11 12 13
18310_601_090305.eps
090305
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 70
A A
1300 E2 9303 F3
1 2 3 4 5 6 7 8 9 10 11 1301 H5 9305 G1
1302 C4 9307 H4
B 2300 A3
2301 A4
C300 B8
F300 A5
B
2302 A5 F301 A8
MICROCONTROLLER BLOCK 3310 2303 A4 F302 A10
2304 B8 F303 B11
7301
LD2985BM18R
RES +3V3 +3V3
100K RES 2305 B10 F304 C4
2306 B9 F305 C4
A F300
+3V3
A 2307 B10 F306 D4
1%
1%
1 5 +1V8
+3V3 IN OUT 2308 D4 F307 F3
3311
C C
3312
I303 7300-2
1K5
1K5
3
INH BP
4 LM393PT 2309 D5 F308 F3
2300
2301
100n
2302
4u7
1u0
F301 2310 F6 F309 G6
8
COM 5
2311 F7 F310 G6
2303
7
10n
F302 2312 F7 F311 G8
6
2
2313 F7 F312 G8
RES
4
2304
3314
2314 F7 F313 G8
-T 10K
10n
3313
2315 F7 F314 G5
10K
+3V3
F303 2316 F8 F315 H4
D 2305 2318 G2 F316 C9 D
B B 2319 G6 F317 F1
C300
10n RES
2320 H5 F320 E9
1K5 1%
3315
2306
100n
2307
+3V3
3316
10n
2321 H4 I300 E9
47K RES 2322 H4 I302 F9
7300-1
2323 H4 I303 A4
1K5 1%
LM393PT
2324 H4 I304 C10
RES
3317
8
3 3300-2 D5 I305 E6
E F316
2
1
I304 3318
3300-3 D7 I306 E7 E
+3V3 +3V3 10K RES 3300-4 D7 I307 G6
4
3301-1 D6 I308 G2
1K8 1%
3319
+3V3 3301-2 E5 I309 G5
RES
3301-3 E6 I310 D5
C C
3320
10K
10K
3321
3301-4 D7 I311 E7
3302-1 D7 I312 E7
RES
1302
F304 3302-2 D6 I313 E7
10K
10K
10K
3302-3 E6 I314 F7
10K
10K
F F
10K
10K
10K
10K
10K
1
5
2 F305 3302-4 D6 I315 F7
3 3303-1 E6 I316 F8
4 5 3303-2 D6 I317 F6
3302-2
3302-4
3301-1
3303-2
3304-1
3301-4
F306
3300-3
3304-2
3304-4
2
4
3303-3 E6 I318 F7
10K
10K
B3B-PH-SM4-TBT(LF)
RES
3304-1 D6 I319 F5
7
100R
100R
3322
3323
3324
3304-2 D7 I320 F8
3304-3 D7 I321 F6
7 3300-2
10K 3325
3304-4 D7 I322 G5
2
G D D 3305-1 E7 G
3305-2 G8
RES
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
10K
I310
8
2308
100p
2309
100p
3305-3 G9
3305-4 G8
3306-1 E8
3302-1
3300-4
3304-3
3305-1
3326
3327
3302-3
3301-2 2
1
3301-3
3306-2 E8
3303-1
3303-3
3306-3 E8
3328
7302
19
43
31
3329
LPC2103FBD48 3306-4 E8
7
H VSS Φ VSSA 3307-1 E8
H
I305
11 13
10K
X1 P0.0|TXD0|MAT3.1 3307-2 F8
MICRO- P0.1|RXD0|MAT3.2
14
I306 3307-4 F8
16M9
I300
12 CTRL 18 3306-3 3 6 CONTROL1
X2 P0.2|SCL0|CAP0.0
E E 3308-1 F8
1300
6 46 100R
RST P0.16|EINT0|MAT0.2 I317 I318 I302
F 47 I319 3309-4 5 4
F
All rights reserved. Reproduction in whole or in parts
2314 RES
J 1 100R
J
1K0
2
10K
2310
100p
2311
100n
2312
100p
2313
100p
100p
2315
100p
2316
100p
NCP303LSN10T1 3
P0.21|SSEL1|MAT3.0
2
IN P0.22|AD0.0
32 3321 C5
1 33 3322 D5
F317 RST P0.23|AD0.1
3 34
GND P0.24|AD0.2 3323 D5
9305 RES
38
I308 P0.25|AD0.6 I307 3324 D7
5 4 39 UD-MD
CD NC P0.26|AD0.7 I322 3325 D6
8 F309
P0.27|TRST|CAP2.0
P0.28|TMS|CAP2.1
9 3326 D6
F310
2318
100n
K P0.29|TCK|CAP2.2
P0.30|TDI|MAT3.3
10
15
F311
F312
4
3305-4
5
10K 3 6
3327 D6
3328 E5
K
G P0.31|TDO
16
22R
3334 F313 2
3305-2
7
10K
3305-3 10K +3V3 G 3329 E5
VDD_1V8 VDD_3V3 VDDA 3330 E8
owner.
3331 E8
5
17
40
42
3335 F314
I309 3332 E3
100R 3333 F2
1
2
2319
100p
3336
10K
10K
3337
3334 G5
2320
100n
SKHUBHE010
3335 G5
L 9307
L
1301
3336 G6
RES
H H 7300-1 B9
2321
100n
2322
100n
2323
100n
2324
100n
7300-2 A10
7301 A4
7302 E3
M 7303 F2 M
9300 E3
9301 F3
9302 F3
1 2 3 4 5 6 7 8 9 10 11
N N
O O
CHN SETNAME
CLASS_NO 1 08-06-19
08-06-19 1 3 08-09-18
P 3104 313 6325
08-08-06 2 AMBI 2K9 4 08-10-23
08-10-23 3 5 08-12-06 P
NAME Peter Van Hove SUPERS. 3 130 3 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18310_602_090305.eps
090305
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 71
1M59
1302 5201 2208 1M85
2209
3338
6201
2220
2300
9104
2203 2210
3331
2310
7301
2322
2315
9103
7200
2301
9102
3307 9101
2202 2302 3306
2303
2321
2316
3308
2311
2201
2218 2323
3309
2319
3324
2200 2206
9201 3326
1101
2312
1301
9202
2219
1M90
6200
2223
2224
5102
1100
5200 2207
1M84
F115
F103
F106 F109
c001
I302 F116
F101 F113
F105
F110 F111
I300
F122
3109 F117
F307
F126
3110
5106 5103
9302
3332
9300
F118
F112 F304
9303
c002
3330
5105 5104
3321
3320
3205
3304 F312
I305 2308 2309 2212 I209
I306
F313
I312
3209
F305 I213
2318
F311
F207
3201
3203
I317
2222
1300
6100
I313
I303 2205
3212
I206
I217
F310 3208
F308
7302
I310
3337 2217
F309
3336
3204
3207
F300
3333
3339
9305
F317
9301 F200 2216
3303
I105
3210
I216
I321
2106
2104
3105 3200
I314
I204
3211
I315
3106 3202
I102
I104
I318
I320 2313 2105 3206 F123
I212
2102
3104
3103
3325 2221
F320
I307
3329
2107 I103
5107
F202
I208
C300
2304
3314
3311
2214 2211
F301
5100
2307 3312
F302
F303
7100 I109
3310
3318
3316
3315
2305
I304
3102
2103
F124
2306
I100
I108
3317 3112
3100
F316
I101
F104
F121
3319 I215 2101
3101
10000_012_090121.eps
090121
31043136325.5 18310_550_090309.eps
090309
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 72
A 1 2 3 4 5 6 7 8 9 10 11 12 13 1101 E4
1105 B5
7116-2 A12
9101 E5
A
1M1A C1 9102 F5
1M2A G1 9103 F5
1M83 A1 9104 F5
MICROCONTROLLER BLOCK LITEON 1M84 E1 9106 H8
2101 A6 9107 A5
2102 A7 9108 A5
2103 A8 9109 A5
B 2104 B7 9110 B5 B
2105 B10 9111 A3
3134
2106 B13 9112 B2
2107 B11 9113 B3
A IN 7101
LD2985BM18R
+3V3 +3V3
100K RES A 2108 B12 9114 B2
1M83 +3V3 2109 D7 9119 H6
F101
1%
1%
F120 SCL SCL 9107 SPI-CLOCK 1 5 2110 D7 9121 G4
1 +3V3 IN OUT
3135
3136
F121 9111 SPI-DATA-IN SPI-DATA-RETURN 9108 SDA +1V8
2 7116-2 2111 G4 C140 B10
1K5
1K5
2101
2102
100n
2103
C RES 3 4
C
4u7
F122
1u0
3 SDA INH BP LM393PT
F123 CONTROL-1 CONTROL-1 9109 SPI-LATCH 2112 H7 F101 A8
4 F116
8
2113 H7 F102 F5
2104
F124 9110 COM 5
10n
5 CONTROL-2 CONTROL-2 PWM-CLOCK
F125 +3V3 7 2114 F9 F103 H7
6 F106
F126 9113 BLANK 6 2115 F9 F104 F5
2
7
RES
F127 RES EEPROM-CS
4
8 2116 F9 F105 D7
2105
3137
-T 10K
F128
10n
TEMP-SENSOR
3111
9 2117 F9 F106 B12
F129 PROG
10
10K
F130 VLED1 +3V3
F117
2118 H8 F107 C7
11
B 12
F131
2106 B 2119 H6 F108 D7
D 13
F132 VLED2 2120 H6 F109 G3 D
C140
9112
9114
2125
33p
14 1105 10n RES 2121 H6 F112 G8
1K5 1%
10u 35V
10u 35V
15 16 VLED1 VLED1-F 3138 2122 F9 F116 A10
2127
2128
2129
2107
100n
2108
+3V3
3139
1u0
10n
1.5A T
47K
2123 F10 F117 B13
RES
7116-1 2124 F10 F118 C11
1K5 1%
LM393PT 2125 B3 F120 A1
RES
3140
2126 F10 F121 A1
8
3
1M1A 1 3141 2127 B1 F122 A1
E 1 SCL
+3V3 +3V3
F118
2
10K RES
2128 B1
2129 B2
F123 A1
F124 B1
E
4
2
1K8 1%
3 SDA 2130 F2 F125 B1
3123
C +3V3
C
RES
CONTROL-1
4 2131 F10 F126 B1
5 CONTROL-2
3101-2 D7 F127 B1
3107
10K
10K
3108
6 +3V3
3101-3 D9 F128 B1
7
8 EEPROM-CS
F107
3101-4 E9 F129 B1
9 TEMP-SENSOR 3102-1 D9 F130 B1
10K
10K
10K
10K
10K
10K
10K
10K
10K
PROG
10 3102-2 D9 F131 B1
5
F 11 VLED1 F105
3102-3 E9 F132 B1 F
10K
12
VLED2 3102-4 D9 F133 E1
13
F108 3103-1 E9 F134 F1
3105-2 2
3106-2 2
3104-1 1
3102-1 1
3104-4 4
3101-3 3
4
14
10K
RES
10K
15 16 3103-2 G10 F135 E1
3102-2
3102-4
7
100R
100R
3109
3110
3105-4
3112
3103-3 G11 F136 F1
3103-4 G10 F137 F1
D D 3104-1 D8 F138 F1
10K 3113
2
7 3101-2
3104-2 E8 F139 F1
G G
10K
3104-3 E8 I110 G8
10K
RES
10K
10K
10K
10K
10K
10K
10K
10K
10K
3104-4 D9 I111 G8
8
5
2109
100p
2110
100p
3105-1 E9 I113 G10
3105-2 D8 I114 G10
3105-3 E8 I115 G10
1
3114
3115
3104-2 2
3104-3 3
3
4
3116
3103-1
3105-4 D8 I124 E11
3102-3
3101-4
3105-1
3105-3
3106-1
3106-3
7102 3106-1 E8 I125 E11
19
43
31
3117
LPC2103FBD48
7
3106-2 D8 I126 F11
VSS Φ VSSA
3106-3 E8
H 11 13
H
10K
X1 P0.0|TXD0|MAT3.1
E 16M9
12
X2
MICRO-
CTRL
P0.1|RXD0|MAT3.2
P0.2|SCL0|CAP0.0
14
18 3124-4 4 5 I124 CONTROL-1
E 3107 C7
3108 C7
1101
47 3127-1 1 8 SCL
12 P0.17|CAP1.2|SCL1
48 3127-4 4 5 100R 3123 C11
All rights reserved. Reproduction in whole or in parts
3119
2122 RES
2124 RES
1 100R
2114 RES
3124-1 E11
10K
1u0
14 P0.19|MAT1.2|MISO1
3120
J 2
J
10K
100p
2115
100p
2116
100p
2117
100p
100p
2123
100p
100p
2126
100p
2131
100p
NCP303LSN10T1 3
2
P0.21|SSEL1|MAT3.0
32
3124-3 E11
IN P0.22|AD0.0 3124-4 E11
1 33
F109 RST P0.23|AD0.1
3 34 3125-1 F11
GND P0.24|AD0.2
9121 RES
38 3125-2 F11
P0.25|AD0.6
5 4 39 UD-MD 3125-4 F11
CD NC P0.26|AD0.7
1M2A 8 I111
P0.27|TRST|CAP2.0
9
3126-1 F11
1 SPI-CLOCK-BUF P0.28|TMS|CAP2.1 3126-2 F11
G I110
G
2111
100n
17
40
42
BLANK-BUF
owner.
7 3131 F112
2118 RES
EEPROM-CS 3129 E11
8
TEMP-SENSOR 3130 G8
9 100R
100p
3132
3131 G7
10K
10K
3133
10 PROG
2112
100n
9106
RES
11 VLED1 3132 H8
9119
12 3133 H8
L 13
14
VLED2
+3V3 F103
3134 A13 L
15 16 +1V8 3135 A11
H H 3136 A12
3137 B11
2119
100n
2120
100n
2121
100n
2113
100n
3138 B13
3139 B12
3140 C11
3141 C13
M 3142 F11
7101 A7
M
7102 E6
7110 F4
7116-1 B11
1 2 3 4 5 6 7 8 9 10 11 12 13
N N
1X03
REF EMC HOLE
O O
CHN SETNAME
1
CLASS_NO 1 2008-06-10
3 2008-10-27
P 8204 000 8857
2008-08-08 2 2K9
2008-10-27 3 P
NAME Peter Van Hove SUPERS. 3 130 1 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18310_610_090305.eps
090305
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 73
2201 B8
1 2 3 4 5 6 7 8 9 10 11 12 13 2202 C8
A 2203 D8 A
2209 B2
2210 G6
2211 I6
MICROCONTROLLER BLOCK LITEON 2214 A6
INPUT BUFFER 2215 F7
A A 2216 F7
2217 B12
B +3V3 +3V3 +3V3
2218 C12
2219 D12
B
7201-1 2220 E9
14
2214
100n
74HCT125PW 3121 D9
2 3203 B5
3219
3213
3210
3
10K
10K
3207 3204 B7
1
+3V3 EN 100R 3205 C5
2201
2217
100p
1K0 RES
33p
7212 3207 B9
7
PDTC144EU 3209 C9
C 7209
PDTC144EU
9209
3210 B3 C
B 3 F202
+3V3
7214 8
VCC
B 3211 C9
1 5
D Φ Q
2 3212 D11
3213 B3
2 6
(64K) 7201-4 3214 H6
C +3V3
2209
3203
74HCT125PW
10K
33p
3215 H6
14
1
S 3204 3216 H6
7 +3V3 12
HOLD 3220 3217 H6
D 3
W M95010-WDW6 10K
+3V3
3209
13
EN
11
27R
3218 H6 D
2202
2218
100p
GND 1K0 RES 3219 B11
33p
7
4 3220 C11
3221 H11
3222 I8
C 9212 RES
C 3223 C11
3224 H11
6216 I8
E 7201-1 A10 E
3223 7201-2 C10
F207
7201-3 D10
+3V3 EN 100R
2219
100p
7201-4 B10
7209 B2
9213
7210 C2
7212 B3
7214 B6
F D 9214 RES
D 7215 G7
9208 A10 F
7201-3 +3V3
9209 B9
14
74HCT125PW
9 9210 B10
3121 9211 C9
8 F208 3212
100R EN
10 9212 C10
2220 RES
100R 9213 D9
7
9214 D10
100p
F202 B3
G F203 C5 G
F204 H6
F205 B10
E E F206 C10
F207 C10
F208 D10
F209 H11
F210 G9
H F211 G9
F212 G9
H
F213 H9
F214 H9
F215 H9
F F
I I
2216 2215
1u0 100n
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
7215
28
TLC5946PWP
J VCC
Φ J
LED DRIVER
G PWM CONTROL F210
G
7
0
8
1
25 9 F211
GSCLK 2
10
3
2 11 F212
BLANK 4
12
5
K 3217
100R F204
6
MODE 6
7
13
14
F213
K
27 15 +3V3 +3V3
3215 IREF OUT 8
16
9
1K2 3 17
owner.
XLAT 10
18
11
H H
3224
3221
4 19
3K3
3K3
SCLK 12
5 20 F209
SIN 13
3216 24 21
SOUT 14
100R 22
15
L +3V3
3214
26
XHALF XERR
23 L
10K VIA
GND GND_HS
470R
2211
3222
1
29
30
31
32
33
33p
SML-310
6216
M I I M
+3V3
1 2 3 4 5 6 7 8 9 10 11 12 13
N N
O O
1
CHECK DATE C
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18310_611_090305.eps
090305
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 74
3301 F9 9310-2 B8
1 2 3 4 5 6 7 8 9 10 11 12 13 3302 F9 9310-4 B8
A 3303 F9 9311-1 H13 A
3304 G9 9311-3 H13
3305 G9 9311-4 H12
LED LITEON 3306 H9 9312-1 B10
3307 H9 9312-3 B10
3308 H9 9312-4 B10
3309 I9 9313-1 B12
3310 D12 9313-2 B12
B A A 3311 D12
3312 E12
9313-4 B12
9314 G5
B
VLED1-F VLED2 3313 E12 9315-1 C12
3314 E12 9315-2 C12
3315 E12 9315-4 C12
3316 E12 9316 H5
3317 F12 9317 F5
3318 F12 9318-1 C8
C 3319 F12
3320 F12
9318-3 C8
9318-4 C8
C
3321 G12 9319-1 D9
3322 G12 9319-3 D9
B B 3323 G12
3325 G4
9319-4 D9
9320-1 D7
3326 H4 9320-2 D7
VLED1-F VLED2 3327 H4 9320-4 D7
8
3328 G4 9325 F10
D D
9309-2
9310-2
9310-4
9310-1
9312-4
9312-3
9313-1
3330 I4 9326 G10
3331 F4 9327 H10
9301
3332 F4 F302 G5
1
7000 7001 7002 7003 7004
LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 G 3333 H4 F303 G4
B R
3334 F4 F304 H5
4 GREEN 3 4 GREEN 3 4 GREEN 3 2 9305-2 7 GREEN 3 4 GREEN 3 3 9303-3 6 GREEN 2 9315-2 7 3335 D12 F305 H5
3336 D2 F307 F5
E C 5 RED 2 5 RED 2 5 RED 2 4 9305-4 5 5 RED 2 8 9318-1 1 5 RED 2 4 9303-4 5 RED 4 9315-4 5
C 3337 D2 F308 F4
E
6 1 6 1 6 1 1 9305-1 8 6 5 9318-4 4 6 1
3338 D1 F325 F10
BLUE BLUE BLUE BLUE BLUE BLUE
3339 D2 F326 F9
GND_HS GND_HS GND_HS GND_HS GND_HS GND_HS 3340 D1 F327 G10
G R B
7
7
3341 D1 F328 G9
3342 E2 F329 H10
3343 D1 F330 H10
3344 D1 F340 D1
3345 D12 F341 D1
B R G
F 3346 E1
3347 D1
F342 D1
F343 D2
F
3348 E12 F344 D12
D 3341
3336
D 3349 E1 F345 D12
3350 E1 F346 D13
3351 E12 F347 G12
9320-1 8
9320-4 5
9320-2 7
8
1K5 390R 3335 3354
3340 3344 3352 E1 F348 G13
9306-4
9306-1
9319-1
390R 560R 3353 E1 F349 G13
560R 1K5 3345 3311 3357 3354 D13
G 3339
3355 E1 G
1
390R 1K5 560R
390R 2 9304-2 7 3348 3312 3358 3356 E1
3342 3357 D13
3346
390R 1K5 560R 3358 E13
560R 390R
3359 E13
3349 3353
E 560R 1K5 3360
E 3360 E13
3361 E13
3362 E13
H 3315
560R 3363 F13
3364 F13
H
3384
1K5 3365 F13
1K5 3316 3362 3366 F13
3369 3385 3367 G13
VLED1-F VLED1-F 1K5 560R 3368 G13
560R 1K5 3317 3363 3369 F1
3370 F307 F325
1K5 560R 3370 F1
3331
3301
I 3371 F1
I
10K
10K
560R 7317 3364
F 3387 BC847BW
560R
F 3372 F1
3334 F308 F326 3373 F1
1K5
3374 G1
3388 1K0
3384 E1
3303
3385 F1
10K
1K5 3320 3366
is prohibited without the written consent of the copyright
3389 3386 F1
All rights reserved. Reproduction in whole or in parts
3304
10K
10K
7315 1K5
if VLED < 17V BC847BW 7003 C6
F303 F328 7004 C8
9326
K F348 7005 C11
7305 G4
K
7306 H5
3326
3306
10K
10K
7307 F4
owner.
7315 G9
8
7316 H10
9311-4
9311-3
9311-1
VLED1-F 7317 F9
H H 9301 C1
L F329 9302 C1
L
1
9303-1 C10
7316 9303-3 C10
BC847BW
9303-4 C10
3308 F330
9304-1 E10
9327
1K0 9304-2 E10
9304-4 E10
3309
10K
9305-1 C6
9305-2 C6
M 9305-4 C6 M
9306-1 D5
I I 9306-3 D5
9306-4 D5
9307 A6
9308 A6
9309-1 B6
9309-2 B6
N 9309-4 B6
9310-1 B8
N
1 2 3 4 5 6 7 8 9 10 11 12 13
O O
CHN SETNAME
CLASS_NO 1 2008-06-10
3 2008-10-27
P 8204 000 8857
2008-08-08 2 2K9
2008-10-27 3 P
NAME Peter Van Hove SUPERS. 3 130 3 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18310_612_090305.eps
090305
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 75
3364
3365
3366
3367
3363
3368
3354
3357
3358
3359
3360
3361
3362
2110 2109
3109
3108
3107
9313
2129 2128
9113
9109
9112
9111
2125
3110
3120
1M83 1M84
3128
3317
3316
3315
3313
3312
3311
3310
3335
3345
3348
3351
3119
3129 9315
2101 9121
3132
6216
3314
3320
3319
3318
3323
3322
3321
3221
3224
2103
2102
2211
3216
3133
9102
3117
3114
3113
3138 3136
7101
3111
C140
3106 3127
2106 3139
7215
2105
3137
I110
2111
3222
7110 2209 2108
2104
2119
1101 2117
9110
2130
9114
7212 7210
7209
9107
2202
9302
2127
I113
3342 3103 I111 2116
2107
7000
7001
7002
7003
7004
7005
3339 3115
9106
3131
3140 3135
7116
3126
1105
I114
3306
3305
3304
3303
3302
3301
3309
3308
3307
3338 3374 3385 3389 I115 2126
2112 3213
3340 3369 3384 3390 3124 3130
3121 3116
3332
7307 3334
3331
3343 3373 3356 3391 2203
9325
9327
3220 3212
9326
2120 9119 2214
7315
7317
7316
2113
7102
9308
3211
3204
3123
9317
3210
3333
3327
3330
2218
3349 3371 3347 3387
2210
7201
2123
7214
3326
3328
3325
3104
9307 2124 3134
2122
3352 3370 3344 3388
9208
3219
3102
2216 2121 3141
3355 3341 3353
9213
3142
3207
7306
3214 2215 2131
9301
3217
9311
3337
7305
9211
9316
2217 9209
9312
9303
9319
9304
3203 3205
3218
3215
9305
9309
9320
9318
9310
9103
3118
9101
2114
9314
9306
9108
2201
3336
2220
2115
3112
2118
9104
3223 2219 3101 3125 3105
1M2A 1M1A
F139 F122
F126
I126
F345
F116
F106
F101
F109
F213 F137
F128
F131
F129
F124
F121
F308
F134 F210
F330 F326 F328
F202 F203 I125 F138
F206
F103 F207
F133 F112 F305 F211 F340 F343
F118 F136 F208
F329 F325 F327 F303 F125
F102 F205
F341
F117 F307
F204 F342
F304 F302
18310_551_090309
3104 313 6313.3 090309
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 76
A 1 2 3 4 5 6 7 8 9 10 11 12 13 1101 E4
1105 B5
7116-2 A12
9101 E5
A
1M1A C1 9102 F5
1M2A G1 9103 F5
1M83 A1 9104 F5
MICROCONTROLLER BLOCK LITEON 1M84 E1 9106 H8
2101 A6 9107 A5
2102 A7 9108 A5
2103 A8 9109 A5
B 2104 B7 9110 B5 B
2105 B10 9111 A3
3134
2106 B13 9112 B2
2107 B11 9113 B3
A IN 7101
LD2985BM18R
+3V3 +3V3
100K RES A 2108 B12 9114 B2
1M83 +3V3 2109 D7 9119 H6
F101
1%
1%
F120 SCL SCL 9107 SPI-CLOCK 1 5 2110 D7 9121 G4
1 +3V3 IN OUT
3135
3136
F121 9111 SPI-DATA-IN SPI-DATA-RETURN 9108 SDA +1V8
2 7116-2 2111 G4 C140 B10
1K5
1K5
2101
2102
100n
2103
C RES 3 4
C
4u7
F122
1u0
3 SDA INH BP LM393PT
F123 CONTROL-1 CONTROL-1 9109 SPI-LATCH 2112 H7 F101 A8
4 F116
8
2113 H7 F102 F5
2104
F124 9110 COM 5
10n
5 CONTROL-2 CONTROL-2 PWM-CLOCK
F125 +3V3 7 2114 F9 F103 H7
6 F106
F126 9113 BLANK 6 2115 F9 F104 F5
2
7
RES
F127 RES EEPROM-CS
4
8 2116 F9 F105 D7
2105
3137
-T 10K
F128
10n
TEMP-SENSOR
3111
9 2117 F9 F106 B12
F129 PROG
10
10K
F130 VLED1 +3V3
F117
2118 H8 F107 C7
11
B 12
F131
2106 B 2119 H6 F108 D7
D 13
F132 VLED2 2120 H6 F109 G3 D
C140
9112
9114
2125
33p
14 1105 10n RES 2121 H6 F112 G8
1K5 1%
10u 35V
10u 35V
15 16 VLED1 VLED1-F 3138 2122 F9 F116 A10
2127
2128
2129
2107
100n
2108
+3V3
3139
1u0
10n
1.5A T
47K
2123 F10 F117 B13
RES
7116-1 2124 F10 F118 C11
1K5 1%
LM393PT 2125 B3 F120 A1
RES
3140
2126 F10 F121 A1
8
3
1M1A 1 3141 2127 B1 F122 A1
E 1 SCL
+3V3 +3V3
F118
2
10K RES
2128 B1
2129 B2
F123 A1
F124 B1
E
4
2
1K8 1%
3 SDA 2130 F2 F125 B1
3123
+3V3
C C
RES
CONTROL-1
4 2131 F10 F126 B1
5 CONTROL-2
3101-2 D7 F127 B1
3107
10K
10K
3108
6 +3V3
3101-3 D9 F128 B1
7
8 EEPROM-CS
F107
3101-4 E9 F129 B1
9 TEMP-SENSOR 3102-1 D9 F130 B1
10K
10K
10K
10K
10K
10K
10K
10K
10K
PROG
10 3102-2 D9 F131 B1
5
F 11 VLED1 F105
3102-3 E9 F132 B1 F
10K
12
VLED2 3102-4 D9 F133 E1
13
F108 3103-1 E9 F134 F1
3105-2 2
3106-2 2
3104-1 1
3102-1 1
3104-4 4
3101-3 3
4
14
10K
RES
10K
15 16 3103-2 G10 F135 E1
3102-2
3102-4
7
100R
100R
3109
3110
3105-4
3112
3103-3 G11 F136 F1
3103-4 G10 F137 F1
D D 3104-1 D8 F138 F1
10K 3113
2
7 3101-2
3104-2 E8 F139 F1
G G
10K
3104-3 E8 I110 G8
10K
RES
10K
10K
10K
10K
10K
10K
10K
10K
10K
3104-4 D9 I111 G8
8
5
2109
100p
2110
100p
3105-1 E9 I113 G10
3105-2 D8 I114 G10
3105-3 E8 I115 G10
1
3114
3115
3104-2 2
3104-3 3
3
4
3116
3103-1
3105-4 D8 I124 E11
3102-3
3101-4
3105-1
3105-3
3106-1
3106-3
7102 3106-1 E8 I125 E11
19
43
31
3117
LPC2103FBD48
7
3106-2 D8 I126 F11
VSS Φ VSSA
3106-3 E8
H 11 13
H
10K
X1 P0.0|TXD0|MAT3.1
E MICRO- P0.1|RXD0|MAT3.2
14
E 3107 C7
16M9
12 18 3124-4 4 5 I124
X2 CTRL P0.2|SCL0|CAP0.0 CONTROL-1 3108 C7
1101
47 3127-1 1 8 SCL
12 P0.17|CAP1.2|SCL1
48 3127-4 4 5 100R 3123 C11
All rights reserved. Reproduction in whole or in parts
3119
2122 RES
2124 RES
1 100R
2114 RES
3124-1 E11
10K
1u0
14 P0.19|MAT1.2|MISO1
3120
J 2
J
10K
100p
2115
100p
2116
100p
2117
100p
100p
2123
100p
100p
2126
100p
2131
100p
NCP303LSN10T1 3
2
P0.21|SSEL1|MAT3.0
32
3124-3 E11
IN P0.22|AD0.0 3124-4 E11
1 33
F109 RST P0.23|AD0.1
3 34 3125-1 F11
GND P0.24|AD0.2
9121 RES
38 3125-2 F11
P0.25|AD0.6
5 4 39 UD-MD 3125-4 F11
CD NC P0.26|AD0.7
1M2A 8 I111
P0.27|TRST|CAP2.0
9
3126-1 F11
1 SPI-CLOCK-BUF P0.28|TMS|CAP2.1 3126-2 F11
G I110
G
2111
100n
17
40
42
BLANK-BUF
owner.
7 3131 F112
2118 RES
EEPROM-CS 3129 E11
8
TEMP-SENSOR 3130 G8
9 100R
100p
3132
3131 G7
10K
10K
3133
10 PROG
2112
100n
9106
RES
11 VLED1 3132 H8
9119
12 3133 H8
L 13
14
VLED2
+3V3 F103
3134 A13 L
15 16 +1V8 3135 A11
H H 3136 A12
3137 B11
2119
100n
2120
100n
2121
100n
2113
100n
3138 B13
3139 B12
3140 C11
3141 C13
M 3142 F11
7101 A7
M
7102 E6
7110 F4
7116-1 B11
1 2 3 4 5 6 7 8 9 10 11 12 13
N N
1X03
REF EMC HOLE
O O
CHN SETNAME
1
CLASS_NO 1 2008-06-10
3 ??
P 8204 000 8857
2008-08-08 2 2K9
3 P
NAME Peter Van Hove SUPERS. 3 130 1 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18560_500_090403.eps
090403
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 77
2201 B8
1 2 3 4 5 6 7 8 9 10 11 12 13 2202 C8
A 2203 D8 A
2209 B2
2210 G6
2211 I6
MICROCONTROLLER BLOCK LITEON 2214 A6
INPUT BUFFER 2215 F7
A A 2216 F7
2217 B12
+3V3
B +3V3 +3V3
9208 RES
+3V3
2218 C12
2219 D12
B
7201-1 2220 E9
14
2214
100n
74HCT125PW 3121 D9
PWM-CLOCK 2 3203 B5
3219
3213
3210
3 PWM-CLOCK-BUF
10K
10K
3207 F205 3204 B7
1
+3V3 EN 100R 3205 C5
2201
2217
100p
1K0 RES
33p
7212 3207 B9
7
PDTC144EU 3209 C9
C 7209
PDTC144EU
SPI-CS SPI-CS SPI-DATA-IN 9209
3210 B3 C
B 3 F202
+3V3
7214 8
VCC
B 3211 C9
EEPROM-CS 1 5
D Φ Q
2 SPI-DATA-RETURN 9210 RES 3212 D11
3213 B3
2 6
(64K) 7201-4 3214 H6
C +3V3
2209
3203
74HCT125PW
10K
33p
3215 H6
14
1
S 3204 3216 H6
7 +3V3 SPI-CLOCK 12
HOLD 3220 3217 H6
D F203
3
W M95010-WDW6 10K
+3V3
3209 F206
13
EN
11
27R
SPI-CLOCK-BUF
3218 H6 D
2202
2218
100p
GND 1K0 RES 3219 B11
33p
7210
7
3220 C11
10K RES
PDTC144EU 4
3 9211
3221 H11
3205
3222 I8
C EEPROM-CS-LOCAL 1 SPI-CLOCK-BUF 9212 RES
C 3223 C11
2 3224 H11
+3V3
7201-2 6216 I8
E E
14
74HCT125PW
7201-1 A10
BLANK 5
6 3223 BLANK-BUF 7201-2 C10
3211 F207
4 7201-3 D10
+3V3 EN 100R
2203
2219
100p
1K0 RES 7201-4 B10
33p
7
7209 B2
9213
7210 C2
7212 B3
7214 B6
F D 9214 RES SPI-DATA-OUT-FIL D 7215 G7
9208 A10 F
7201-3 +3V3
9209 B9
14
74HCT125PW
9 9210 B10
3121 9211 C9
SPI-DATA-RETURN 8 F208 3212
100R EN
10 DATA-RETURN-SWITCH 9212 C10
2220 RES
100R 9213 D9
7
9214 D10
100p
F202 B3
G F203 C5 G
F204 H6
F205 B10
E E F206 C10
F207 C10
F208 D10
F209 H11
F210 G9
H F211 G9
F212 G9
H
F213 H9
F214 H9
F215 H9
F F
I +3V3
I
2216 2215
1u0 100n
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
7215
28
TLC5946PWP
J VCC
Φ J
LED DRIVER
G PWM CONTROL F210
G
7 PWM-R1
0
8
1
PWM-CLOCK-BUF 25 9 F211
GSCLK 2
BLANK-BUF 10 PWM-G1
3
2210 2 11 F212
BLANK 4
33p 12 PWM-B1
5
K PROG 3217
100R F204
6
MODE 6
7
13
14
F213
PWM-R2 K
3218 RES 27 15 +3V3 +3V3
3215 IREF OUT 8
1K2 16 F214
9
SPI-LATCH 1K2 3 17 PWM-G2
owner.
XLAT 10
18 F215
11
H H
3224
3221
4 19
3K3
SPI-CLOCK-BUF PWM-B2
3K3
SCLK 12
SPI-DATA-IN 5 20 F209
SIN 13
SPI-DATA-OUT 3216 24 21 EEPROM-CS-LOCAL EEPROM-CS-LOCAL
SOUT 14
SPI-DATA-OUT-FIL 100R 22 DATA-RETURN-SWITCH DATA-RETURN-SWITCH
15
L +3V3
3214
26
XHALF XERR
23 L
10K VIA
GND GND_HS
470R
2211
3222
1
29
30
31
32
33
33p
SML-310
6216
M I I M
+3V3
1 2 3 4 5 6 7 8 9 10 11 12 13
N N
O O
CHN SETNAME
CLASS_NO 1 2008-06-10
3 ??
P 8204 000 8857
2008-08-08 2 2K9
3 P
NAME Peter Van Hove SUPERS. 3 130 2 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18560_501_090403.eps
090403
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 78
3301 F9 9310-2 B8
1 2 3 4 5 6 7 8 9 10 11 12 13 3302 F9 9310-4 B8
A 3303 F9 9311-1 H13 A
3304 G9 9311-3 H13
3305 G9 9311-4 H12
LED LITEON 3306 H9 9312-1 B10
3307 H9 9312-3 B10
3308 H9 9312-4 B10
3309 I9 9313-1 B12
3310 D12 9313-2 B12
B A A 3311 D12
3312 E12
9313-4 B12
9314 G5
B
VLED1-F VLED2 3313 E12 9315-1 C12
3314 E12 9315-2 C12
3315 E12 9315-4 C12
3316 E12 9316 H5
9307
9308
3317 F12 9317 F5
3318 F12 9318-1 C8
C 3319 F12
3320 F12
9318-3 C8
9318-4 C8
C
3321 G12 9319-1 D9
3322 G12 9319-3 D9
B B 3323 G12
3325 G4
9319-4 D9
9320-1 D7
3326 H4 9320-2 D7
VLED1-F VLED2 3327 H4 9320-4 D7
5
3328 G4 9325 F10
D D
9309-2
9309-1
9309-4
9310-2
9310-4
9310-1
9312-4
9312-3
9312-1
9313-1
9313-2
9313-4
3330 I4 9326 G10
3331 F4 9327 H10
9301
9302
3332 F4 F302 G5
4
7000 7001 7002 7003 7004 7005
LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 G 3333 H4 F303 G4
B R
3334 F4 F304 H5
4 GREEN 3 4 GREEN 3 4 GREEN 3 2 9305-2 7 4 GREEN 3 6 9318-3 3 4 GREEN 3 3 9303-3 6 4 GREEN 3 2 9315-2 7 3335 D12 F305 H5
3336 D2 F307 F5
E C 5 RED 2 5 RED 2 5 RED 2 4 9305-4 5 5 RED 2 8 9318-1 1 5 RED 2 4 9303-4 5 5 RED 2 4 9315-4 5
C 3337 D2 F308 F4
E
6 1 6 1 6 1 1 9305-1 8 6 1 5 9318-4 4 6 1 1 9303-1 8 6 1 1 9315-1 8
3338 D1 F325 F10
BLUE BLUE BLUE BLUE BLUE BLUE
3339 D2 F326 F9
GND_HS GND_HS GND_HS GND_HS GND_HS GND_HS 3340 D1 F327 G10
G R B
7
7
3341 D1 F328 G9
3342 E2 F329 H10
F344 F345 F346 3343 D1 F330 H10
F340 F341 F342 F343 3344 D1 F340 D1
3345 D12 F341 D1
B R G
F RED-1 3346 E1
3347 D1
F342 D1
F343 D2
F
GREEN-1
3348 E12 F344 D12
D 3338 3341
3336 BLUE-1
D 3349 E1 F345 D12
3350 E1 F346 D13
3351 E12 F347 G12
9320-1 8
9320-4 5
9320-2 7
6
560R 1K5 390R 3335 3310 3354
3340 3344 3337 3352 E1 F348 G13
9306-4
9306-1
9306-3
9319-1
9319-4
9319-3
390R 1K5 560R 3353 E1 F349 G13
560R 1K5 390R 3345 3311 3357 3354 D13
G 3343 3347 3339
3355 E1 G
3
390R 1K5 560R
560R 1K5 390R GREEN6 GREEN6 2 9304-2 7 3356 E1
3348 3312 3358
3342 3357 D13
3346 3350
RED6 RED6 1 9304-1 8 390R 1K5 560R 3358 E13
560R 1K5 390R 3351 3313 3359
BLUE6 BLUE6 4 9304-4 5 3359 E13
3349 3353
E 560R 1K5
390R 1K5
3314
560R
3360
E 3360 E13
3361 E13
3352 3356 3362 E13
H 560R 1K5
1K5
3315
560R
3361
3363 F13
3364 F13
H
3355 3384
1K5 560R 3365 F13
560R 1K5 3316 3362 3366 F13
3369 3385 3367 G13
VLED1-F VLED1-F 1K5 560R 3368 G13
560R 1K5 3317 3363 3369 F1
3370 3386 F307 F325
BLUE-2 1K5 560R 3370 F1
3331
3301
I 7307 3371 F1
I
10K
10K
560R 1K5 7317 3318 3364
F 3371 3387
BC847BW BC847BW
1K5 560R
F 3372 F1
3334 F308 3302 F326 3373 F1
9317
9325
560R 1K5 3319 3365 3374 G1
3372 3388 1K0 1K0
1K5 560R 3384 E1
3332
3303
3385 F1
10K
10K
560R 1K5 3320 3366
is prohibited without the written consent of the copyright
3304
7305
10K
10K
7315 1K5
BC847BW if VLED < 17V BC847BW 7003 C6
3328 F303 3305 F328 7004 C8
9314
9326
K 1K0 1K0
F347 F348 F349 7005 C11
7305 G4
K
7306 H5
3326
3306
10K
10K
7307 F4
owner.
7315 G9
8
7316 H10
PWM-R1 PWM-R2
9311-4
9311-3
9311-1
VLED1-F VLED1-F 7317 F9
H H 9301 C1
L F304 F329 9302 C1
L
1
GREEN-2 9303-1 C10
3327
3307
7306
10K
10K
7316 9303-3 C10
BC847BW BC847BW
9303-4 C10
3333 F305 3308 F330
9304-1 E10
9316
9327
1K0 1K0 9304-2 E10
GREEN-2 9304-4 E10
3330
3309
10K
10K
9305-1 C6
RED-2
9305-2 C6
M BLUE-2 9305-4 C6 M
PWM-G1 PWM-G2 9306-1 D5
I I 9306-3 D5
9306-4 D5
9307 A6
9308 A6
9309-1 B6
9309-2 B6
N 9309-4 B6
9310-1 B8
N
1 2 3 4 5 6 7 8 9 10 11 12 13
O O
CHN SETNAME
CLASS_NO 1 2008-06-10
3 ??
P 8204 000 8857
2008-08-08 2 2K9
3 P
NAME Peter Van Hove SUPERS. 3 130 3 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18560_502_090403.eps
090403
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 79
A A
1M3A E2
1 2 3 4 5 6 7 8 9 10 1M85 D2
3536 E9
B 3537 E9
3538 E7
B
3539 E9
3540 E7
LED DRIVE 3541 E8
3542 E9
3543 E7
3544 E8
3546 E7
C 3547 E8 C
A A 3549 F7
3550 E8
3552 F7
3553 F8
3555 F7
7006 2 7007 3556 F8
LTW-E500T-PH1 LTW-E500T-PH1
3569 F7
D GREEN-1 4 GREEN 3 4 GREEN 3
3570 F7
3571 G7
D
RED-1 5 RED 5 RED 3572 G7
3573 G7
BLUE-1 6 BLUE 1 6 BLUE 1 3574 G7
B GND_HS GND_HS B 3584 F8
3585 F8
7
3586 F8
E 3587 G8 E
3588 G8
3589 G8
2
3590 G8
3591 G8
7006 A5
7007 A7
F C C F
1M85
1 SPI-CLOCK-BUF
2 SPI-DATA-OUT
G 3
4
SPI-DATA-RETURN
SPI-LATCH G
5 PWM-CLOCK-BUF GREEN-2
6 +3V3
D 7
8
BLANK-BUF
EEPROM-CS
RED-2
D
9 TEMP-SENSOR BLUE-2
10 PROG
11 VLED1
12
H 13
14
VLED2
H
15 16
3536
3538 3541
8 EEPROM-CS
All rights reserved. Reproduction in whole or in parts
560R 1K5
3570 3586
K 560R
3571
1K5
3587
K
560R 1K5
owner.
3572 3588
G 560R
3573
1K5
3589
G
560R 1K5
L 3574 3590
L
560R 1K5
3591
1K5
M M
1 2 3 4 5 6 7 8 9 10
1X04
REF EMC HOLE
N N
O O
CHN SETNAME
CLASS_NO 1 2008-05-23
2008-05-23 1 3 0
P 8204 000 8874
2008-08-08 2 2K9
2008-10-31 3 P
NAME Peter Van Hove SUPERS. 1 130 1 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18560_503_090403.eps
090403
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 80
3364
3365
3366
3367
3363
3368
3354
3357
3358
3359
3360
3361
3362
2110 2109
3109
3108
3107
9313
2129 2128
9113
9109
9112
9111
2125
1M83 1M84 1M85
3110
3120
3128
3317
3316
3315
3313
3312
3311
3310
3335
3345
3348
3351
3119
3129 9315
2101 9121
3132
6216
3314
3320
3319
3318
3323
3322
3321
3221
3224
2103
2102
7215
2211
3216
3133
9102
3117
3114
3113
3138 3136
7101
3111
C140
3106 3127
2106 3139
2105
3137
I110
2111
3222
7110 2209 2108
2104
2119
1101 2117
9110
2130
9114
7212 7210
7209
9107
2202
9302
2127
I113
3103
7000
7001
7002
7003
7004
7005
7006
7007
3342 2116
1X03 1X04
I111
9106
3131
3140 3135
7116
3126
1105
I114
3306
3305
3304
3303
3302
3301
3309
3308
3307
3338 3374 3385 3389 I115 2126
2112 3213
3340 3369 3384 3390 3124 3130
3121 3116
3332
7307 3334
3331
3343 3373 3356 3391 2203
9325
9327
3220 3212
9326
2120 9119 2214
7315
7317
7316
2113
7102
9212 9308
3211
3204
3552 3555
3549 3570
3546 3571
3543 3572
3540 3573
3538 3569
3574
3123
9317
3210
3333
3327
3330
2218
3349 3371 3347 3387
2210
7201
2123
7214
3326
3328
3325
3104
9307 2124 3134
2122
3352 3370 3344 3388
3541 3553
3544 3588
3547 3587
3550 3586
3556 3591
3584 3590
3585 3589
9208
3219
3102
2216 2121 3141
3355 3341 3353
9213
3142
3207
7306
3214 2215 2131
9301
3217
9311
3337
7305
9211
9316
2217 9209
9312
9303
9319
9304
3536
3537
3539
3542
3203 3205
3218
3215
9305
9309
9320
9318
9310
9103
3118
9101
2114
9314
9306
9108
2201
3336
2220
2115
3112
2118
9104
3223 2219 3101 3125 3105
I126
F345
F116
F106
F344 F209 F104 I124 F212
F101
F109
F213 F137
F128
F131
F129
F124
F121
F308
F134 F210
F330 F326 F328
F202 F203 I125 F138
F206
F103 F207
F133 F112 F305 F211 F340 F343
F118 F136 F208
F329 F325 F327 F303 F125
F102 F205
F341
F117 F307
F204 F342
F304 F302
18490_550_090326.eps
31043136314.3 090326
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 81
A 1 2 3 4 5 6 7 8 9 10 11 12 13 1101 E4
1105 B5
7116-2 A12
9101 E5
A
1M1A C1 9102 F5
1M2A G1 9103 F5
1M83 A1 9104 F5
MICROCONTROLLER BLOCK LITEON 1M84 E1 9106 H8
2101 A6 9107 A5
2102 A7 9108 A5
2103 A8 9109 A5
B 2104 B7 9110 B5 B
2105 B10 9111 A3
3134
2106 B13 9112 B2
2107 B11 9113 B3
A IN 7101
LD2985BM18R
+3V3 +3V3
100K RES A 2108 B12 9114 B2
1M83 +3V3 2109 D7 9119 H6
F101
1%
1%
F120 SCL SCL 9107 SPI-CLOCK 1 5 2110 D7 9121 G4
1 +3V3 IN OUT
3135
3136
F121 9111 SPI-DATA-IN SPI-DATA-RETURN 9108 SDA +1V8
2 7116-2 2111 G4 C140 B10
1K5
1K5
2101
2102
100n
2103
C RES 3 4
C
4u7
F122
1u0
3 SDA INH BP LM393PT
F123 CONTROL-1 CONTROL-1 9109 SPI-LATCH 2112 H7 F101 A8
4 F116
8
2113 H7 F102 F5
2104
F124 9110 COM 5
10n
5 CONTROL-2 CONTROL-2 PWM-CLOCK
F125 +3V3 7 2114 F9 F103 H7
6 F106
F126 9113 BLANK 6 2115 F9 F104 F5
2
7
RES
F127 RES EEPROM-CS
4
8 2116 F9 F105 D7
2105
3137
-T 10K
F128
10n
TEMP-SENSOR
3111
9 2117 F9 F106 B12
F129 PROG
10
10K
F130 VLED1 +3V3
F117
2118 H8 F107 C7
11
B 12
F131
2106 B 2119 H6 F108 D7
D 13
F132 VLED2 2120 H6 F109 G3 D
C140
9112
9114
2125
33p
14 1105 10n RES 2121 H6 F112 G8
1K5 1%
10u 35V
10u 35V
15 16 VLED1 VLED1-F 3138 2122 F9 F116 A10
2127
2128
2129
2107
100n
2108
+3V3
3139
1u0
10n
1.5A T
47K
2123 F10 F117 B13
RES
7116-1 2124 F10 F118 C11
1K5 1%
LM393PT 2125 B3 F120 A1
RES
3140
2126 F10 F121 A1
8
3
1M1A 1 3141 2127 B1 F122 A1
E 1 SCL
+3V3 +3V3
F118
2
10K RES
2128 B1
2129 B2
F123 A1
F124 B1
E
4
2
1K8 1%
3 SDA 2130 F2 F125 B1
3123
C +3V3
C
RES
CONTROL-1
4 2131 F10 F126 B1
5 CONTROL-2
3101-2 D7 F127 B1
3107
10K
10K
3108
6 +3V3
3101-3 D9 F128 B1
7
8 EEPROM-CS
F107
3101-4 E9 F129 B1
9 TEMP-SENSOR 3102-1 D9 F130 B1
10K
10K
10K
10K
10K
10K
10K
10K
10K
PROG
10 3102-2 D9 F131 B1
5
F 11 VLED1 F105
3102-3 E9 F132 B1 F
10K
12
VLED2 3102-4 D9 F133 E1
13
F108 3103-1 E9 F134 F1
3105-2 2
3106-2 2
3104-1 1
3102-1 1
3104-4 4
3101-3 3
4
14
10K
RES
10K
15 16 3103-2 G10 F135 E1
3102-2
3102-4
7
100R
100R
3109
3110
3105-4
3112
3103-3 G11 F136 F1
3103-4 G10 F137 F1
D D 3104-1 D8 F138 F1
10K 3113
2
7 3101-2
3104-2 E8 F139 F1
G G
10K
3104-3 E8 I110 G8
10K
RES
10K
10K
10K
10K
10K
10K
10K
10K
10K
3104-4 D9 I111 G8
8
5
2109
100p
2110
100p
3105-1 E9 I113 G10
3105-2 D8 I114 G10
3105-3 E8 I115 G10
1
3114
3115
3104-2 2
3104-3 3
3
4
3116
3103-1
3105-4 D8 I124 E11
3102-3
3101-4
3105-1
3105-3
3106-1
3106-3
7102 3106-1 E8 I125 E11
19
43
31
3117
LPC2103FBD48
7
3106-2 D8 I126 F11
VSS Φ VSSA
3106-3 E8
H 11 13
H
10K
X1 P0.0|TXD0|MAT3.1
E MICRO- P0.1|RXD0|MAT3.2
14
E 3107 C7
16M9
12 18 3124-4 4 5 I124
X2 CTRL P0.2|SCL0|CAP0.0 CONTROL-1 3108 C7
1101
47 3127-1 1 8 SCL
12 P0.17|CAP1.2|SCL1
48 3127-4 4 5 100R 3123 C11
All rights reserved. Reproduction in whole or in parts
3119
2122 RES
2124 RES
1 100R
2114 RES
3124-1 E11
10K
1u0
14 P0.19|MAT1.2|MISO1
3120
J 2
J
10K
100p
2115
100p
2116
100p
2117
100p
100p
2123
100p
100p
2126
100p
2131
100p
NCP303LSN10T1 3
2
P0.21|SSEL1|MAT3.0
32
3124-3 E11
IN P0.22|AD0.0 3124-4 E11
1 33
F109 RST P0.23|AD0.1
3 34 3125-1 F11
GND P0.24|AD0.2
9121 RES
38 3125-2 F11
P0.25|AD0.6
5 4 39 UD-MD 3125-4 F11
CD NC P0.26|AD0.7
1M2A 8 I111
P0.27|TRST|CAP2.0
9
3126-1 F11
1 SPI-CLOCK-BUF P0.28|TMS|CAP2.1 3126-2 F11
G I110
G
2111
100n
17
40
42
BLANK-BUF
owner.
7 3131 F112
2118 RES
EEPROM-CS 3129 E11
8
TEMP-SENSOR 3130 G8
9 100R
100p
3132
3131 G7
10K
10K
3133
10 PROG
2112
100n
9106
RES
11 VLED1 3132 H8
9119
12 3133 H8
L 13
14
VLED2
+3V3 F103
3134 A13 L
15 16 +1V8 3135 A11
H H 3136 A12
3137 B11
2119
100n
2120
100n
2121
100n
2113
100n
3138 B13
3139 B12
3140 C11
3141 C13
M 3142 F11
7101 A7
M
7102 E6
7110 F4
7116-1 B11
1 2 3 4 5 6 7 8 9 10 11 12 13
N N
1X03
REF EMC HOLE
O O
CHN SETNAME
1
CLASS_NO 1 2008-06-10
3 ??
P 8204 000 8857
2008-08-08 2 2K9
3 P
NAME Peter Van Hove SUPERS. 3 130 1 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 82
2201 B8
1 2 3 4 5 6 7 8 9 10 11 12 13 2202 C8
A 2203 D8 A
2209 B2
2210 G6
2211 I6
MICROCONTROLLER BLOCK LITEON 2214 A6
INPUT BUFFER 2215 F7
A A 2216 F7
2217 B12
+3V3
B 9208 RES
+3V3
2218 C12
2219 D12
B
+3V3 +3V3
7201-1 2220 E9
14
2214
100n
74HCT125PW 3121 D9
PWM-CLOCK 2 3203 B5
3219
3213
3210
3 PWM-CLOCK-BUF
10K
10K
3207 F205 3204 B7
1
+3V3 EN 100R 3205 C5
2201
2217
100p
1K0 RES
33p
7212 3207 B9
7
PDTC144EU 3209 C9
C 7209
PDTC144EU
SPI-CS SPI-CS SPI-DATA-IN 9209
3210 B3 C
B 3 F202
+3V3
7214 8
VCC
B 3211 C9
EEPROM-CS 1 5
D Φ Q
2 SPI-DATA-RETURN 9210 RES 3212 D11
3213 B3
2 6
(64K) 7201-4 3214 H6
C +3V3
2209
3203
74HCT125PW
10K
33p
3215 H6
14
1
S 3204 3216 H6
7 +3V3 SPI-CLOCK 12
HOLD 3220 3217 H6
D F203
3
W M95010-WDW6 10K
+3V3
3209 F206
13
EN
11
27R
SPI-CLOCK-BUF
3218 H6 D
2202
2218
100p
GND 1K0 RES 3219 B11
33p
7210
7
3220 C11
10K RES
PDTC144EU 4
3 9211
3221 H11
3205
3222 I8
C EEPROM-CS-LOCAL 1 SPI-CLOCK-BUF 9212 RES
C 3223 C11
2 3224 H11
+3V3
7201-2 6216 I8
E E
14
74HCT125PW
7201-1 A10
BLANK 5
6 3223 BLANK-BUF 7201-2 C10
3211 F207
4 7201-3 D10
+3V3 EN 100R
2203
2219
100p
1K0 RES 7201-4 B10
33p
7
7209 B2
9213
7210 C2
7212 B3
7214 B6
F D 9214 RES SPI-DATA-OUT-FIL D 7215 G7
9208 A10 F
7201-3 +3V3
9209 B9
14
74HCT125PW
9 9210 B10
3121 9211 C9
SPI-DATA-RETURN 8 F208 3212
100R EN
10 DATA-RETURN-SWITCH 9212 C10
2220 RES
100R 9213 D9
7
9214 D10
100p
F202 B3
G F203 C5 G
F204 H6
F205 B10
E E F206 C10
F207 C10
F208 D10
F209 H11
F210 G9
H F211 G9
F212 G9
H
F213 H9
F214 H9
F215 H9
F F
I +3V3
I
2216 2215
1u0 100n
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
7215
28
TLC5946PWP
J VCC
Φ J
LED DRIVER
G PWM CONTROL F210
G
7 PWM-R1
0
8
1
PWM-CLOCK-BUF 25 9 F211
GSCLK 2
BLANK-BUF 10 PWM-G1
3
2210 2 11 F212
BLANK 4
33p 12 PWM-B1
5
K PROG 3217
100R F204
6
MODE 6
7
13
14
F213
PWM-R2 K
3218 RES 27 15 +3V3 +3V3
3215 IREF OUT 8
1K2 16 F214
9
SPI-LATCH 1K2 3 17 PWM-G2
owner.
XLAT 10
18 F215
11
H H
3224
3221
4 19
3K3
SPI-CLOCK-BUF PWM-B2
3K3
SCLK 12
SPI-DATA-IN 5 20 F209
SIN 13
SPI-DATA-OUT 3216 24 21 EEPROM-CS-LOCAL EEPROM-CS-LOCAL
SOUT 14
SPI-DATA-OUT-FIL 100R 22 DATA-RETURN-SWITCH DATA-RETURN-SWITCH
15
L +3V3
3214
26
XHALF XERR
23 L
10K VIA
GND GND_HS
470R
2211
3222
1
29
30
31
32
33
33p
SML-310
6216
M I I M
+3V3
1 2 3 4 5 6 7 8 9 10 11 12 13
N N
O O
CHN SETNAME
CLASS_NO 1 2008-06-10
3 ??
P 8204 000 8857
2008-08-08 2 2K9
3 P
NAME Peter Van Hove SUPERS. 3 130 2 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18310_631_090306.eps
090306
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 83
3301 F9 9310-2 B8
1 2 3 4 5 6 7 8 9 10 11 12 13 3302 F9 9310-4 B8
A 3303 F9 9311-1 H13 A
3304 G9 9311-3 H13
3305 G9 9311-4 H12
LED LITEON 3306 H9 9312-1 B10
3307 H9 9312-3 B10
3308 H9 9312-4 B10
3309 I9 9313-1 B12
3310 D12 9313-2 B12
B A A 3311 D12
3312 E12
9313-4 B12
9314 G5
B
VLED1-F VLED2 3313 E12 9315-1 C12
3314 E12 9315-2 C12
3315 E12 9315-4 C12
3316 E12 9316 H5
9307
9308
3317 F12 9317 F5
3318 F12 9318-1 C8
C 3319 F12
3320 F12
9318-3 C8
9318-4 C8
C
3321 G12 9319-1 D9
3322 G12 9319-3 D9
B B 3323 G12
3325 G4
9319-4 D9
9320-1 D7
3326 H4 9320-2 D7
VLED1-F VLED2 3327 H4 9320-4 D7
5
3328 G4 9325 F10
D D
9309-2
9309-1
9309-4
9310-2
9310-4
9310-1
9312-4
9312-3
9312-1
9313-1
9313-2
9313-4
3330 I4 9326 G10
3331 F4 9327 H10
9301
9302
3332 F4 F302 G5
4
7000 7001 7002 7003 7004 7005
LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 G 3333 H4 F303 G4
B R
3334 F4 F304 H5
4 GREEN 3 4 GREEN 3 4 GREEN 3 2 9305-2 7 4 GREEN 3 6 9318-3 3 4 GREEN 3 3 9303-3 6 4 GREEN 3 2 9315-2 7 3335 D12 F305 H5
3336 D2 F307 F5
E C 5 RED 2 5 RED 2 5 RED 2 4 9305-4 5 5 RED 2 8 9318-1 1 5 RED 2 4 9303-4 5 5 RED 2 4 9315-4 5
C 3337 D2 F308 F4
E
6 1 6 1 6 1 1 9305-1 8 6 1 5 9318-4 4 6 1 1 9303-1 8 6 1 1 9315-1 8
3338 D1 F325 F10
BLUE BLUE BLUE BLUE BLUE BLUE
3339 D2 F326 F9
GND_HS GND_HS GND_HS GND_HS GND_HS GND_HS 3340 D1 F327 G10
G R B
7
7
3341 D1 F328 G9
3342 E2 F329 H10
F344 F345 F346 3343 D1 F330 H10
F340 F341 F342 F343 3344 D1 F340 D1
3345 D12 F341 D1
B R G
F RED-1 3346 E1
3347 D1
F342 D1
F343 D2
F
GREEN-1
3348 E12 F344 D12
D 3338 3341
3336 BLUE-1
D 3349 E1 F345 D12
3350 E1 F346 D13
3351 E12 F347 G12
9320-1 8
9320-4 5
9320-2 7
6
560R 1K5 390R 3335 3310 3354
3340 3344 3337 3352 E1 F348 G13
9306-4
9306-1
9306-3
9319-1
9319-4
9319-3
390R 1K5 560R 3353 E1 F349 G13
560R 1K5 390R 3345 3311 3357 3354 D13
G 3343 3347 3339
3355 E1 G
3
390R 1K5 560R
560R 1K5 390R GREEN6 GREEN6 2 9304-2 7 3356 E1
3348 3312 3358
3342 3357 D13
3346 3350
RED6 RED6 1 9304-1 8 390R 1K5 560R 3358 E13
560R 1K5 390R 3351 3313 3359
BLUE6 BLUE6 4 9304-4 5 3359 E13
3349 3353
E 560R 1K5
390R 1K5
3314
560R
3360
E 3360 E13
3361 E13
3352 3356 3362 E13
H 560R 1K5
1K5
3315
560R
3361
3363 F13
3364 F13
H
3355 3384
1K5 560R 3365 F13
560R 1K5 3316 3362 3366 F13
3369 3385 3367 G13
VLED1-F VLED1-F 1K5 560R 3368 G13
560R 1K5 3317 3363 3369 F1
3370 3386 F307 F325
BLUE-2 1K5 560R 3370 F1
3331
3301
I 7307 3371 F1
I
10K
10K
560R 1K5 7317 3318 3364
F 3371 3387
BC847BW BC847BW
1K5 560R
F 3372 F1
3334 F308 3302 F326 3373 F1
9317
9325
560R 1K5 3319 3365 3374 G1
3372 3388 1K0 1K0
1K5 560R 3384 E1
3332
3303
3385 F1
10K
10K
560R 1K5 3320 3366
is prohibited without the written consent of the copyright
3304
7305
10K
10K
7315 1K5
BC847BW if VLED < 17V BC847BW 7003 C6
3328 F303 3305 F328 7004 C8
9314
9326
K 1K0 1K0
F347 F348 F349 7005 C11
7305 G4
K
7306 H5
3326
3306
10K
10K
7307 F4
owner.
7315 G9
8
7316 H10
PWM-R1 PWM-R2
9311-4
9311-3
9311-1
VLED1-F VLED1-F 7317 F9
H H 9301 C1
L F304 F329 9302 C1
L
1
GREEN-2 9303-1 C10
3327
3307
7306
10K
10K
7316 9303-3 C10
BC847BW BC847BW
9303-4 C10
3333 F305 3308 F330
9304-1 E10
9316
9327
1K0 1K0 9304-2 E10
GREEN-2 9304-4 E10
3330
3309
10K
10K
9305-1 C6
RED-2
9305-2 C6
M BLUE-2 9305-4 C6 M
PWM-G1 PWM-G2 9306-1 D5
I I 9306-3 D5
9306-4 D5
9307 A6
9308 A6
9309-1 B6
9309-2 B6
N 9309-4 B6
9310-1 B8
N
1 2 3 4 5 6 7 8 9 10 11 12 13
O O
CHN SETNAME
CLASS_NO 1 2008-06-10
3 ??
P 8204 000 8857
2008-08-08 2 2K9
3 P
NAME Peter Van Hove SUPERS. 3 130 3 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18310_632_090306.eps
090306
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 84
A A
1M3A E2
1 2 3 4 5 6 7 8 9 10 1M85 D2
3536 E9
3537 E9
B 3538 E7 B
LED DRIVE 3539 E9
3540 E7
3541 E8
3542 E9
3543 E7
3544 E8
3546 E7
C 3547 E8
3549 F7
C
A A 3550 E8
3552 F7
3553 F8
3555 F7
3556 F8
7006 2 7007 7008 7009
LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 3569 F7
3570 F7
D GREEN-1 4 GREEN 3 4 GREEN 3 4 GREEN 3 4 GREEN 3 3571 G7 D
3572 G7
RED-1 5 RED 5 RED 5 RED 5 RED
3573 G7
6 1 6 1 6 1 6 1
3574 G7
BLUE-1 BLUE BLUE BLUE BLUE
B GND_HS GND_HS GND_HS GND_HS B 3584 F8
3585 F8
7
3586 F8
3587 G8
E 3588 G8 E
3589 G8
3590 G8
2 2 2 3591 G8
7006 A2
7007 A4
7008 A5
7009 A6
F C C F
1M85
1 SPI-CLOCK-BUF
2 SPI-DATA-OUT
G 3
4
SPI-DATA-RETURN
SPI-LATCH G
5 PWM-CLOCK-BUF GREEN-2
6 +3V3
D 7 BLANK-BUF
EEPROM-CS
RED-2 D
8
9 TEMP-SENSOR BLUE-2
10 PROG
11 VLED1
12
H 13
14
VLED2
H
15 16
3536
3538 3541
8 EEPROM-CS
All rights reserved. Reproduction in whole or in parts
560R 1K5
3570 3586
K 560R
3571
1K5
3587
K
560R 1K5
owner.
3572 3588
560R 1K5
G 3573 3589
G
560R 1K5
L 3574 3590
L
560R 1K5
3591
1K5
M M
1 2 3 4 5 6 7 8 9 10
N 1X04
N
REF EMC HOLE
O O
CHN SETNAME
CLASS_NO 1 2008-08-14
3 2008-10-31
P 8204 000 8897
2008-08-14 2 LITEON 2K9
2008-10-31 3 P
NAME Peter Van Hove SUPERS. 1 130 1 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18310_633_090306.eps
090306
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 85
3364
3365
3366
3367
3363
3368
3354
3357
3358
3359
3360
3361
3362
2110 2109
3109
3108
3107
9313
2129 2128
9113
9109
9112
9111
2125
1M83 1M84 1M85
3110
3120
3128
3317
3316
3315
3313
3312
3311
3310
3335
3345
3348
3351
3119
3129 9315
2101 9121
3132
6216
3314
3320
3319
3318
3323
3322
3321
3221
3224
2103
2102
7215
2211
3216
3133
9102
3117
3114
3113
3138 3136
7101
3111
C140
3106 3127
2106 3139
2105
3137
I110
2111
3222
7110 2209 2108
2104
2119
1101 2117
9110
2130
9114
7212 7210
7209
9107
2202
9302
2127
I113
3103
7000
7001
7002
7003
7004
7005
7006
7007
7008
7009
3342 2116
1X03 1X04
I111
9106
3131
3140 3135
7116
3126
1105
I114
3306
3305
3304
3303
3302
3301
3309
3308
3307
3338 3374 3385 3389 I115 2126
2112 3213
3340 3369 3384 3390 3124 3130
3121 3116
3332
7307 3334
3331
3343 3373 3356 3391 2203
9325
9327
3220 3212
9326
2120 9119 2214
7315
7317
7316
2113
7102
9212
3552 3555
3549 3570
3546 3571
3543 3572
3540 3573
3538 3569
3574
9308
3211
3204
3123
9317
3210
3333
3327
3330
2218
3349 3371 3347 3387
2210
7201
2123
7214
3326
3328
3325
3104
9307 2124 3134
3541 3553
3544 3588
3547 3587
3550 3586
3556 3591
3584 3590
3585 3589
2122
3352 3370 3344 3388
9208
3219
3102
2216 2121 3141
3355 3341 3353
9213
3142
3207
7306
3214 2215 2131
9301
3217
9311
3536
3537
3539
3542
3337
7305
9211
9316
2217 9209
9312
9303
9319
9304
3203 3205
3218
3215
9305
9309
9320
9318
9310
9103
3118
9101
2114
9314
9306
9108
2201
3336
2220
2115
3112
2118
9104
3223 2219 3101 3125 3105
I126
F345
F116
F106
F344 F209 F104 I124 F212
F101
F109
F213 F137
F128
F131
F129
F124
F121
F308
F134 F210
F330 F326 F328
F202 F203 I125 F138
F206
F103 F207
F133 F112 F305 F211 F340 F343
F118 F136 F208
F329 F325 F327 F303 F125
F102 F205
F341
F117 F307
F204 F342
F304 F302
18310_553_090309
3104 313 6315.2 090309
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 86
A 1 2 3 4 5 6 7 8 9 10 11 12 13 1101 E4
1105 B5
7116-2 A12
9101 E5
A
1M1A C1 9102 F5
1M2A G1 9103 F5
1M83 A1 9104 F5
MICROCONTROLLER BLOCK LITEON 1M84 E1 9106 H8
2101 A6 9107 A5
2102 A7 9108 A5
2103 A8 9109 A5
B 2104 B7 9110 B5 B
2105 B10 9111 A3
3134
2106 B13 9112 B2
2107 B11 9113 B3
A IN 7101
LD2985BM18R
+3V3 +3V3
100K RES A 2108 B12 9114 B2
1M83 +3V3 2109 D7 9119 H6
F101
1%
1%
F120 SCL SCL 9107 SPI-CLOCK 1 5 2110 D7 9121 G4
1 +3V3 IN OUT
3135
3136
F121 9111 SPI-DATA-IN SPI-DATA-RETURN 9108 SDA +1V8
2 7116-2 2111 G4 C140 B10
1K5
1K5
2101
2102
100n
2103
C RES 3 4
C
4u7
F122
1u0
3 SDA INH BP LM393PT
F123 CONTROL-1 CONTROL-1 9109 SPI-LATCH 2112 H7 F101 A8
4 F116
8
2113 H7 F102 F5
2104
F124 9110 COM 5
10n
5 CONTROL-2 CONTROL-2 PWM-CLOCK
F125 +3V3 7 2114 F9 F103 H7
6 F106
F126 9113 BLANK 6 2115 F9 F104 F5
2
7
RES
F127 RES EEPROM-CS
4
8 2116 F9 F105 D7
2105
3137
-T 10K
F128
10n
TEMP-SENSOR
3111
9 2117 F9 F106 B12
F129 PROG
10
10K
F130 VLED1 +3V3
F117
2118 H8 F107 C7
11
B 12
F131
2106 B 2119 H6 F108 D7
D 13
F132 VLED2 2120 H6 F109 G3 D
C140
9112
9114
2125
33p
14 1105 10n RES 2121 H6 F112 G8
1K5 1%
10u 35V
10u 35V
15 16 VLED1 VLED1-F 3138 2122 F9 F116 A10
2127
2128
2129
2107
100n
2108
+3V3
3139
1u0
10n
1.5A T
47K
2123 F10 F117 B13
RES
7116-1 2124 F10 F118 C11
1K5 1%
LM393PT 2125 B3 F120 A1
RES
3140
2126 F10 F121 A1
8
3
1M1A 1 3141 2127 B1 F122 A1
E 1 SCL
+3V3 +3V3
F118
2
10K RES
2128 B1
2129 B2
F123 A1
F124 B1
E
4
2
1K8 1%
3 SDA 2130 F2 F125 B1
3123
+3V3
C C
RES
CONTROL-1
4 2131 F10 F126 B1
5 CONTROL-2
3101-2 D7 F127 B1
3107
10K
10K
3108
6 +3V3
3101-3 D9 F128 B1
7
8 EEPROM-CS
F107
3101-4 E9 F129 B1
9 TEMP-SENSOR 3102-1 D9 F130 B1
10K
10K
10K
10K
10K
10K
10K
10K
10K
PROG
10 3102-2 D9 F131 B1
5
F 11 VLED1 F105
3102-3 E9 F132 B1 F
10K
12
VLED2 3102-4 D9 F133 E1
13
F108 3103-1 E9 F134 F1
3105-2 2
3106-2 2
3104-1 1
3102-1 1
3104-4 4
3101-3 3
4
14
10K
RES
10K
15 16 3103-2 G10 F135 E1
3102-2
3102-4
7
100R
100R
3109
3110
3105-4
3112
3103-3 G11 F136 F1
3103-4 G10 F137 F1
D D 3104-1 D8 F138 F1
10K 3113
2
7 3101-2
3104-2 E8 F139 F1
G G
10K
3104-3 E8 I110 G8
10K
RES
10K
10K
10K
10K
10K
10K
10K
10K
10K
3104-4 D9 I111 G8
8
5
2109
100p
2110
100p
3105-1 E9 I113 G10
3105-2 D8 I114 G10
3105-3 E8 I115 G10
1
3114
3115
3104-2 2
3104-3 3
3
4
3116
3103-1
3105-4 D8 I124 E11
3102-3
3101-4
3105-1
3105-3
3106-1
3106-3
7102 3106-1 E8 I125 E11
19
43
31
3117
LPC2103FBD48
7
3106-2 D8 I126 F11
VSS Φ VSSA
3106-3 E8
H 11 13
H
10K
X1 P0.0|TXD0|MAT3.1
E MICRO- P0.1|RXD0|MAT3.2
14
E 3107 C7
16M9
12 18 3124-4 4 5 I124
X2 CTRL P0.2|SCL0|CAP0.0 CONTROL-1 3108 C7
1101
47 3127-1 1 8 SCL
12 P0.17|CAP1.2|SCL1
48 3127-4 4 5 100R 3123 C11
All rights reserved. Reproduction in whole or in parts
3119
2122 RES
2124 RES
1 100R
2114 RES
3124-1 E11
10K
1u0
14 P0.19|MAT1.2|MISO1
3120
J 2
J
10K
100p
2115
100p
2116
100p
2117
100p
100p
2123
100p
100p
2126
100p
2131
100p
NCP303LSN10T1 3
2
P0.21|SSEL1|MAT3.0
32
3124-3 E11
IN P0.22|AD0.0 3124-4 E11
1 33
F109 RST P0.23|AD0.1
3 34 3125-1 F11
GND P0.24|AD0.2
9121 RES
38 3125-2 F11
P0.25|AD0.6
5 4 39 UD-MD 3125-4 F11
CD NC P0.26|AD0.7
1M2A 8 I111
P0.27|TRST|CAP2.0
9
3126-1 F11
1 SPI-CLOCK-BUF P0.28|TMS|CAP2.1 3126-2 F11
G G
2111
100n
17
40
42
BLANK-BUF
owner.
7 3131 F112
2118 RES
EEPROM-CS 3129 E11
8
TEMP-SENSOR 3130 G8
9 100R
100p
3132
3131 G7
10K
10K
3133
10 PROG
2112
100n
9106
RES
11 VLED1 3132 H8
9119
12 3133 H8
L 13
14
VLED2
+3V3 F103
3134 A13 L
15 16 +1V8 3135 A11
H H 3136 A12
3137 B11
2119
100n
2120
100n
2121
100n
2113
100n
3138 B13
3139 B12
3140 C11
3141 C13
M 3142 F11
7101 A7
M
7102 E6
7110 F4
7116-1 B11
1 2 3 4 5 6 7 8 9 10 11 12 13
N N
1X03
REF EMC HOLE
O O
CHN SETNAME
1
CLASS_NO 1 2008-06-10
3 ??
P 8204 000 8857
2008-08-08 2 2K9
3 P
NAME Peter Van Hove SUPERS. 3 130 1 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18560_510_090403.eps
090403
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 87
2201 B8
1 2 3 4 5 6 7 8 9 10 11 12 13 2202 C8
A 2203 D8 A
2209 B2
2210 G6
2211 I6
MICROCONTROLLER BLOCK LITEON 2214 A6
INPUT BUFFER 2215 F7
A A 2216 F7
2217 B12
+3V3
B +3V3 +3V3
9208 RES
+3V3
2218 C12
2219 D12
B
7201-1 2220 E9
14
2214
100n
74HCT125PW 3121 D9
PWM-CLOCK 2 3203 B5
3219
3213
3210
3 PWM-CLOCK-BUF
10K
10K
3207 F205 3204 B7
1
+3V3 EN 100R 3205 C5
2201
2217
100p
1K0 RES
33p
7212 3207 B9
7
PDTC144EU 3209 C9
C 7209
PDTC144EU
SPI-CS SPI-CS SPI-DATA-IN 9209
3210 B3 C
B 3 F202
+3V3
7214 8
VCC
B 3211 C9
EEPROM-CS 1 5
D Φ Q
2 SPI-DATA-RETURN 9210 RES 3212 D11
3213 B3
2 6
(64K) 7201-4 3214 H6
C +3V3
2209
3203
74HCT125PW
10K
33p
3215 H6
14
1
S 3204 3216 H6
7 +3V3 SPI-CLOCK 12
HOLD 3220 3217 H6
D F203
3
W M95010-WDW6 10K
+3V3
3209 F206
13
EN
11
27R
SPI-CLOCK-BUF
3218 H6 D
2202
2218
100p
GND 1K0 RES 3219 B11
33p
7210
7
3220 C11
10K RES
PDTC144EU 4
3 9211
3221 H11
3205
3222 I8
C EEPROM-CS-LOCAL 1 SPI-CLOCK-BUF 9212 RES
C 3223 C11
2 3224 H11
+3V3
7201-2 6216 I8
E E
14
74HCT125PW
7201-1 A10
BLANK 5
6 3223 BLANK-BUF 7201-2 C10
3211 F207
4 7201-3 D10
+3V3 EN 100R
2203
2219
100p
1K0 RES 7201-4 B10
33p
7
7209 B2
9213
7210 C2
7212 B3
7214 B6
F D 9214 RES SPI-DATA-OUT-FIL D 7215 G7
9208 A10 F
7201-3 +3V3
9209 B9
14
74HCT125PW
9 9210 B10
3121 9211 C9
SPI-DATA-RETURN 8 F208 3212
100R EN
10 DATA-RETURN-SWITCH 9212 C10
2220 RES
100R 9213 D9
7
9214 D10
100p
F202 B3
G F203 C5 G
F204 H6
F205 B10
E E F206 C10
F207 C10
F208 D10
F209 H11
F210 G9
H F211 G9
F212 G9
H
F213 H9
F214 H9
F215 H9
F F
I +3V3
I
2216 2215
1u0 100n
is prohibited without the written consent of the copyright
All rights reserved. Reproduction in whole or in parts
7215
28
TLC5946PWP
J VCC
Φ J
LED DRIVER
G PWM CONTROL F210
G
7 PWM-R1
0
8
1
PWM-CLOCK-BUF 25 9 F211
GSCLK 2
BLANK-BUF 10 PWM-G1
3
2210 2 11 F212
BLANK 4
33p 12 PWM-B1
5
K PROG 3217
100R F204
6
MODE 6
7
13
14
F213
PWM-R2 K
3218 RES 27 15 +3V3 +3V3
3215 IREF OUT 8
1K2 16 F214
9
SPI-LATCH 1K2 3 17 PWM-G2
owner.
XLAT 10
18 F215
11
H H
3224
3221
4 19
3K3
SPI-CLOCK-BUF PWM-B2
3K3
SCLK 12
SPI-DATA-IN 5 20 F209
SIN 13
SPI-DATA-OUT 3216 24 21 EEPROM-CS-LOCAL EEPROM-CS-LOCAL
SOUT 14
SPI-DATA-OUT-FIL 100R 22 DATA-RETURN-SWITCH DATA-RETURN-SWITCH
15
L +3V3
3214
26
XHALF XERR
23 L
10K VIA
GND GND_HS
470R
2211
3222
1
29
30
31
32
33
33p
SML-310
6216
M I I M
+3V3
1 2 3 4 5 6 7 8 9 10 11 12 13
N N
O O
CHN SETNAME
CLASS_NO 1 2008-06-10
3 ??
P 8204 000 8857
2008-08-08 2 2K9
3 P
NAME Peter Van Hove SUPERS. 3 130 2 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18560_511_090403.eps
090403
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 88
3301 F9 9310-2 B8
1 2 3 4 5 6 7 8 9 10 11 12 13 3302 F9 9310-4 B8
A 3303 F9 9311-1 H13 A
3304 G9 9311-3 H13
3305 G9 9311-4 H12
LED LITEON 3306 H9 9312-1 B10
3307 H9 9312-3 B10
3308 H9 9312-4 B10
3309 I9 9313-1 B12
3310 D12 9313-2 B12
B A A 3311 D12
3312 E12
9313-4 B12
9314 G5
B
VLED1-F VLED2 3313 E12 9315-1 C12
3314 E12 9315-2 C12
3315 E12 9315-4 C12
3316 E12 9316 H5
9307
9308
3317 F12 9317 F5
3318 F12 9318-1 C8
C 3319 F12
3320 F12
9318-3 C8
9318-4 C8
C
3321 G12 9319-1 D9
3322 G12 9319-3 D9
B B 3323 G12
3325 G4
9319-4 D9
9320-1 D7
3326 H4 9320-2 D7
VLED1-F VLED2 3327 H4 9320-4 D7
5
3328 G4 9325 F10
D D
9309-2
9309-1
9309-4
9310-2
9310-4
9310-1
9312-4
9312-3
9312-1
9313-1
9313-2
9313-4
3330 I4 9326 G10
3331 F4 9327 H10
9301
9302
3332 F4 F302 G5
4
7000 7001 7002 7003 7004 7005
LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 LTW-E500T-PH1 G 3333 H4 F303 G4
B R
3334 F4 F304 H5
4 GREEN 3 4 GREEN 3 4 GREEN 3 2 9305-2 7 4 GREEN 3 6 9318-3 3 4 GREEN 3 3 9303-3 6 4 GREEN 3 2 9315-2 7 3335 D12 F305 H5
3336 D2 F307 F5
E C 5 RED 2 5 RED 2 5 RED 2 4 9305-4 5 5 RED 2 8 9318-1 1 5 RED 2 4 9303-4 5 5 RED 2 4 9315-4 5
C 3337 D2 F308 F4
E
6 1 6 1 6 1 1 9305-1 8 6 1 5 9318-4 4 6 1 1 9303-1 8 6 1 1 9315-1 8
3338 D1 F325 F10
BLUE BLUE BLUE BLUE BLUE BLUE
3339 D2 F326 F9
GND_HS GND_HS GND_HS GND_HS GND_HS GND_HS 3340 D1 F327 G10
G R B
7
7
3341 D1 F328 G9
3342 E2 F329 H10
F344 F345 F346 3343 D1 F330 H10
F340 F341 F342 F343 3344 D1 F340 D1
3345 D12 F341 D1
B R G
F RED-1 3346 E1
3347 D1
F342 D1
F343 D2
F
GREEN-1
3348 E12 F344 D12
D 3338 3341
3336 BLUE-1
D 3349 E1 F345 D12
3350 E1 F346 D13
3351 E12 F347 G12
9320-1 8
9320-4 5
9320-2 7
6
560R 1K5 390R 3335 3310 3354
3340 3344 3337 3352 E1 F348 G13
9306-4
9306-1
9306-3
9319-1
9319-4
9319-3
390R 1K5 560R 3353 E1 F349 G13
560R 1K5 390R 3345 3311 3357 3354 D13
G 3343 3347 3339
3355 E1 G
3
390R 1K5 560R
560R 1K5 390R GREEN6 GREEN6 2 9304-2 7 3356 E1
3348 3312 3358
3342 3357 D13
3346 3350
RED6 RED6 1 9304-1 8 390R 1K5 560R 3358 E13
560R 1K5 390R 3351 3313 3359
BLUE6 BLUE6 4 9304-4 5 3359 E13
3349 3353
E 560R 1K5
390R 1K5
3314
560R
3360
E 3360 E13
3361 E13
3352 3356 3362 E13
H 560R 1K5
1K5
3315
560R
3361
3363 F13
3364 F13
H
3355 3384
1K5 560R 3365 F13
560R 1K5 3316 3362 3366 F13
3369 3385 3367 G13
VLED1-F VLED1-F 1K5 560R 3368 G13
560R 1K5 3317 3363 3369 F1
3370 3386 F307 F325
BLUE-2 1K5 560R 3370 F1
3331
3301
I 7307 3371 F1
I
10K
10K
560R 1K5 7317 3318 3364
F 3371 3387
BC847BW BC847BW
1K5 560R
F 3372 F1
3334 F308 3302 F326 3373 F1
9317
9325
560R 1K5 3319 3365 3374 G1
3372 3388 1K0 1K0
1K5 560R 3384 E1
3332
3303
3385 F1
10K
10K
560R 1K5 3320 3366
is prohibited without the written consent of the copyright
3304
7305
10K
10K
7315 1K5
BC847BW if VLED < 17V BC847BW 7003 C6
3328 F303 3305 F328 7004 C8
9314
9326
K 1K0 1K0
F347 F348 F349 7005 C11
7305 G4
K
7306 H5
3326
3306
10K
10K
7307 F4
owner.
7315 G9
8
7316 H10
PWM-R1 PWM-R2
9311-4
9311-3
9311-1
VLED1-F VLED1-F 7317 F9
H H 9301 C1
L F304 F329 9302 C1
L
1
GREEN-2 9303-1 C10
3327
3307
7306
10K
10K
7316 9303-3 C10
BC847BW BC847BW
9303-4 C10
3333 F305 3308 F330
9304-1 E10
9316
9327
1K0 1K0 9304-2 E10
GREEN-2 9304-4 E10
3330
3309
10K
10K
9305-1 C6
RED-2
9305-2 C6
M BLUE-2 9305-4 C6 M
PWM-G1 PWM-G2 9306-1 D5
I I 9306-3 D5
9306-4 D5
9307 A6
9308 A6
9309-1 B6
9309-2 B6
N 9309-4 B6
9310-1 B8
N
1 2 3 4 5 6 7 8 9 10 11 12 13
O O
CHN SETNAME
CLASS_NO 1 2008-06-10
3 ??
P 8204 000 8857
2008-08-08 2 2K9
3 P
NAME Peter Van Hove SUPERS. 3 130 3 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18560_512_090403.eps
090403
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 89
A A
1M3A F2
1 2 3 4 5 6 7 8 9 10 11 12 1M85 D2
3536 E11
3537 E11
3538 E9
3539 F11
B 3540 F9
B
LED DRIVE 3541 E10
3542 F11
A A 3543 F9
3544 F10
3546 F9
3547 F10
3549 F9
3550 F10
C 3552 F9 C
3553 F10
3555 G10
3556 F10
3569 G9
3570 G9
B 7006
LTW-E500T-PH1
2 7007
LTW-E500T-PH1
7008
LTW-E500T-PH1
7009
LTW-E500T-PH1
7010
LTW-E500T-PH1
7011
LTW-E500T-PH1
B 3571 G9
3572 G9
D GREEN-1 4 GREEN 3 4 GREEN 3 4 GREEN 3 4 GREEN 3 4 GREEN 3 4 GREEN 3
3573 H9 D
3574 H9
RED-1 5 RED 5 RED 5 RED 5 RED 5 RED 5 RED 3584 G10
3585 G10
BLUE-1 6 BLUE 1 6 BLUE 1 6 BLUE 1 6 BLUE 1 6 BLUE 1 6 BLUE 1
3586 G10
GND_HS GND_HS GND_HS GND_HS GND_HS GND_HS 3587 G10
3588 G10
7
3589 H10
E 3590 H10 E
3591 H10
C C 7006 B2
2 2 2 2 2 7007 B3
7008 B5
7009 B6
7010 B7
7011 B8
F F
D 1M85
D
1 SPI-CLOCK-BUF
2 SPI-DATA-OUT
G 3
4
SPI-DATA-RETURN
SPI-LATCH G
5 PWM-CLOCK-BUF GREEN-2
6 +3V3
7 BLANK-BUF RED-2
8 EEPROM-CS
9 TEMP-SENSOR BLUE-2
10 PROG
11 VLED1
H E 12
13 VLED2 E H
14
15 16
3536
3538 3541
8 EEPROM-CS
All rights reserved. Reproduction in whole or in parts
560R 1K5
G 3570 3586 G
K 560R
3571
1K5
3587
K
560R 1K5
owner.
3572 3588
560R 1K5
3573 3589
560R 1K5
L 3574 3590
L
H 560R 1K5 H
3591
1K5
M M
1 2 3 4 5 6 7 8 9 10 11 12
1X04
REF EMC HOLE
N N
O O
CHN SETNAME
CLASS_NO 2 2008-10-29
6 LED + CONNECTOR
P 8204 000 8898
2008-08-14 2 2K9 LITEON
2008-10-29 3 P
NAME Peter Van Hove SUPERS. 1 130 1 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18560_513_090403.eps
090403
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 90
3364
3365
3366
3367
3363
3368
3354
3357
3358
3359
3360
3361
3362
2110 2109
3109
3108
3107
9313
2129 2128
9113
9109
9112
9111
2125
1M83 1M84 1M85
3110
3120
3128
3320 3317
3319 3316
3318 3315
3323 3313
3322 3312
3321 3311
3310
3335
3345
3348
3351
3119
3129 9315
2101 9121
3132
6216
3314
3221
3224
2103
2102
7215
2211
3216
3133
9102
3117
3114
3113
3138 3136
7101
3111
C140
3106 3127
2106 3139
2105
3137
I110
2111
3222
7110 2209 2108
2104
2119
1101 2117
9110
2130
9114
7212 7210
7209
9107
2202
9302
2127
I113
3103
7000
7001
7002
7003
7004
7005
7006
7007
7008
7009
7010
7011
3342 2116
1X03 1X04
I111
9106
3131
3140 3135
7116
3126
1105
I114
3306
3305
3304
3303
3302
3301
3309
3308
3307
3338 3374 3385 3389 I115 2126
2112 3213
3340 3369 3384 3390 3124 3130
3121 3116
3332
7307 3334
3331
3343 3373 3356 3391 2203
9325
9327
3220 3212
9326
2120 9119 2214
7315
7317
7316
2113
7102
9212
3552 3555
3549 3570
3546 3571
3543 3572
3540 3573
3538 3569
3574
9308
3211
3204
3123
9317
3210
3333
3327
3330
2218
3349 3371 3347 3387
2210
7201
2123
7214
3326
3328
3325
3104
9307 2124 3134
3541 3553
3544 3588
3547 3587
3550 3586
3556 3591
3584 3590
3585 3589
2122
3352 3370 3344 3388
9208
3219
3102
2216 2121 3141
3355 3341 3353
9213
3142
3207
7306
3214 2215 2131
9301
3217
9311
3536
3537
3539
3542
3337
7305
9211
9316
2217 9209
9312
9303
9319
9304
3203 3205
3218
3215
9305
9309
9320
9318
9310
9103
3118
9101
2114
9314
9306
9108
2201
3336
2220
2115
3112
2118
9104
3223 2219 3101 3125 3105
I126
F345
F116
F106
F344 F209 F104 I124 F212
F101
F109
F213 F137
F128
F131
F129
F124
F121
F308
F134 F210
F330 F326 F328
F202 F203 I125 F138
F206
F103 F207
F133 F112 F305 F211 F340 F343
F118 F136 F208
F329 F325 F327 F303 F125
F102 F205
F341
F117 F307
F204 F342
F304 F302
18490_551_090326.eps
31043136335.2 090331
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 91
A 2100 B2
2101 B4
2107 B6
2108 B5
2114 C8
2115 D7
2121 E8
2122 B11
2129 F8
2130 F7
2140 C9
2141 C9
3106 C2
3107 C3
3115 C6
3116 C5
3122 F2
3124 C6
3130 E5
3131 E6
3137 D6
3138 E9
3144 F8
3145 E11
3151 G11
3152 G11
3158 F3
3159 H1
5103 E8
5104 B11
6104 B2
7100-1 C2
7103 C4
7104 D2
F100 C4
F101 C7
F107 B7
F108 D10
F114 D4
F115 D4
I107 D3
I108 D4
I115 C5
I116 D5
I122 E5
I124 E4
I130 F7
I131 E8
I138 F11
I141 H2
A
2102 D1 2109 C6 2116 E9 2123 B11 2131 F7 3100 B2 3108 B4 3117 D1 3125 D6 3132 C7 3139 E7 3146 E10 3153 F8 3160 H1 5105 E11 7100-2 B1 7105-1 E3 F102 D6 F109 E10 I100 B3 I109 C2 I117 D5 I125 F3 I132 E8 I143 C8
2103 D4 2110 C8 2117 E9 2124 C12 2132 F5 3101 B2 3109 C5 3118 E1 3126 D6 3133 C8 3140 E8 3147 F11 3154 F8 3164 D4 6100 E6 7101-1 B5 7105-2 E4 F103 D6 F110 F10 I101 B1 I111 D5 I118 D6 I126 F5 I133 F8 I144 C8
2104 B6 2111 C8 2118 E9 2125 E12 2133 H2 3102 C2 3110 C5 3119 E4 3127 D6 3134 C8 3141 E8 3148 F10 3155 F8 5100 B8 6101 F5 7101-2 C6 7106 F7 F104 E7 F111 E12 I102 C1 I112 B5 I119 D6 I127 F2 I134 F8 I146 E5
2105 D6 2112 C9 2119 E9 2127 E12 2134 H2 3103 C1 3113 C5 3120 E4 3128 D5 3135 D8 3142 E6 3149 F11 3156 F7 5101 C8 6102 G7 7102-1 C7 7107-1 E10 F105 F4 F112 D9 I103 B4 I113 C5 I120 D6 I128 D1 I136 E9 I147 F7
2106 E5 2113 C7 2120 E8 2128 F7 2135 H2 3105 C1 3114 C5 3121 E4 3129 D5 3136 D7 3143 E6 3150 F11 3157 F7 5102 E8 6103 F7 7102-2 D6 7107-2 F10 F106 C2 F113 F7 I106 D4 I114 D8 I121 C6 I129 E6 I137 E11 I148 C8
B B
1 2 3 4 5 6 7 8 9 10 11 12 13 14
C DC / DC +3V3_+1V2 C
A A
D D
+12VF
RES 5104
+12V
3100 F107 10u
B B
2100
100n
3108
2104
2107
RES 2122
2123
RES
10R
22K
10u
22u
10u
22u
7101-1
E BC847BPN
4
3101 I103
I112
2
7 8
FDS6930B
E
7100-2 5 12V/3V3 CONVERSION
1
22K RES
I101 6104 2108 VSW 5100
2101
3
1u0
I100
3110 22R
BAS316 3n3 10u
F101 5101
3103
3109
22R
10K
RES 3132
RES 3133
3134
2110
2111
2112
2140
RES 2141
F 2 4
F
22R
22R
6K8
7100-1
3n3
22u
22u
22u
22u
220u 25V
FDS6930B
RES 2124
BC847BPN
3
C 1 7103
14 I121
7 8 7102-1
C
3105
3106
3107
NCP5422ADR2G 2 FDS6930B
10K
10K
22K
I143
Φ
3113
3114
VCC
I144
4R7
4R7
1
3115
F100 2109
RES 2113
2114
100n
4 1
1n0
BST H1
3116
22R
GATE I115 3n3
2
L1 3124
22R
7 7102-2 I148
1 I116 I114
G F114
10
2
VFB
GATE
H2
16
I117
4R7
3125
5 6 G
F115
RES 2115
3135
15 4
1K0
1n0
L2
8 I118 I119
3
1 4R7
I106 5 FDS6930B
I107 COMP +1 I120 3126 F102 3136
9 6
2 -1
D D
2102
100n
IS 1K0 6K8
I108 13 12
ROSC +2 I111
2105
100n
3127
11
2K2
-2
GND 12V/1V2 CONVERSION
2103
100n
3164
H 7104
H
39K
2116 RES
2118 RES
1
RES
RES
330u 6.3V
33K I122 1K0 6K8 F104 5102
2125
2
2117
2119
3118
*
33K
10u
2106
100n
3131
3138
10R
2K2
GND-SIG GND-SIG GND-SIG
10u
10u
10u
10u
5103
3130
I E GND-SIG GND-SIG
I146
2K7
10u
5105 F111
+3V3F
E I
RES 3139
RES 3140
3141
2120
22R
22R
6K8
3n3
3119 BAS316 I129 3142 RES 22u
RES I124
100R
2121
3145
1u0
220u 25V
3146 F109
2127
6
330R 6100 68R I136
3120
1K0
1% 120R
RES 2128
2129
100n
3144
2 5 F105 1
All rights reserved. Reproduction in whole or in parts
1n0
3122 1K0 +12VF I147
3147
1K0
I125 100n
J 6 3
J
PDZ9.1-B
BAS316
10K 3156
6101
6103
I127 I133
I134
100K
3158
3
1u0
3157
F F
RES 2130
3153
3V3-ST
1K0
1n0
I130 10K I138 3149
7107-2 5
470R
3 BC847BS
F113 3K3
4
3150
1
2K2
7106
BC817-25W
3154
3155
K 2
K
15K
1% 1K0
PDZ18-B
6102
BOOSTER
12V UNDER-VOLTAGE DETECTION 3151
1%
owner.
+1V2-PNX85XX
GND-SIG GND-SIG 1K0 3152
SENSE+1V2-PNX85XX
120R 1%
G ENABLE-3V3
G
L PROT-DC
L
2133
100p
2134
M 100p
I141 M
H H
1% 470R
3159
3160
2135
100n
4K7
CLASS_NO 1 2009-01-16
3PC332
PCB SB SSB BD 1 2008-12-16
-- -- -- 1
P 3139 123 6443
2008-10-17 2 TV543_2K9
Oval screw hole of 2009-01-16 3 P
Round screw hole of 4.02mm Round screw hole of 4.5mm 5mm x 4.02mm NAME Kailash SUPERS. **** *** ***** 25 10 130 01 A2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18440_500_090223.eps
090224
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 92
A A
1M95 D1 2203 C2 2208 E2 2213 B9 2218 B12 2223 F9 2228 F13 2233 B6 3201 B1 3211 C12 3221 G12 3226 C5 3231 D6 4202 C2 6217 B12 7203 B14 7223-2 C6 F203 B1 F208 D1 F213 D1 F218 B6 F223 B1 F228 B1 I203 B9 I210 F9 I216 D5
B 1M99 B1 2204 D2 2209 B5 2214 B9 2219 C10 2224 F12 2229 F13 2235 C3 3204 D2 3212 B14 3222 G12 3227 C6 3232 D4 5203 B9 6225 D4 7204 D10 7224-1 E6 F204 B1 F209 D1 F214 E1 F219 B12 F224 B1 F229 B12 I204 B10 I212 C5 I217 D6 B
2200 C1 2205 D3 2210 B6 2215 B12 2220 D2 2225 F12 2230 E2 2236 C2 3207 B10 3213 B13 3223 F13 3228 D6 3233 E4 5204 B11 7201 A6 7222-1 E10 7224-2 C7 F205 B1 F210 D1 F215 E1 F220 B14 F225 C1 F230 B15 I205 B11 I213 D5 I218 C6
2201 C1 2206 E1 2211 D4 2216 C13 2221 F9 2226 F13 2231 C1 2237 C2 3208 C11 3214 C13 3224 F12 3229 D6 3234 E5 5221 F9 7202-1 B10 7222-2 F10 F201 B1 F206 B1 F211 D1 F216 E1 F221 D14 F226 C1 F231 F12 I206 B14 I214 D4 I219 C6
2202 C2 2207 E2 2212 B9 2217 B12 2222 F9 2227 F13 2232 C2 3200 B1 3210 C12 3215 C14 3225 C5 3230 D6 4201 B2 5222 F11 7202-2 C10 7223-1 D5 F202 B1 F207 D1 F212 D1 F217 E1 F222 F12 F227 D6 I202 B6 I207 D11 I215 E5
C 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 C
DC / DC +3V3-STANDBY_+1V2-STANDBY
D A A D
DC / DC
7201
+3V3-STANDBY LD3985M122
E 1 5
7202-1
ST1S10PH
+5V5-TUN
E
1
6
IN OUT +1V2-STANDBY RES 6217
SW
1M99 SS36
I202
F218 5203 I203 3207 I204 I205 5204 F219
F228 +12VD 3 4 +12V 2 7 +5V
1 INH BP INH VIN SW
F201 33R
2 100K 10u
2215 10u
FROM PSU
220u 25V
5 3
B 3
F202 COM
SYNC VFB B
2217
2218
2209
2210
100n
2233
10u
GND
1u0
1u0
4
2212
2213
2214
10u
10u
10u
F203 3200 68R LAMP-ON-OUT A P HS
2
5 RES F220 3212 F230
BACKLIGHT-OUT PROT-DC
4
8
9
F204 3201 68R
6
7
F205 BACKLIGHT-BOOST 3213 I206 10K
F229
F 8
9
F206
F223 POWER-OK
RES 3K9
7203
BC847BW F
18K 1%
F224 4201 SCL-SET 7202-2
10 2216
3210
3211
RES
ST1S10PH
3215
F225 4202 SDA-SET
1K0
1K0
11
F226
12 +12V 4n7
10 VIA 11
1-1735446-2
3214
100p
100p
100p
100p
100p
100p
100p
100p
10n
100K 1%
3225
C C
10K
3208
2200
2201
2231
2232
2203
2203
2203
2202
G +3V3 G
2235
2219
100n
5 I218 3227 I219 4 7224-2
BC847BPN(COL)
3226
10K
3 220K 5
3V3-ST
PDZ8.2-B 3
6225
3228
3229
6K8
10K
RES
+3V3-STANDBY
I213
6
RES 2220
H H
1n0
1n0
3230
3231
1
10K
3K3
F207
1
3232
2211
1K0
1u0
F208
2
F209
3 I216
2204
2205
RES
RES
F210
FROM PSU
4
F211
5
F212 +12V I217
6
I 7
8
F213
F214 +1V2-STANDBY
3233 3234 6 I
F215 +AUDIO-POWER
9 10K 22K I215
10
F216
GNDSND
2
F217
11
1-1735446-1
1 7224-1
BC847BPN(COL) DC / DC
E E
is prohibited without the written consent of the copyright
1n0
RES
2206
100n
2207
100n
2208
100n
RES
All rights reserved. Reproduction in whole or in parts
RES
J J
2230
RES
7222-1
ST1S10PH
1
6
GNDSND
SW
5221 I210 5222 F222
+12V 2 7 +1V2-PNX5100
INH VIN SW
22u
22u
22u
33R
22u
2u0
1%
220u 25V
5 3
SYNC VFB
2225
RES 3224
2227
4n7
GND
2221
2222
2223
10u
10u
10u
A P HS
100K
2224
2226
RES 2228
RES 2229
K K
4
8
9
F F
7222-2
owner.
ST1S10PH
F231 3223
SENSE+1V2-PNX5100
10 VIA 11 470R 1%
1K0 1%
3221
3222
4K7
L L
G G
M M
H H
N MULTI 12NC : 3139_123_64421 / 64541 / 64561 N
BD 12NC : 3139_123_64431 / 64551 / 64571
CELL 12C : 8239_125_14871
O 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 O
CHN DC343514 SETNAME ********
CLASS_NO 1 2009-01-16
3PC332
PCB SB SSB BD 1 2008-12-16
-- -- -- 1
P 3139 123 6443
2008-10-17 2 TV543_2K9
2009-01-16 3 P
" X200 ~ X299 " NAME Kailash
SV CHECK
SUPERS.
DATE
**** *** *****
2008-10-17
25
C
10 130 02
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
18440_501_090223.eps
090224
2009-Apr-03
Circuit Diagrams and PWB Layouts Q548.1E LA 10. EN 93
A FRONT END A
2302 E2
2304 D3
4304 F3
4306 E5
2305 D3 4307 F4
A A 2306 G4 4308 F5
2307 G4 4312 E5
2308 G7 4313 F5
2309 G8 4314 I15
2310 G8 4315 J15
2311 C12 4316 E2
2312 C12 4317 F7
2313 C12 4318 F7
B 3386 +5V
B 2314 C13 4319 F10
2315 C13 4320 H4
B 4R7 +1V2-PNX85XX
RES 5308 30R I324 +1V2 B 2316 C13 4321 H5
2317 C13 4322 I5
+3V3 7308 2318 C14 4323 G3
+5V-TUNER
5309
RES
LD1117DT12
4u7
7307
2319 C14 4324 G7
RES 5313
LK112SM50
5304 F308
3 2 2320 C14 4325 G7
30R
F306 7309 IN OUT +1V2A
5 4 LK112M33TR 2321 C13 4326 F1
+5V5-TUN IN OUT +5V-TUNER 10u
120R
3301
3318
2311
2312
2313
2314
100n
2315
100n
2316
100n
2317
100n
2318
100n
2319
100n
2320
C COM
C
RES
6K8
10u
10u
10u
2u2
+3V3B 2322 C13 4327 F1
2344
100n
1 3 5 4
SHDN BP +5V IN OUT 2323 C13 5301 D3
1
2324 C13 5302 G3
2336
2337
100n
2369
COM 1 3
1u0
2u2
SHDN BP
5305 F309
2325 D13 5303 G8
2301
2371
2372
100n
2373
COM 2326 D13 5304 B14
22n
1u0
2u2
+3V3E
2
C 30R
C 2327 D13 5305 C12
2321
100n
2322
2u2
2
2328 D13 5306 C12
2329 D14 5307 D14
2330 D14 5308 B11
D +5V-TUNER
5306 F310
+3V3D D 2331 E11 5309 B3
30R 2332 E11 5310 D4
2323
100n
2324
2u2
2334 F11 5311 H4
TUNER BOUNDARY SCAN 2335 H7 5313 B10
5301
30R
RF-AGC +3V3B 3354 F301
3350 10K
TDO 5307 F311
2336 C2 6301 H9
RES
5310 22R F302 +3V3A 2337 C2 6302 H10
3351 10K 2341 E7 7302 G5
TCK 10u
2325
100n
2326
100n
2327
2328
2329
2330
100n
2u2
2u2
2u2
47u 16V
E 30R F303
E 2342 E7 7303 E12
2304
100n
2305
3352 10K
D F304
TMS D 2344 C11 7307 B2
3353 10K 2345 H15 7308 B11
ANTENNA-SUPPLY TDI
2346 H14 7309 B9
* F305
+3V3B
1XXX
+3V3D
+3V3A
+3V3E
+1V2A
2347 G10 7312-1 G15
+1V2
I313 3316 47R +3V3B
HD1816 MK1 SCL-TUNER
I314 3317 47R
2348 G10 7312-2 G16
* I…C ADRESS C0 SDA-TUNER
2349 E5 7314-1 I15
+3V3B 2350 E5 7314-2 J16
4316
RES
RF-IN
2341
2342
10K
10K
10K
10K
10K
2351 F5 7315 H9
18p
18p
F * 2302 F 2352 F5 7316-1 I11
*TDTC-G321D
1XXX 7303
MT
MT
4n7 2353 F14 7316-2 J11
37
42
52
36
46
18
26
53
16
27
56
10K
F317 DRX3926K-XK-A3
4K7
4K7
2
DC_PWR ANT_PWR 2354 G16 7345-1 I15
LG1
VDDAH_AFE1
VDDAH_CVBS
VDDAH_OSC
VDDAL_AFE1
VDDAL_AFE2
F318
* 2358 4n7
* 2362 100n F327
3393
RES 3394
RES 3395
RES 3396
RES 3397
NC1 B1 2331 VDDH VDDL
2355 H10 7345-2 H15
RES
F319
E RF_AGC
F320 RES 2363 4u7
RF_AGC Pend new 12nc
49 E
27M
NC2 SCL 12p XI 2356 H9 A310 E2
TUNER
TUNER
1304
F321 3308-4
* 2359 4n7 5 MSTRT 4 5 47R FE-SOP 2357 H8 A311 F2
3302
AS SDA MSTRT
3388
3365
F322 50 6 MERR F339 3308-3 3 6 47R
SCL B2 2332 XO MERR 2358 E2 A312 F1
F323 2349 100n F332 Φ 9 MCLK 3308-2 2 7 47R
SDA
F324 * VTU_TP MCLK
3308-1
FE-CLK
2359 E2 A322 E5
G
XTAL_OUT
F325 *2360 10n
* 2350 100n
4306
F333
F334
NC
IF-P
IF-N
12p 40
39
DEMODULATOR MVAL
10
11
MVAL
MD0 3309-4
1
4
8
5
47R
47R FE-DATA(0)
FE-VALID
G 2360 E2 A323 F5
+5V
A310 * IF_AGC 0
3309-3
IF_OUT1
A311 *4302 A328
*4312 A322
DIF2 I322 1
12 MD1
3309-2
3 6 47R FE-DATA(1) 2361 F5 A324 G7
IF_OUT2
*4303 4304
A329
*4313 A323
F335
DIF1
PDP
RES 2334 100n I323
47
48
P
PD
2
13
14
MD2
MD3 3309-1
2
1
7
8
47R
47R
FE-DATA(2)
FE-DATA(3)
2362 E5 A325 F6
MT
AIF N
MD
3
19 MD4 3310-4 4 5 47R FE-DATA(4)
2363 E2 A326 G7
100n
100n
RES PDN
100n
MT
4 2364 H4 A327 G6
RESET-SYSTEM 4319 32 20 MD5 3310-3 3 6 47R FE-DATA(5)
A312 RSTN 5 3310-2 2365 H6 A328 E4
4307
4308
2352
SAW_SW 7
RES 4XXX
RES 4XXX
470R
4317
4318
3356
43 2372 C9 F306 B3
CVBS
18p
18p
not in Arch2K8
2300
100n
1XXX
*HD1816 59
TCK I303 4
2373 C9 F308 B15
1
MK2 60 64 BC847BPN
7302
* *
RF-IN
2347
2348
RES
RES
3302 E10 F310 C15
VCC
58 1 6
RES 3303 A324 2309 TMS WS
1303 2 INPUT1 OUTPUT1 7 IF-N 3 3303 G7 F311 D15
MT
5302 3357
I318
I DC_PWR
1
I O1
5 2306 10n
220R 100p ANTENNA-CTRL 4
GPIO1 VSYNC
29 2 7312-1
I 3304 G7 F312 F10
2308
2370
5303
680n
820n 2 4 2307 10n 30 BC847BPN
22p
2p2
NC1 IGND O2
3 INPUT2 OUTPUT2 6 I319
GPIO2 10K
1
3305 H7 F313 F10
G RF_AGC
NC2
3
GND
3304 2310
IF-P 66 84
3358 3359
G 3306 H3 F314 J16
TUNER
GND2
2354
A327 72 90
3p3
BZX384-C6V8
IF_OUT1
3309-1 F15 F320 E2
J 3305 J
+5V-TUNER 73 91
6K8
IF_OUT2
6302
2355
100n
F316
74
VIA VIA
92 3309-2 F15 F321 E2
MT
IF-AGC 75 93
+5V-TUNER
3309-3 E15 F322 E2
RES 76 94
3306 3309-4 E15 F323 E2
2356
100n
4320 I321 PDP 77 95 2346
78 96 I307 3348 3310-1 F15 F324 E2
0R05 2364 33AA 2365
510R
79 97
H 22u 18K
H
2
4
2345
80 98 3310-3 F15 F327 E5
22u
VSSAH_CVBS
560R
VSSAH_AFE1
10n 10n
VSSAL_AFE1
VSSAL_AFE2
VSSAH_OSC
RES 3XXX
RES 3XXX
470R
220K
RES 4321
RES 2366
100n
2335
3346
+5V-TUNER 81 99
22K
22n
470R
5311
820n
GND_HS
BCP56 3311 G15 F333 E5
K 4K7 I326 3389
83 101
I308
4
K 3312 H7 F334 E5
100K
3387
3
VSSH VSSL 3313 H7 F335 F5
2357
6 5
22n
2367 33AC 2368 6301 2R2 3377 I327
150R
150R
38
41
51
35
45
7
17
25
54
3
15
28
55
65
PDN
3367 3345
3316 D7 F336 G10
2 7345-1 3
owner.
BC847BPN(COL)
2R2 +12V 10K 3318 C12 F338 J8
220R
220R
3368
3369
1
3349 3347 3391 3345 I14 F339 E14
I328 7316-1
RES 3360
RES 3361
8
3346 H15 I301 F14
* 1300 LGI
Y
RFS
N
3 LM393PT
1
3370 F337
SIF-GND
150R 150R
I306
18R
3347 I15 I303 F15
1301 N Y
I L 2302 N Y
I331
2
10K
4314
F315 3392 CVBS L I 3348 H15 I306 I15
4
3349 I14 I307 H14
10K
3371
3372
2349 Y N
27K
27K
RES BC857BS 68R 3350 D10 I308 H15
2350 Y N 3362 7314-1
1
3351 D10 I313 D7
3376
2351 Y N RES
2352 Y N 100R
2 3352 D10 I314 D7
2358 N Y 3353 D10 I318 G6
2359 N Y +12V 6
3354 D11 I319 G6
2360 N Y F338 7316-2
3355 F15 I321 H8
8
2361 Y N ANTENNA-CTRL 3373 10K 5 LM393PT 4315 F314 CVBS-TER-OUT
3356 F15 I322 F11
M 2362
4302
Y
N
N
Y +3V3
3374 2K7
I329
6
7
RES
3363
4 M 3357 G14 I323 F11
4303 N Y BC857BS 3358 G15 I324 B11
4
4304 Y N
3375