Unit – 4

Input / Output Organization

Input / Output: (Introduction)
The computer system’s I/O architecture is its interface to the outside world. There are three
important elements of computer systems:

1. Processor
2. Memory Module
3. I/O Module

Each module interfaces to the system bus and controls one or more peripheral devices. An I/O
module is not simply a set of mechanical connectors that wire a device into the system bus.
Rather, the I/O module contains logic for performing a communication function between the
peripheral and the bus.

Reasons for need of I/O Module:

 There are a wide variety of peripherals with various methods of operation. It would be
impractical to incorporate the necessary logic within the processor to control a range of
devices.
 The data transfer rate of peripherals is often much slower than that of the memory or
processor. Thus, it is impractical to use the high-speed system bus to communicate
directly with a peripheral.
 Peripherals often use different date formats and word lengths than the computer to
which they are attached.

Thus, an I/O module is required. This module has two major functions:

 Interface to the processor and memory via the system bus or central switch.
 Interface to one or more peripheral devices by tailored data links.
Input / Output Device (or External I/O Device):
An Extenal Device attach to a computer by a link to an I/O module. The link is used to exchange
control, status and data between the I/O module and the external devices. An external device
connected to an I/O module is often reffered to a peripheral devices or simply a periperal.

We can broadly classify external devices into three categories:

1. Human Readable – Suitable for communicating with the computer user.

2. Machine Readable – Suitable for communicating with machine or equipments.
3. Communication – Suitable for communicating with remote device.

Diagram :

Status Signals to I/OControl

ModuleSignal from I/O Module
Data bits to and from I/O module

Control Buffer
Logic
Transducer

Data to and from Environment

fig: Block Diagram of an External Device

 Control Signal determines the functions that device will perform such a sent data to I/O module
(I/O or read) except data from the I/O module, report status or perform some controls function
particular to the device. Status signal indicate the state of the device.

for example: ready/not ready to show whether the device is ready for data transfer.

The transducer convert data from electrical to other form of energy during output & from other
form to electrical during input.

I/O Module:
In addition to the processor and a set of memory modules the third key element of a computer
system is a set of I/O module. Each module interface to the system bus or central switch and
controls one or more periperals devices and I/O module is not simply a set of mechanical
connectors that wire a set of mechanical connectors that wire a device into the system bus.
Rather the I/O module connects logic for performing a communication function between the
peripheral and the bus.

The mazor functions or requirements for an I/O module fall into the following categories:

1. Control and Timing

2. Processor Communication
3. Device Communication
4. Data Buffering
5. Error Detection

Data Register External Data

Data lines device
Status
interface logic
Status/Control Register Control

Address Lines
External Data
I/O
Logic device
Status
interface logic
Control Lines
Control

Block Diagram of an I/O Module

Diagram provides a general block diagram on an I/O module. The module connects to the rest
of the computer through a set of signal lines. Data transfered to and from the module are
offered in one or more data register.

A status register may also function as a control register to accept detailed control information
from the processor. The logic within the module instead with the processor via a set of control
lines. The processor uses the control line to issue commands to the I/O module.

Data Transfer:
There are two types of data transfer techniques:

1. Synchronus Data Transfer Technique

2. Asynchronus Data Transfer Technique

Synchronus Data Transfer Technique:

The internal operation in the digital system are synchronized by means of clock pulses supplied
by a common pulses generator. Clock pulses are applied to all register within a unit and all data
transfer among internal register occur simultaneously during the occurence of a clock pulses.
Two units such as CPU and I/O interface are designed independently of each other. If the
registers in the interface share a common clock with the CPU register, the transfer between the
two units is said to be synchronized.

Asynchronus Data Transfer Technique:

In most cases the internal timing in each unit is independent from the other in that each uses
its own private clock for internal register, in that case the two units are said to be asynchronus
to each other. This approach is widely used in most computer system.

Asynchronus data transfer to independent unit required that control signal be transmitted
between the communicating units to indicate the time at which data is being transmitted.
There are two control signals:

1. Strobe Control Signal

2. Hand shaking Control Signal

Strobe Control Signal:

The strobe control method of a synchronus data transfer employees a signal control lines to
time each transfer. The strobe may be activated by either the source or the destination unit. A
figure shows a source initiated transfer. The databus carries the binary information from source
unit to the destination unit.

Data Line

Source Unit Destination Unit

Strobe

Hand Shaking Control Signal:

The disadvantage of the strobe method is that the source unit that initiates the transfer has no
way of knowing whether the destination unit has actually received the data item that was
placed in the bus. Similarly, a destination unit that initiates transfer has no way of knowing
whether the source unit has actually placed the data on the bus. The hand shaking method
solves this problem by introducing a second control signal.

Data Line

Data Valid

Source Unit Destination Unit

Data Accepted

Source initiated transfer using hand - shaking

Two hand shaking lines are data valid which is generated by the source unit and data accepted
generated by the destination unit. The source unit indicates the transfer by placing the data on
the bus and enabling its data valid signal. The data accepted signal is activated by the
destination unit after it accepts the data from the bus. The source unit then disables its data
valid signal which invalid the data on the bus. The destination unit then disables its data
accepted signal and the system goes into its initial state.
Types of Asynchronus Data Transfer:
There are two types of data transfer:

1. Parallel Data Transfer – In parallel data transmission each bit of the message has its own
path and the total messages transmitted at the same time. It is faster but require many
wires, it is used for short distance and where speed is important.
2. Serial Data Transfer – In serial data transmission each bit in the message is send in
sequence ine at a time. This method require the use of one constructor. It is slower but
the less expensive since it requires only one conductor.

There are two types of serial data transfer:

a) Synchronus Serial Transfer

b) Asynchronus Serial Transfer

Modes of Transfer:
Data transfer between the central computer and I/O devices may be handled in a variety of
modes. Some modes used the CPU as an intermediate path, other transfer the data directly to
and from the memory unit. Data transfer to and from peripherals may be handled in one of 3
possible modes.

1. Programmed I/O
2. Interrupt initiated I/O
3. Direct Memory Access(DMA)

Programmed Input/Output – In the programmed I/O method the I/O device doesn’t have direct
access to memory. A transfer from an I/O device to memory requires the execution of several
instructions by the CPU including an input instruction to transfer the data from the device to
the CPU and store instruction to transfer the data from the CPU to memory. Other instruction
may be needed to verify that the data are available from the device and to count the number of
word transfer.

Programmed I/O operations are the result of I/O instructions written in the computer program.
Each data item transfer is initiated by an instruction in the program. Usually the transfer is to
and from the CPU registers and peripherals. Other instructions are needed to transfer the data
to and from CPU and memory. Trasnfering data under program control require constant
monitoring of the peripheral by the CPU. It is up to the program instruction executed in the CPU
to keep closed tabs on everything that is taking place in the interface unit and the I/O device. In
the programmed I/O method the CPU stays in a program loop until the I/O unit indicates that is
ready for data transfer.

Data Bus I/O Bus

Interface

Address Bus Data valid

Data Register
I/O
CPU I/O Read
Status Register
Data accepted
Device
I/O Write

Block Diagram of Programmed I/O