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Master Thesis
Introduction
• Goal: Design and write a Simulator for NoC.
• What's NoC? Network on chip.
Characterization
Selecting the appropriate parameters
Environment
3
Steps
4
Specification
Develop a basic characterization system for NoC.
Modular system that allows enlarging the range of characterized NoC.
Charateristic Description
Topology Implement 2D-Mesh. Supports Torus, Folded-Torus.
Routing Implement X-Y. Support algorithm: deterministic, oblivious y adaptative.
Switching Wormhole.
Flow Control Credits.
Memory allocation Ports and Virtual channels.
QoS With QoS. GT (Guaranteed Traffic).
Without QoS. BE (Best-Effort).
Allocation Independent allocators. Weighted round-robin arbiters.
Implementation Outputs
long int num_flits;
Input parameters long int num_flits_gt;
int sim_id;
long int num_flits_be;
int BE_VCs;
double average_latency;
int GT_VCs; double average_latency_gt;
int dim;
Simulation double average_latency_be;
int MAX_VC_flit; long int num_pack;
float packet_insertion_rate; long int num_pack_gt;
float qos_insertion_rate; long int num_pack_be;
bool numeric_data; double pack_average_latency;
cycle final_cycle; double pack_average_latency_gt;
int flits_per_packet; double pack_average_latency_be;
int fsel; long int global_accepted_packets;
int farb; long int global_total_packets;
run_sim.h C++
7
Modularity
8
Batch Allocation
9
Verification
10
Example
QoS IR Dim VC size Packet size BE/GT Weight BE/GT VCs Cycles/WarmUp
Latency
300 average_latency average_latency_gt
250 average_latency_be
200
Latency
150
100
Saturation: More GT
50
0
0 0,1 0,2 0,3 0,4
Accepted Traffic
11
Example
Ratio Throughput
BE GT 0,45
1 0,4
A
0,35
c 0,8
Accepted Traffic
0,3
c 0,6
R
e 0,25
a 0,4
p 0,2
t
t 0,2
0,15
i
a 0
o 0,1
n
0,01
0,2
0,22
0,24
0,05
0,26
c
0,28
0,3
0,33
0,38
0,45
0,55
0,7
0,9
e 0
0 0,2 0,4 0,6 0,8 1
Conclusion
Not a final system. Base System. Usability lacks. But…
Numbers
Total Physical Source Lines of Code (SLOC) 8,835
Development Effort Estimate, Person-Years (Person-Months) 4.10 (49.18)
Embedded COCOMO model