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1. General description
The 74HC573; 74HCT573 is a high-speed Si-gate CMOS device and is pin compatible
with Low-power Schottky TTL (LSTTL).
The 74HC573; 74HCT573 has octal D-type transparent latches featuring separate D-type
inputs for each latch and 3-state true outputs for bus oriented applications. A latch enable
(LE) input and an output enable (OE) input are common to all latches.
When LE is HIGH, data at the Dn inputs enter the latches. In this condition the latches are
transparent, i.e. a latch output will change state each time its corresponding D input
changes.
When LE is LOW the latches store the information that was present at the D-inputs a
set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents
of the 8 latches are available at the outputs. When OE is HIGH, the outputs go to the
high-impedance OFF-state. Operation of the OE input does not affect the state of the
latches.
2. Features
■ Inputs and outputs on opposite sides of package allowing easy interface with
microprocessors
■ Useful as input or output port for microprocessors and microcomputers
■ 3-state non-inverting outputs for bus oriented applications
■ Common 3-state output enable input
■ Functionally identical to 74HC563; 74HCT563 and 74HC373; 74HCT373
■ Complies with JEDEC standard no. 7A
■ ESD protection:
◆ HBM EIA/JESD22-A114-C exceeds 2000 V
◆ MM EIA/JESD22-A115-A exceeds 200 V
■ Specified from −40 °C to +85 °C and from −40 °C to +125 °C
Philips Semiconductors 74HC573; 74HCT573
Octal D-type transparent latch; 3-state
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
4. Ordering information
Table 2: Ordering information
Type number Package
Temperature range Name Description Version
74HC573
74HC573N −40 °C to +125 °C DIP20 plastic dual in-line package; 20 leads (300 mil) SOT146-1
74HC573D −40 °C to +125 °C SO20 plastic small outline package; 20 leads; SOT163-1
body width 7.5 mm
74HC573DB −40 °C to +125 °C SSOP20 plastic small outline package; 20 leads; SOT339-1
body width 5.3 mm
74HC573PW −40 °C to +125 °C TSSOP20 plastic small outline package; 20 leads; SOT360-1
body width 4.4 mm
74HC573BQ −40 °C to +125 °C DHVQFN20 plastic dual in-line compatible thermal enhanced SOT764-1
very thin quad flat package; no leads;
20 terminals; body 2.5 × 4.5 × 0.85 mm
5. Functional diagram
2 D0 Q0 19
3 D1 Q1 18
4 D2 Q2 17
5 D3 Q3 16
LATCH 3-STATE
6 D4 1 to 8 OUTPUTS Q4 15
7 D5 Q5 14
8 D6 Q6 13
9 D7 Q7 12
11 LE
1 OE
mna809
11
C1
1 EN1
1
2 19
OE 1D
2 19
D0 Q0 3 18
3 18
D1 Q1
4 17
4 17
D2 Q2
5 16 5 16
D3 Q3
6 15 6 15
D4 Q4
7 14 7 14
D5 Q5
8 13
D6 Q6 8 13
9 12
D7 Q7
LE 9 12
11 mna807 mna808
D0 D1 D2 D3 D4 D5 D6 D7
D Q D Q D Q D Q D Q D Q D Q D Q
LE
OE
Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7
001aae075
6. Pinning information
6.1 Pinning
74HC573
74HCT573
20 VCC
terminal 1
OE
index area
1
74HC573
74HCT573 D0 2 19 Q0
D1 3 18 Q1
OE 1 20 VCC
D2 4 17 Q2
D0 2 19 Q0
3 18 Q1 D3 5 16 Q3
D1
D2 4 17 Q2 D4 6 15 Q4
D3 5 16 Q3 D5 7 14 Q5
D4 6 15 Q4 GND(1)
D6 8 13 Q6
D5 7 14 Q5
D7 9 12 Q7
D6 8 13 Q6
GND 10
LE 11
D7 9 12 Q7
GND 10 11 LE 001aae077
7. Functional description
Table 4: Function table [1]
Operating mode Control Input Internal Output
OE LE Dn latches Qn
Enable and read register L H L L L
(transparent mode) H H H
Latch and read register L L l L L
h H H
Latch register and disable outputs H L l L Z
h H Z
8. Limiting values
Table 5: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to
GND (ground = 0 V).
Symbol Parameter Conditions Min Max Unit
VCC supply voltage −0.5 +7 V
IIK input clamping current VI < −0.5 V or VI > VCC + 0.5 V - ±20 mA
IOK output clamping current VO < −0.5 V or VO > VCC + 0.5 V - ±20 mA
IO output current VO = −0.5 V to (VCC + 0.5 V) - ±35 mA
ICC quiescent supply current - 70 mA
IGND ground current - −70 mA
Tstg storage temperature −65 +150 °C
[1] For DIP20 package: Ptot derates linearly with 12 mW/K above 70 °C.
[2] For SO20 package: Ptot derates linearly with 8 mW/K above 70 °C.
[3] For SSOP20 and TSSOP20 packages: Ptot derates linearly with 5.5 mW/K above 60 °C
[4] For DHVQFN20 package: Ptot derates linearly with 4.5 mW/K above 60 °C.
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
[1] CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi × N + ∑(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
∑(CL × VCC2 × fo) = sum of outputs.
12. Waveforms
Dn input VM
t PLH t PHL
90 %
Qn output VM
10 %
t TLH t THL
001aae082
LE input VM
tW
t PHL t PLH
90 %
Qn output VM
10 %
t THL t TLH
001aae083
VI
OE input VM
GND
tPLZ tPZL
VCC
output
LOW-to-OFF VM
OFF-to-LOW
10%
VOL
tPHZ tPZH
VOH
90%
output
HIGH-to-OFF VM
OFF-to-HIGH
GND
outputs outputs outputs
enabled disabled enabled
001aae307
LE input VM
t su t su
th th
Dn input VM
001aae084
tW
VI
90 %
negative
pulse VM VM
10 %
0V
tf tr
tr tf
VI
90 %
positive
pulse VM VM
10 %
0V
tW
VCC VCC
VI VO RL S1
PULSE
DUT open
GENERATOR
RT CL
001aad983
D ME
seating plane
A2 A
L A1
c
Z e w M
b1
(e 1)
b
20 11 MH
pin 1 index
E
1 10
0 5 10 mm
scale
UNIT
A A1 A2
b b1 c D
(1)
E
(1)
e e1 L ME MH w Z (1)
max. min. max. max.
1.73 0.53 0.36 26.92 6.40 3.60 8.25 10.0
mm 4.2 0.51 3.2 2.54 7.62 0.254 2
1.30 0.38 0.23 26.54 6.22 3.05 7.80 8.3
0.068 0.021 0.014 1.060 0.25 0.14 0.32 0.39
inches 0.17 0.02 0.13 0.1 0.3 0.01 0.078
0.051 0.015 0.009 1.045 0.24 0.12 0.31 0.33
Note
1. Plastic or metal protrusions of 0.25 mm (0.01 inch) maximum per side are not included.
99-12-27
SOT146-1 MS-001 SC-603
03-02-13
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
D E A
X
c
y HE v M A
20 11
Q
A2 A
A1 (A 3)
pin 1 index
θ
Lp
L
1 10 detail X
e w M
bp
0 5 10 mm
scale
Note
1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included.
99-12-27
SOT163-1 075E04 MS-013
03-02-19
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1
D E A
X
c
y HE v M A
20 11
Q
A2 A
A1 (A 3)
pin 1 index
θ
Lp
L
1 10 detail X
w M
e bp
0 2.5 5 mm
scale
Note
1. Plastic or metal protrusions of 0.2 mm maximum per side are not included.
99-12-27
SOT339-1 MO-150
03-02-19
TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1
D E A
X
y HE v M A
20 11
Q
A2 (A 3) A
A1
pin 1 index
θ
Lp
L
1 10
detail X
w M
e bp
0 2.5 5 mm
scale
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
99-12-27
SOT360-1 MO-153
03-02-19
DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads;
20 terminals; body 2.5 x 4.5 x 0.85 mm SOT764-1
D B A
A
A1
E c
terminal 1 detail X
index area
terminal 1 C
e1
index area
e b v M C A B y1 C y
w M C
2 9
1 10
Eh e
20 11
19 12
Dh
X
0 2.5 5 mm
scale
DIMENSIONS (mm are the original dimensions)
A(1)
UNIT
max.
A1 b c D (1) Dh E (1) Eh e e1 L v w y y1
02-10-17
SOT764-1 --- MO-241 ---
03-01-27
14. Abbreviations
Table 13: Abbreviations
Acronym Description
CMOS Complementary Metal Oxide Semiconductor
ESD ElectroStatic Discharge
HBM Human Body Model
TTL Transistor-Transistor Logic
MM Machine Model
Level Data sheet status [1] Product status [2] [3] Definition
I Objective data Development This data sheet contains data from the objective specification for product development. Philips
Semiconductors reserves the right to change the specification in any manner without notice.
II Preliminary data Qualification This data sheet contains data from the preliminary specification. Supplementary data will be published
at a later date. Philips Semiconductors reserves the right to change the specification without notice, in
order to improve the design and supply the best possible product.
III Product data Production This data sheet contains data from the product specification. Philips Semiconductors reserves the
right to make changes at any time in order to improve the design, manufacturing and supply. Relevant
changes will be communicated via a Customer Product/Process Change Notification (CPCN).
[1] Please consult the most recently issued data sheet before initiating or completing a design.
[2] The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at
URL http://www.semiconductors.philips.com.
[3] For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status.
17. Definitions customers using or selling these products for use in such applications do so
at their own risk and agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.
Short-form specification — The data in a short-form specification is Right to make changes — Philips Semiconductors reserves the right to
extracted from a full data sheet with the same type number and title. For make changes in the products - including circuits, standard cells, and/or
detailed information see the relevant data sheet or data handbook. software - described or contained herein in order to improve design and/or
Limiting values definition — Limiting values given are in accordance with performance. When the product is in full production (status ‘Production’),
the Absolute Maximum Rating System (IEC 60134). Stress above one or relevant changes will be communicated via a Customer Product/Process
more of the limiting values may cause permanent damage to the device. Change Notification (CPCN). Philips Semiconductors assumes no
These are stress ratings only and operation of the device at these or at any responsibility or liability for the use of any of these products, conveys no
other conditions above those given in the Characteristics sections of the license or title under any patent, copyright, or mask work right to these
specification is not implied. Exposure to limiting values for extended periods products, and makes no representations or warranties that these products are
may affect device reliability. free from patent, copyright, or mask work right infringement, unless otherwise
specified.
Application information — Applications that are described herein for any
of these products are for illustrative purposes only. Philips Semiconductors
makes no representation or warranty that such applications will be suitable for
the specified use without further testing or modification.
19. Trademarks
Notice — All referenced brands, product names, service names and
18. Disclaimers trademarks are the property of their respective owners.
Life support — These products are not designed for use in life support
appliances, devices, or systems where malfunction of these products can
reasonably be expected to result in personal injury. Philips Semiconductors
21. Contents
1 General description . . . . . . . . . . . . . . . . . . . . . . 1
2 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 2
4 Ordering information . . . . . . . . . . . . . . . . . . . . . 2
5 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 3
6 Pinning information . . . . . . . . . . . . . . . . . . . . . . 5
6.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
6.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 5
7 Functional description . . . . . . . . . . . . . . . . . . . 6
8 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 6
9 Recommended operating conditions. . . . . . . . 7
10 Static characteristics. . . . . . . . . . . . . . . . . . . . . 8
11 Dynamic characteristics . . . . . . . . . . . . . . . . . 11
12 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 19
14 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 24
15 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 24
16 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . 25
17 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
19 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
20 Contact information . . . . . . . . . . . . . . . . . . . . 25