Lecture Notes

Thyristors (SCRs)

OUTLINE

• SCR construction and I-V characteristics.

• Physical operation of SCRs.
• Switching behavior of SCRs
• dv/dt and di/dt limitations and methods of
improving them.
• SCR drive circuit considerations.

Copyright © by John Wiley & Sons 2002 SCRs -1

 Thyristor (SCR) Geometry
Gate Cathode

19
N+ -3 19
N+
-3 1 0m • Cross-sectional
10 cm 10 cm
J3 view showing
17
P 10 cm- 3 30-
100 m vertical
J 2
orientation of
13 14 50-
N 10 - 5x10 cm- 3 1000 SCR.
m
J1
17 • SCRs with
P 10 cm- 3 30-
50 µ kiloamp ratings
+ 19 -3
P 10 cm
have diameters
Anode of 10 cm or
greater.
Gate and cathode metallization for
slow (phase control) thyristor. Gate and cathode metallization
for fast (inverter grade) SCR
cathode gate wafer
distributed
gate

cathode area
(metallization
wafer
not shown)

Copyright © by John Wiley & Sons 2002 SCRs -2

 Thyristor I-V Characteristics

i • SCR triggerable from forward blocking

A
state to on-state by a gate current pulse.
forward
on-state • Thyristor latches on and gate cannot turn it
i > 0 off. External circuit must force SCR off.
I G
H i = 0
G • Current to several kiloamps for V(on) of 2-
I
-V BO 4 volts.
RW
M
V
VH B O vAK • Blocking voltages to 5-8 kilovolts.
forward blocking
state • VBO = breakover voltage ; I BO =
breakover current
Thyristor circuit symbol.
+ VA - • VH = holding voltage I H = holding current
i K
A cathode

anode • Maximum junction temperature = 125 °C -

iG limited by temperature dependence of
VBO.
gate

Copyright © by John Wiley & Sons 2002 SCRs -3

 SCR Model and Equivalent Circuit
One dimensional SCR model.
A
P1 • BJTs in equivalent circuit in active region.
J
(N - ) 1
• Use Ebers-Moll equations for BJTs
N1
J
P 2
2 • IC1 = -a1IE1 + ICO1 ; IC2 = -a2IE2 + ICO
G J
3
(N + )
N2 • IA = IE1 ; I K = -IE2 = IA + IG
K
• IC1 + IB1 + IE1 = 0
Two transistor equivalent circuit
A a IG!+!ICO1!+!ICO2
• IA =
J
1 1!-!!a1!-!a2
Q
1
J
2
• Blocking state a1 + a2 << 1
Q
2
J G
3

• At breakover a1 + a2 ≈ 1
K

Copyright © by John Wiley & Sons 2002 SCRs -4

 Thyristor Turn-on Process
A
• In forward blocking state, both BJTs active.

• If a1 + a2 < 1, connection is stable. Q1

Q2
• If VAK = VBO or if positive gate current pulse is applied
G
a1 + a2 becomes equal to unity and circuit connection becomes
K
unstable and SCR switches on.

Holes attracted
by negative
charge of injected
• Negative charge of electrons swept into n1
p electrons layer partially compensate positive charge
1 +
J1
n1 J 2 depletion of ionized donors exposed by growth of
+ + - width - no gate depletion of junction J2.
+ - + + current
J
2 - - -
- - J 2 depletion • Growth of depletion reduces width of
+ p - bases of Qnpn and Qpnp and thus
2 width - with
J3 gate current
- increases a1 and a2.
n2 Electrons
injected in
response to • Holes attracted by first wave of injected
gate current elctrons attract additional electrons and so
flow on - regenerative action.

Copyright © by John Wiley & Sons 2002 SCRs -5

 Thyristor On-state Latchup
• Negative gate current causes lateral voltage
drops as indicated which lead to current
SCR with negative gate current crowding in center of cathode.

K
Negative gate • Conventional SCRs (phase control) have large
current G area cathodes - negative gate current cannot
remove stored charge from center of large
+
N N+ cathode area.

P
+ - - +
• SCR stays latched on in spite of negative gate
N- current.
P

A
• External circuit must force anode current to
negative values in order that enough stored
charge be removed from SCR so that it can
turn off.

Copyright © by John Wiley & Sons 2002 SCRs -6

 Thyristor On-state Operation
G
A
N2 P N P
K 2 1 1

x
total
carrier
N NA
density D
2 1
1

NA
N
2 D1
x

• On-state: all three junctions forward biased and BJTs

in equivalent circuit saturated.

• On-state stable because saturated BJTs have

a 1 + a 2 << 1.

• On-state voltage V AK(on) = Vj1 - Vj2 + Vj3 + Vn

Copyright © by John Wiley & Sons 2002 SCRs -7
 Thyristor Turn-on Behavior
i (t)
G
T
A t
v d iF
A
TB dt Io
i (t)
vB A

T t t
C d(on)
v tr
C
Io tp s

control v (t)
AK
t

v vB v • td(on) = turn-on delay time; time required for charge

A C
injection by gate current to make a1 + a 2 = 1.
t
• tr = time required for anode current to reach on-state
value. Anode current rate-of-rise di F/dt limited by
external inductance.
• Time intervals that T can be on
A
• tps = time required for plasma to spread over whole
i cathode area from cathode periphery near gate.
G
t
Delay or trigger angle • VAK does not attain on-state value until complete area
of cathode is conducting.
Copyright © by John Wiley & Sons 2002 SCRs -8
 Thyristor Turn-off Behavior

diR
t
dt 3
t2
iA (t)
I I t
R R
t1
4 Turn-off waveforms
dv
F
dt

v (t) V t
AK REV

recovery time t q> t

3

• SCR turn-off quite similar to power diode turn-off.

• Anode current rate-of-fall controlled by external inductance.

• Reverse voltage overshoot caused by external inductance.

• Junction J1 is blocking junction in reverse bias. J3 has low
breakdown voltage (20-40 volts) because of the heavy doping on
both sides of the junction.
Copyright © by John Wiley & Sons 2002 SCRs -9
 Thyristor di/dt Limit at Turn-on
i G
G K

N2 P2 N2
i (t)
G

N
1
P1
t
i
A A
• SCR first turns on at cathode periphery nearest gate. • Use shaped gate current pulse for
rapid turn-on.
• Current constricted to small areas during initial phases of turn-
on, td(on) and tr.

• If anode current rate-of-rise, diF/dt, not kept less than some

specified maximum, current density in constricted area will be
too large.

• Localized power dissipation too high and thermal runaway

likely.

Copyright © by John Wiley & Sons 2002 SCRs -10

 Thyristor Re-applied dv/dt Limits
d vF
dt VF
• Removal of all stored charge in SCR requires a
v (t)
minimum time tq.
AK
t • Application of positive dVF/dt larger than a specified
value before tq results in a pulse of positive anode
V REV current which may produce unintentioned turn-on of
forward the SCR.
recover
y • Avoidance of unintentioned turn-on requires
current dVF/dt < dVF,max/dt and remaining in reverse bias
iA (t) for a minimum time tq.
t

A
dv I
F < BO
dt C j2
max Rate effect
C j2 dv
100 V/ms < F < 2000 V/ms
G dt
max
K
Copyright © by John Wiley & Sons 2002 SCRs -11
 Methods of Improving Thyristor di/dt Rating
distributed
gate
• Interdigitated gate-cathode structure used to greatly
wafer
increase gate-cathode periphery.

• Distance from periphery to center of any cathode region

significantly shortened.

• Ability of negative gate current to break latching

condition in on-state increased.

cathode area • Combination of pilot thyristor, diode, and iterdigitated

(metallization
not shown) gate-cathode geometry tgermed a gate-assisted turn-off
thyristor or GATT
A
• Use of pilot thyristor to increase turn-on gate
current to main thyristor.
pilot
main thyristor • Larger gate current increases amount of initial
thyristor conducting area of cathode and thus improves
G diF/dt capabiities.

• Diode allowes negative gate current to flow from

K main SCR.

Copyright © by John Wiley & Sons 2002 SCRs -12

 Improvement in dv/dt Rating Via Cathode Shorts
dv
C j2 AK
A • Current thru Cj2 indistinguishable from positive gate current with
dt
respect to turn-on of SCR.

• If current thru Cj2 bypasses junction J3, then SCR will not be
turned on by the large displacement currents.
G
C j2 • Cathode shorts provide this desirable bypass. Most effective with
J
3 interdigitaated gate-cathode geometry.

K dVFÔÔ
Cathode • dt ÔÔÔ significantly increased.
shorting max
structure cathode
short K G

N
+
N+ N+ N
+

N-

P+

A
Copyright © by John Wiley & Sons 2002 SCRs -13
 Thyristor Gate Trigger Requirements
V
G trigger maximum gate
K circuit load power
line dissipation Equivalent circuit of
minimum
V
G temperature
G SCR drive circuit
RG

maximum
V +
temperature G
G

I
I I V G
minimum G G G
trigger 1 2 R
GG
current
i (t)
G

Gate current must be on for a specified

minimum time interval (few tens of
microseconds) to guarantee SCR turn-on

Copyright © by John Wiley & Sons 2002 SCRs -14