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transformer
H. Krishnaswami and V. Ramanarayanan
1 Introduction
HF
Line frequency transformers (50 and 60 Hz) are heavy and AC in AC out
bulky items in power conversion and distribution systems.
Transformer size is inversely proportional to the frequency
of operation and saturation flux density. Hence a reduction
link
in volume and weight can be obtained by high-frequency
operation of the magnetic core. Introduction of a high- cycloconverter/cycloconverter
frequency link to realise a small-size electronic transformer
has been widely discussed in the literature [1–4]. Low cost Fig. 1 Electronic transformer using HF AC link
and easy availability of ferrite core material has helped in the
implementation of high-frequency link power transformation.
The electronic transformer utilises power electronic conversion but also for medium-level distribution power
converters along with a high-frequency transformer to transformers [2, 4]. At such high powers the authors have
obtain overall size and cost advantages over a conventional proposed only voltage transformation and isolation. The
transformer. Several topologies of electronic transformer major payoff expected is size reduction. The advantages
have been discussed in [4]. One of the topologies of the extend to more innovative control possibilities as well.
electronic transformer is the high-frequency AC link AC/
AC converter first proposed in [1]. It has two cycloconver- 2 Principle of operation
ters with a high-frequency AC link in between, as shown in
Fig. 1. H-bridge and push–pull circuits have been proposed The principle of operation of the high-frequency AC link
in [2] and [3], respectively. It may be seen that the literature electronic transformer is based on amplitude modulation.
has extended the application of high-frequency link AC Consider a low-frequency sine wave (50 Hz) vin ðtÞ being
transformation not only for low-level electronic power modulated by a high-frequency square wave. These two are
defined as:
r IEE, 2005 vin ðtÞ ¼Vin sinðwi tÞ
IEE Proceedings online no. 20055022
1 0 t Ts =2 2p ð1Þ
doi:10.1049/ip-epa:20055022 HM ðtÞ ¼ Ts ¼
1 Ts =2 t Ts ws
Paper first received 9th May and in final form 19th August 2004. Originally
published online: 8th April 2005 The resultant voltage after modulation can be obtained by
H. Krishnaswami was with the Department of Electrical Engineering, Indian multiplying vin ðtÞ and HM(t), the Fourier series of which is
Institute of Science, India, and is now with the GE Healthcare Technologies, given by,
1584 E-Block, AECS Layout, Kundalahalli, Bangalore, Karnataka 560037,
India 2Vin X1
1
V. Ramanarayanan is with the Department of Electrical Engineering, Indian
vHF ðtÞ ¼ ½cosðð2n 1Þws wi tÞ
p n¼1 ð2n 1Þ ð2Þ
Institute of Science, Bangalore, India
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005 509
100 Evaluating the Fourier series of the output voltage, the
fundamental output voltage Vfund as a function of a is
50 obtained as:
Vfund ¼ Vin 1 4a when a ¼ 0; Vfund ¼ Vin
voltage
0 Ts
a ¼ Ts =2; Vfund ¼ Vin ð4Þ
−50
a ¼ Ts =2; Vfund ¼ 0
This paper presents the standard H-bridge adapted to AC/
−100 AC power conversion. The circuit is illustrated in Fig. 3.
0 0.005 0.01 0.015 0.02
When the above-mentioned control is applied i.e., HM(t)
time, s
a
controlling converter 1 and HD(t) controlling converter 2,
the unfiltered output voltage obtained is as shown in Fig. 4
2 along with the frequency spectrum. In Fig. 4, it is observed
that with the above scheme the output voltage waveform is
1 bipolar. Also since the transformer voltage does not have
any zero voltage instants, i.e. no freewheeling sub-periods,
voltage
−2 converter 1 converter 2
0 0.005 0.01 0.015 0.02
time, s
S1 S2 S3 S3
b
100 high-
frequency
50
Vin Vpri
Vo
voltage
0 transformer
−50 S1 S2 S3 S3
−100
0 0.005 0.01 0.015 0.02
time, s Fig. 3 Topology of high-frequency AC link electronic transformer
c
80
magntitude of harmonic voltage
V
−100.0
0.022 0.024 0.026 0.028 0.03 0.032 0.034 0.036 0.038
t, s
60.0
mag (V)
40.0
20.0
0.0
0 2 4 6 8 10 12 14 16 18 20 22 24
f (×103)
1
S1
−1
a
1
S2
0
α
−1
b
2
1
S3
−1
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
time, s (×103)
c
Fig. 5 Control signals for switches S1–S3 derived from HM(t) and HD(t)
proposed control scheme. Note the difference in waveform during commutation. This decreases the efficiency of the
in Figs. 4 and 6. converter as well as the reliability of the system. These facts
At t ¼ Ts/2 in Fig. 5, switches S1 in converter 1 and S3 in are a great barrier to making this converter practicable. In
converter 2 change from +1 to 0 simultaneously. If a in this proposed control scheme the transformer voltage
Fig. 5 is symmetrically distributed on either side of Ts/4 waveform has zero voltage states. Owing to the symmetric
within the half cycle Ts/2 then, at any point of time only one nature of the scheme all the switches in converter 2 are
transition takes place, i.e. either in converter 1 or in turned on at this instant. Hence zero voltage switching
converter 2. Earlier S2 was phase shifted with respect to S1. (ZVS) is achieved in converter 2. A method to reduce
After this modification, the phase variations of S1 and S2 switching losses in converter 1 is discussed in Section 5 of
with respect to S3 are positive and negative, respectively. this paper. Also the control scheme naturally leads to
Hence it is given the name symmetric modulation. The unipolar output voltage, which has its advantages known in
resultant pulses for the switches are shown in Fig. 7. This the literature.
symmetric nature of the scheme proves advantageous Two methods of realisation of this PWM scheme are
during the switching process of converter 2. proposed in this paper. The first method uses a triangular
AC/AC converters employing four quadrant switches wave and can give only an in-phase output voltage, i.e. a
have the problem of high-current and high-voltage surges can vary from 0 to Ts/2 only. The second method uses a
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005 511
100.0
0.0
V
−100.0
0.022 0.024 0.026 0.028 0.03 0.032 0.034 0.036 0.038
t, s
60.0
40.0
mag (V)
20.0
0.0
0 2 4 6 8 10 12 14 16 18 20 22 24
f (×103)
1
S1
0
/2
−1
a
1
S2
0
/2
−1
b
2
1
S3
−1
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2
time, s (×103)
c
double ramp carrier wave to give both in-phase and out-of- services. Traditionally servo voltage stabilisers fill this need.
phase output voltage. Figs. 8a and b illustrate the two They use a variable autotransformer and an isolation
methods. In Fig. 8b VR is the carrier voltage and VC is the transformer to inject a compensating voltage in series with
control voltage. VR has two identical ramps shifted by 1801. the utility power. Slow dynamic response and bulky line
This method does not introduce a discontinuity at the zero frequency transformer are the main disadvantages of such a
output voltage point, i.e. when a ¼ Ts/2, hence it is useful in system. Various methods of providing variable AC have
closed-loop control. The second method finds its applica- been discussed in [5, 6]. But the line frequency magnetics still
tion in control of the automatic voltage regulator (AVR), form a part of the system. An electronic transformer can
which is explained in the following Section. replace the line frequency autotransformer and isolation
transformer by a single high-frequency transformer. The
4 Application as an automatic voltage regulator size of the system reduces drastically as a result. Such an
AVR is shown in Fig. 9. The output voltage of the AVR
Power-line disturbances such as undervoltage, overvoltage, can be derived as:
voltage sags and swells in sensitive equipment such as
computers, communication services etc., can often lead to a
Vo ¼ ð1 n þ 2DnÞ Vin where D ¼ ð8Þ
loss of valuable data and interruption of communication Ts
512 IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005
VT transitions are already ZVS, as explained in Section 3.
Vc Consider the operation of a single leg in converter 1, as
shown in Fig. 2. A capacitive snubber is added across each
−Vc
/2 /2 switch to prevent the interruption of load current. This
capacitance may be the device capacitance or an external
S1, S1
capacitance added across the switch. To prevent the source
S2, S2
getting short-circuited, a dead time is given between two
switches in one leg. Figure 10 explains the working of the
single-leg circuit during the dead time with the transition
S3
from S1 to S1 taken for example. Both positive and
S3
negative input voltages are considered with the current in
the same direction.
Ts
+ −
a
CS1 CS1
VR
Vc S1 + S1 −
− +
−Vc
S1, S1 I1 I1
/2
S2, S2 Vin Vin
S3 CS1 CS1
S1 − S1 −
S3
+ +
Ts
C
filter
L
Consider initially that S1 is on and the load current is
converter 1 converter 2
flowing through S1, as shown in Fig. 10a. When S1 is
S1 S2 S3 S3 turned off, the inductive load current splits between the two
high- Vo
capacitors, CS1 and CS1 . The load current is not in the
Vin frequency proper direction to aid the charge transfer from CS1 and
230V
170V − 270V CS1 . Instead, the capacitance across switch S1 gets charged
Vpri
continuously to a value of higher than the bus voltage. Both
transformer CS1 and CS1 are charged in the opposite direction, as in
Fig. 10a. When S1 is now turned on, the stored energy gets
S1 S2 S3 S3 dissipated in the device. This results in high current spikes.
This is a lossy transition. Consider the operation in Fig. 10b.
When S1 is turned off, the reflected load current aids in the
energy transfer between the output capacitance of the two
Fig. 9 AVR using high-frequency AC link electronic transformer complementary switches, S1 and S1. When CS1 is
discharged completely to zero, S1 can be turned on. This
is a lossless transition. A method to prevent overvoltages
where Vo is the regulated output voltage of the AVR and n has been proposed in [8], which controls each two-quadrant
is the transformer turns ratio. Thus when switch in a four-quadrant switch element. In this paper a
novel biasing circuit is proposed to convert the potentially
D ¼ 0; Vo ¼ ð1 nÞVin ðbuckÞ lossy transitions into lossless transitions.
D ¼ 0:5; Vo ¼ Vin ð9Þ Turn-on and turn-off losses are the two main constituents
D ¼ 1; Vo ¼ ð1 þ nÞVin ðboostÞ of switching losses. In ZVS converters, the device voltage is
brought to zero just prior to turn-on. During turn-off
the rate of voltage rise is limited, so that the device current
5 Biasing circuit falls to zero before the voltage rises substantially. In
the electronic transformer circuit, the turn-off losses are
In this Section a biasing circuit is proposed to reduce the negligible as a capacitive snubber is added across the
switching losses of converter 1. Converter 2 switching switches. But during turn-on there exists a voltage across
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005 513
the MOSFET and the turn-on losses are determined by the (point ‘o’) and the centre point of one leg. This biasing
energy stored in the capacitance across the MOSFETS circuit injects high-frequency current into the system to
(intrinsic and extrinsic). An analysis of converter 1 in Fig. 2 overcome the effect of load current during transitions. The
was performed to identify the lossy and lossless switching injected current is designed to be twice the value of peak of
transitions (turn-on) in a manner similar to that shown in the reflected load current. The operation of the biasing
Fig. 10. Table 1 presents the results of the quadrant-by- circuit is explained considering the switching transitions
quadrant analysis of switching transitions in converter 1. from S1 to S1. Before S1 is turned off, it is carrying the sum
The quadrants are defined based on the fundamental load of the reflected load current (IL) and the injected current
voltage and load current. Out of the 16 switching transitions (Iinj) and the resultant switch current (IS1 ) is positive
in converter 1 eight are lossy and eight are lossless. It is (direction of IS1 shown in Fig. 13). Note that the same
observed that lossy and lossless transition depends on the current IS1 is negative in a lossy transition. During the dead
quadrant of operation. Reference [9] has suggested an time, the injected current divides equally between the two
external biasing circuit to reduce the load dependence of the capacitors CS1 and CS1 . Since IS1 is positive the capacitor
ZVS characteristics in a phase-modulated DC/DC con-
CS1 gets discharged and the switch S1 is turned on when the
verter. This technique of biasing appropriate legs with
voltage across it is zero. In this way ZVS is achieved in S1 in
suitable currents to ensure ZVS is applied to the electronic
quadrant 1. A similar analysis is carried out for all switches
transformer in this paper.
in converter 1 and it is found that the biasing circuit ensures
ZVS for switches S1 and S2 in all four quadrants.
Table 1: Summary of switching transient analysis
100.0 7 Conclusions
V
T
0.0
1
−100.0
0.005 0.00501
t, s
4 10m
v/ 0.00s 10.0us / Stop 4 26.6m
v
Fig. 15
Fig. 14 Observed gate and drain voltage waveform of switch S2 a Observed transformer primary voltage waveform
turn-on b Observed transformer primary current waveform
IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005 515
1 200V/ 0.00s 10.0m
s/ Stop 1 50.0V
circuit is proposed to convert all lossy transitions in
converter 1 to lossless transitions and the results are also
presented.
8 References
T
1 1 McMurray, W.: ‘Power converter circuits having a high-frequency ink’,
US Patent 35173000, 23 June 1970
2 Kang, M., Enjeti, P.N., and Pitel, I.J.: ‘Analysis and design of electronic
transformers for electric power distribution system’, IEEE Trans. Power
Electron., 1999, 14, (6), pp. 1133–1141
3 Harada, K., Sakamoto, H., and Shoyama, M.: ‘Phase-controlled DC-
AC converter with high-frequency switching’, IEEE Trans. Power
Electron., 1988, 3, pp. 406–411
a
4 Hienemann, L., and Mauthe, G.: ‘The universal power electronics
based distribution transformer – an unified approach’. IEEE
PESC2001, Conf. Rec.
4 10m
v/ 0.00s 10.0m
s / Stop 4 2.82m
v 5 Kwon, B.H., Youm, J.H., and Choi, J.H.: ‘Automatic voltage regulator
with fast dynamic speed’, IEE Proc. Electr. Power Appl., 1999, 146, (2),
pp. 201–207
6 Hietpas, S.M., and Naden, M.: ‘Automatic voltage regulator using an
AC voltage-voltage converter’, IEEE Trans. Ind. Appl., 2000, 36,
pp. 3–38
T
7 Hariharan, K.: ‘High frequency AC link electronic transformer’. MSc
4 Thesis, Department of Electrical Engineering, Indian Institute of
Science, April 2002
8 Enjeti, P.N., and Choi, S.: ‘An approach to realize higher power AC
controller’. Proc. IEEE APEC Conf., March 1993, pp. 323–327
9 Rajapandian, A., and Ramanarayanan, V.: ‘A Constant Frequency
Resonant Transition Converter’, J. Indian Inst. Sci., 1996, pp. 363–37
Fig. 16
a Observed output voltage of AVR V0 ¼ 230 V
b Observed load current of AVR IL ¼ 2.17 A
Scale: 2A/div
516 IEE Proc.-Electr. Power Appl., Vol. 152, No. 3, May 2005