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The future of technology is in compact but faster and affordable devices that provide
ability to connect anywhere, anytime with any service to get uninterrupted access to information,
entertainment, communication, monitoring and control. Microminiaturization is the key to make
the compact electronic devices used for high reliability in application. Latest trend in technology
is to move from3D flexible configuration to 3D stacking and then to 3D ICs. There are different
motivations like form factor, electrical performance and cost of 3D integration for development
of 3D IC. The 3D IC technology is at research and development stage in the bigger IC
companies today and technical issues are very close to be solved. The adoption of advanced
packaging technologies could also change the industry food chain of the semiconductor. The
current goal is to develop a cost effective technology tool for 3D ICs.

3D integration consists of stacking integrated circuits and connecting them vertically.

It replaces long vertical wiring connections by vertical interconnects .Minimum pitch of vertical
interconnect had been used previously in 2007 was approximately 50µm which has been now a
day reduced up to 5 µm and will reduce to less than 2 µm in near future. Application of 3D
integration is 3D stacked memory and in future application will be in logic (multi core processor
with cache memory) and vertical device on CMOS or multilevel 3D IC. This seminar discusses
the latest trends in 3D ICs like TSV as well as challenges in the 3D IC technologies.