Homework Title/No.: 2 Course Code: CSE211.

Course Instructor: _________Course Tutor (If Applicable):

Date of Allotment: 25/09/2009 Date of Submission: 09/10/2009
Student’s Roll No. RC1804B52 Section No: C1804.
Declaration:
I declare that this assignment is my individual work. I have not copied from
any other student’s work or from any other source except where due
acknowledgement is made explicitly in the text, nor has any part been written
for me by another person.

Student’s Signature Tarun kumar

Evaluator’s Comments:
__________________________________________________________________
__________________________________________________________________
________________________________
Marks Obtained: ___________out of ____________
Q1. How many clock cycles are needed to execute
(a) LDA and STA
(b)BUN and BSA
(c) ISZ
(d)AND and ADD
Ans. symbol no. of clock cycles
LDA Two
STA one
BUN one
BSA one
ISZ three
AND Two
ADD Two

Q2. Fetching and decoding of any instruction takes three clock cycles. How?

Ans: - During fetching and decoding of any instruction there takes three clock
cycles .1st the address is in PC and then send to AR , during this there is one clock
cycle has been taken.
After this instruction is fetched from the memory location and during this there is
one another clock cycle is completed .
And during decoding the instruction to their respective registers the third clock
cycle has been completed.
The process is shown below:
T0:AR<-PC.
T1:IR<-M[AR], PC<-PC+1
T3:D0....D7<-Decode IR(12-14), AR<-IR(0-11), I<-IR(15).

So during the process of fetching and decoding there are three clock cycles taken.
Q3. Draw timing diagram for D3T4: SC ← 0.

ANS: - The timing diagram is as follows : -

Q4. How is I bit useful in determining the type of instruction?

ANS:- I bit is useful in determining the type of instruction .1st we see the code in
the opcode ,if it is (1 1 1) then the instruction is not memory reference instruction
& if opcode is other than (1 1 1) which means it contains the 0 at any position
the it is a memory reference instruction and now the I bit tell the mode of address
is passed in the instruction. If I bit is 0 then the mode is direct & if the I bit is 1
then mode is indirect.
In case of other than memory reference instruction the I bit help in
differentiating the register reference instruction & the input output instruction. If I
bit is 0 then it is register reference instruction and if I bit is 1 then the instruction
is input output instruction.

Q5. (a) How are data, address and control buses involved in data transfer to
and from memory? Consider a computer system with 16 registers of 32 bit
each and RAM of 1GB. Calculate the size of data bus and address bus
required for the same.
(b) Find out register size of registers in Pentium Processor.

Ans.(a)Data,address and control bus involve in data transfer to and from memory
when data,address and control buses stored in memory can’t be processed directly
so data must be read from memory to a register where they can be operated on
with logic circuit.
The size of data bus will be four and address bus will be 32.

(b) The register size of register in Pentium processor will be 3.06 Ghz.

Q6. Why is micro programmed control better than hardwired? Identify some
situations when hardwired is preferred?

ANS:- Micro programmed control is better than hardwired system because in

practical applications the hardwired system is very complicated and not easy to
understand and join it ,and if there is any problem occurred in connections then it
is very difficult to find it and solve where as in micro programming we just need to
write the set of instructions called the programs.
Writing a program is much easier than to connect a complex heavy circuit, we just
need to have the knowledge of the programming language.
Whereas there are some situations when we prefer the hardwired system instead of
the micro programming.
1. When the program is too large then it became very difficult to understand
that and at this time we prefer the hardwired system. Because connection is
not so tuff than the program.
 2. For the purpose of speed of execution we prefer the hardwired system
because when the program is too big execution time increases due to extra
time taken during compilation while no such problem occurs in hardwired
system.
3. When the availability of micro program control is not present in the system
then we can only use the hard wired system.

Q7. Demonstrate the execution of interrupt cycle with the help of an example.

ANS: - The interrupt cycle is a hardware implementation of a branch and save

return address operation.The return addresss available in PC is stored in a
specific location where it can be found later when the program returns to the
instruction at which it was interrupted.This location may be a processor registor,a
memory stack ,or a specific memory location.Here we choose the memory location.
Here we choose the memory location at address 0 as the place for storing the
return address.Control then inserts address 1 into PC and clears IEN and R so
that no more interruptions can occur until the interrupt request from the flag has
been serviced.
For example:let us suppose that an interrupt occurs and R is set to 1 while the
control is executing the instruction at address 255.At this time return address 256
is in PC.The programmer has previously placed an I/O service program in
memory strating frm address 1120 and a DUN 1120 instruction at address at
instruction at 1.When control reaches timing signal T0 and finds the R=1 , it
proceeds with the interrupt cycleThe content of PC(256)is stored in memory
location 0,PC is set to 1 and R is cleared to 0.At the beginning of the next
instruction cycle ,the instruction that is read from memory is in address 1.Since
this is in address 1 therefore it in the con tent of PC.The branch instruction at
address 1 causes the program to transfer to the input output service program at
address 1120.This program checks the flags,determines which flag is set, and then
transfers the required input or output information. Once this is done the
instruction ION is executed to set IEN to 1 and the program returns to the location
where it was interrupted.

Q8.The following Register transfer are executed in common bus system . For
each specify: (1) the binary value that must be applied to bus select input s2,
s1, and s0; (2) the register whose LD control input must be active; (if any) (3)
a memory read or write operation(if needed); (4) the operation in the adder
and logic circuit(if any).

Ans. (1) (2) (3) (4)

S2 S1 S0 Load(LD) Memory Adder
(a) AR<-PC 010(PC) AR --- ---
(b) IR<-M[AR] 111(M) IR Read ---
(c) M[AR]<-TR 110(TR) --- Write ---
(d) DR<-AC 100(AC) DR and AC --- Transfer DR to AC
AC<-DR