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Received 18 November 2004; received in revised form 14 February 2005; accepted 15 February 2005
Available online 31 March 2005
Abstract
In this paper we demonstrate the applicability of the unified model and parameter extraction method (UMEM), previously devel-
oped by us, to organic thin film transistors, OTFTs.
The UMEM, which has been previously used with a-Si:H, polysilicon and nanocrystalline TFTs, provides a much rigorous and
accurate determination of main electrical parameters of organic TFTs than previous methods. Device parameters are extracted in a
simple and direct way from the experimental measurements, with no need of assigning predetermined values to any other model
parameter or using optimization methods. The method can be applied to both experimental and simulated characteristics of organic
TFTs, having different geometries and mobility. It provides a very good agreement between transfer, transconductance and output
characteristics calculated using parameter values obtained with our extraction procedure and experimental curves. Differences in
mobility behavior, as well as other device features that can be analyzed using UMEM are discussed.
2005 Elsevier Ltd. All rights reserved.
0038-1101/$ - see front matter 2005 Elsevier Ltd. All rights reserved.
doi:10.1016/j.sse.2005.02.004
1010 M. Estrada et al. / Solid-State Electronics 49 (2005) 1009–1016
the boundaries between crystals, since most materials Finally we present a complement to the UMEM in
used to fabricate OTFTs are polycrystalline, [6,7]. order to consider, if necessary, the non-ohmic contact
OTFTs can present deformation at the origin of the at drain and source, sometimes present in OTFTs. For
output characteristics, due to non-ohmic contacts at this last treatment, analytical expressions are also pro-
drain and source [8–10]. They can also have leakage cur- vided for modeling this effect and for the extraction of
rent across the gate dielectric [11] and/or polarization ef- the required parameters.
fects [8], which can be significant and have to be taken
into account.
In numerical simulations, the longitudinal field 2. Main features of unified model and parameter
dependence of the mobility has been introduced by extraction method (UMEM)
external models, [5], evaluated by Monte Carlo [1], or
simply not considered, [12]. 2.1. Summary of steps to extract model parameters
Some authors have used simulation in SPICE using
the MOSFET model, to which some features as series The mobility dependence with gate voltage is de-
and non-linear resistance at drain and source are some- scribed as [15]:
times added, [8,2]. The use of the model 15 for a-Si:H c
ðV GS V T Þ a
devices in AIMSpice was reported in [13], with an addi- lFET ¼ l0 ¼ lFET0 ðV GS V T Þca ð1Þ
tional treatment of the series and non-linear OTFTs V aa
resistance. The non-linear OTFT resistance was also where lFET0 is the a value of mobility for low perpendi-
treated in [14]. Although this last approach has some cular and longitudinal electric field, VT the threshold
advantages regarding previous, the method used voltage and ca and Vaa are fitting parameters. l0 is usu-
for parameter extraction is numerical and among its ally taken as the band mobility for the material of the
disadvantages are a relatively big number of fitting para- TFT under analysis. Since this parameter is usually esti-
meters, which can be determined by optimization mated, the fitting parameter Vaa is used to adjust lFET0
methods when using AIMSpice, or through graphical to the experimental value of the low field mobility for
or derivative methods which are troublesome and impre- the device being modeled. Parameter ca is related to
cise due to experimental errors. For example, with AIM- the conduction mechanism and can describe both an in-
Spice extractor, it is difficult to obtain the same group of crease or decrease in mobility with VGS. In the first case,
fitting parameters for all modeled transistor curves, ca > 0 and in the second ca < 0. The first behavior is typ-
which also lack physical meaning. In addition, some of ical of amorphous and nanocrystalline devices and is re-
the extraction procedures, require to previously assume lated to trap conduction mechanism, while a decrease in
values to some parameters in order to extract the rest of mobility with gate voltage appears in polycrystalline
them, that is, some parameters cannot be extracted inde- TFTs when surface scattering starts to be important.
pendently one from another [15]. In organic TFTs, as will be shown later, both behaviors
In the last years, we have been applying our unified were observed. In this way, extracted fitting parameters
model and parameter extraction method (UMEM) first can be used nevertheless, to analyze physical mecha-
to a-Si:H, [15,16], to polycrystalline, [17] and recently nisms that take place in the devices.
to nanocrystalline silicon transistors [18]. Among the Drain current in the linear and saturation regions is
advantages of this method are that all above threshold modeled as:
parameters are extracted from two transfer characteris-
W lFET ðV GS V T Þ
tics, one in the linear and the other in the saturation re- I DS ¼ C diel
gion and from the output characteristic of the device L 1 þ R WL C diel lFET ðV GS V T Þ
under study, using a single mathematical processing V DS ð1 þ k V DS Þ
h h im i1=m þ I 0 ð2Þ
involving and integral method that additionally reduces
experimental noise. The method can be used to compare 1 þ VVDSsat
DS
devices with different geometries and fabrication condi- where W is the channel width, L is the channel length,
tions under the same parameter extraction conditions. Cdiel is the gate capacitance, R is source plus drain resis-
This method uses analytical expressions for both model- tance, I0 is the leakage current and m and k are fitting
ing and parameter extraction, so calculations can be parameters related to the sharpness of the knee region
made using any program for mathematical calculations. and to the channel length modulation respectively.
In addition it was also implemented in AIMSpice [19]. Parameter k describes the variation of conductance with
In this paper we show that UMEM provides an excel- VDS in the saturation region.
lent tool for modeling OTFTs with different geometries, The saturation voltage is defined through the satura-
dielectric materials and fabrication processes. We apply tion modulation parameter aS:
it to analyze and compare the mobility behavior of four
different types of pentacene TFTs. V DSsat ¼ aS ðV GS V T Þ ð3Þ
M. Estrada et al. / Solid-State Electronics 49 (2005) 1009–1016 1011
For the extraction procedure in the above threshold the maximum gate voltage value you want to model.
regime, we will use the same integral function H(VGS) Select a value of VDS in the saturation region, not too
defined in [15]: far from the knee of the output selected curve for which
R V GS the drain current IDS1 is known from measurements. This
I DS ðxÞdx
H ðV GS Þ ¼ 0 ð4Þ drain voltage value will be referred as VDS1 and should be
I DS ðV GS Þ equal to:
After substituting (1) in (2) and calculating H(VGS) from V DS1 ¼ aS ðV GS1 V T Þ ð9Þ
(4), the following expression is obtained for above
threshold regime: This value of IDS1 corresponds to IDSsat(VDSsat) in
1 expression (8).
H a ðV GS Þ ¼ ðV GS V T Þ ð5Þ Step no. 5: Parameter k is then extracted from:
2 þ ca
8 h h im i1=m 9
>
< ðI DS2 Þ2 ½1 þ R K lFET ðV GS1 Þ ðV GS1 V T Þ 1 þ asðVV DS2V Þ >
=
ðV DS2 Þ GS1 T 1
k¼ ; ð10Þ
>
: K lFET ðV GS1 Þ ðV GS1 V T Þ >
; V DS2
The generalized parameter extraction procedure for dif- where VDS2 is selected not too far from the maximum
ferent devices and operation regimes can be found in drain voltage measured in the characteristic to be mod-
[15–18]. The steps for the determination of the model eled. IDS2 is the measured drain current for the selected
parameters VT, ca, aS Vaa, m and k are summarized drain voltage VDS2.
below.
If the slope of the IDS–VGS curve in the linear region
Step no. 1: VT is obtained from the intercept, and ca is observed to decrease due to the presence of a series
from the slope in expression (5). resistance, the value of this resistance can be determined
Step no. 2: From 1 the experimental data, calculate as indicated in [15].
ðI DS Þ1þca vs. (VGS VT) and its slope Sl. OTFT can show a non-linear contact at drain and
The value of Vaa is extracted as: source. To model also this region, the following simple
1=ca and precise procedure can be used.
KV DS
V aa ¼ ; ð6Þ
Sl1þca 2.2. Modeling of OTFTs output characteristics when
non-ohmic contacts are present
where K ¼ WL l0 C diel . In this form, the three parame-
ters that determine the effective change of the field effect If a non-ohmic contact is present at drain and source,
mobility in the above threshold regime are extracted. which is frequently observed in OTFTs, the external bias
Step no. 3: Using the saturation current characteristic applied, Vext, will fall part on the non-ohmic contact,
for VDS P VGS VT, calculate the slope (diode), Vdiode and part on the transistor, VDS, including
1=ð2þcaÞ
Ss in the linear region of I DSsat vs. its series resistance, that is:
(VGS VT). Parameter aS is extracted as:
pffiffiffi V DSext ¼ V DS þ V diode
Ss2þca V caaa 2
aS ¼ ð7Þ I DS kT I DS
K ¼ þn log
GðV GS ; V DS Þ q I do
Step no. 4: Parameter m, is calculated evaluating (2) at
VDSsat for a value of gate voltage near the I DS kT I DS
¼ þn log ; ð11Þ
maximum measured, neglecting R and k: GðV GS ; V DSext Þ n q I do
where
K lFET ðV GS Þ
m ¼ log 2= log
½1 þ K lFET ðV GS Þ ðV GS V T Þ
GðV GS ; V DSext Þ
aS ðV GS1 V T Þ
ð8Þ KlFET ðV GS Þ ðV GS V T Þ ð1 þ k V DSext Þ
I DSsat ðV DSsat Þ ¼ h m i1=m
ð1 þ R lFET ðV GS Þ ðV GS V T ÞÞ 1 þ VV DSext
DSsat
To determine IDSsat(VDSsat) select a measured output
characteristic for VGS = VGS1, where VGS1 is a value near ð12Þ
1012 M. Estrada et al. / Solid-State Electronics 49 (2005) 1009–1016
and n is a fitting parameter to account for the real volt- The effect of n is to provide the necessary displace-
age across the transistor when the diode resistance is ment and adjustment of the slope of the modeled curve
significant. to the measured one, in the region of deformation.
To model output characteristics presenting this effect, After determining n, calculate k from (11) and (12),
after following steps 1–4 previously described, the diode solving for a value of drain voltage VDSext = VDS2 (and
parameters must be determined. It must be indicated its corresponding IDS = IDS2) not too far from the maxi-
that for steps 1–4, the transfer curve selected must cor- mum drain voltage measured in the selected output
respond to a VDSext in the linear region, that at the same curve for VGS2.
time lies outside of the region affected by the deforma- Finally, IDS vs. VDS is modeled substituting the
tion of the non-linear contact. extracted parameters in (11).
Table 1
Technological parameters of pentacene transistors
Transistor Pentacene layer [nm] Dielectric gate W [lm] L [lm] Reference
Type [nm]
T1 160 PMMA 700 600 120 [20]
T2 30 PVP 100 500 50
T3 30 PVP 120 500 50 [21]
T4 50 SiO2 400 220 20 [5,22]
Table 2
Extracted parameters
T1 T2 T3 T4
Linear region voltage range (35–39) (8–11) (10–20) (60–100)
Saturation region voltage range (30–39) (8–11) (15–20) (80–100)
Output characteristic VGS [V] 40 14 20 40
VT [V] 4.1 2.6 3.9 +12.3
ca 1.9 0.6 0.15 0.072
Vaa [V] 1.7 · 103 106 1.4 · 103 1.7 · 104
lFET0 [cm2/V s] 7.4 · 107 0.058 0.52 0.7
R [kX] 1.1 · 104 200 14 0
as 0.39 1.7 1.4 0.935
m 1.27 2.8 2.97 2.8
k [1/V] 3.5 · 103 1.1 · 102 9.6 · 105 2 · 104
n – 8.9 – –
I0 [A] – 1.9 · 108 – –
n – 1.37 – –
M. Estrada et al. / Solid-State Electronics 49 (2005) 1009–1016 1015
0.30 0.08
I IDSI
0.25 VDS = 40 V
5
γα = 3.07 0.06 T3
[µA]
1/2
a
0.20
γ
[V]
1/(1+γa )
0.15 0.04
µFET/µFETo
I IDS I
[µA]
0.10
0.02 T2
1/2
0.05
T4
0.00 0.00
-10 0 10 20 30 40 0
0 5 10 15
-VGS [V]
(a) IVGS-VTI [V]
-4
a
5x10
γ
of crystalline devices. In fact, other amorphous devices,
[V]
as for example a-Si:H and nanocrystalline Si TFTs, do 4x10
-4
µFET/µFETo
not show this dependence either. -4
3x10
OTFTs can present significant VT shifts at room tem-
-4
perature when a positive or negative gate voltage is ap- 2x10
important for modeling and analyzing OTFTs, where the tics of pentacene-based thin film transistors. Thin Solid Films
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