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June 2007
FDS4435BZ
P-Channel PowerTrench® MOSFET
-30V, -8.8A, 20mΩ
Features General Description
Max rDS(on) = 20mΩ at VGS = -10V, ID = -8.8A This P-Channel MOSFET is produced using Fairchild
®
Max rDS(on) = 35mΩ at VGS = -4.5V, ID = -6.7A Semiconductor’s advanced PowerTrench process that has
Extended VGSS range (-25V) for battery applications been especially tailored to minimize the on-state resistance.
HBM ESD protection level of ±3.8KV typical (note 3) This device is well suited for Power Management and load
High performance trench technology for extremely low rDS(on) switching applications common in Notebook Computers and
High power and current handling capability Portable Battery Packs.
Termination is Lead-free and RoHS compliant
D
D
D D 5 4 G
D
D 6 3 S
D 7 2 S
G
S
S D 8 1 S
Pin 1 S
SO-8
Thermal Characteristics
RθJC Thermal Resistance, Junction to Case 25
°C/W
RθJA Thermal Resistance, Junction to Ambient (Note 1a) 50
Off Characteristics
BVDSS Drain to Source Breakdown Voltage ID = -250µA, VGS = 0V -30 V
∆BVDSS Breakdown Voltage Temperature
ID = -250µA, referenced to 25°C -21 mV/°C
∆TJ Coefficient
IDSS Zero Gate Voltage Drain Current VDS = -24V, VGS = 0V 1 µA
IGSS Gate to Source Leakage Current VGS = ±25V, VDS = 0V ±10 µA
On Characteristics
VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = -250µA -1 -2.1 -3 V
∆VGS(th) Gate to Source Threshold Voltage
ID = -250µA, referenced to 25°C 6 mV/°C
∆TJ Temperature Coefficient
VGS = -10V, ID = -8.8A 16 20
rDS(on) Static Drain to Source On Resistance VGS = -4.5V, ID = -6.7A 26 35 mΩ
VGS = -10V, ID = -8.8A, TJ = 125°C 22 28
gFS Forward Transconductance VDS = -5V, ID = -8.8A 24 S
Dynamic Characteristics
Ciss Input Capacitance 1385 1845 pF
VDS = -15V, VGS = 0V,
Coss Output Capacitance 275 365 pF
f = 1MHz
Crss Reverse Transfer Capacitance 230 345 pF
Rg Gate Resistance f = 1MHz 4.5 Ω
Switching Characteristics
td(on) Turn-On Delay Time 10 20 ns
VDD = -15V, ID = -8.8A,
tr Rise Time 6 12 ns
VGS = -10V, RGEN = 6Ω
td(off) Turn-Off Delay Time 30 48 ns
tf Fall Time 12 22 ns
Qg Total Gate Charge VGS = 0V to -10V 28 40 nC
VDD = -15V,
Qg Total Gate Charge VGS = 0V to -5V 16 23 nC
ID = -8.8A
Qgs Gate to Source Charge 5.2 nC
Qgd Gate to Drain “Miller” Charge 7.4 nC
2. Pulse Test: Pulse Width < 300µs, Duty cycle < 2.0%.
3. The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied.
50 4.0
VGS = -10V PULSE DURATION = 80µs
VGS = -4.5V
3.0
VGS = -4.5V
NORMALIZED
30 2.5
VGS = -4V VGS = -5V
VGS = -4V 2.0
20
VGS = -3.5V 1.5
10 VGS = -10V
PULSE DURATION = 80µs 1.0
DUTY CYCLE = 0.5%MAX
0 0.5
0 1 2 3 4 0 10 20 30 40 50
-VDS, DRAIN TO SOURCE VOLTAGE (V) -ID, DRAIN CURRENT(A)
1.6 60
ID = -8.8A PULSE DURATION = 80µs
DRAIN TO SOURCE ON-RESISTANCE
ID = -8.8A
VGS = -10V DUTY CYCLE = 0.5%MAX
1.2 40
TJ = 125oC
1.0 30
0.8 20
TJ = 25oC
0.6 10
-75 -50 -25 0 25 50 75 100 125 150 2 4 6 8 10
TJ, JUNCTION TEMPERATURE ( C) o
-VGS, GATE TO SOURCE VOLTAGE (V)
50 100
PULSE DURATION = 80µs
-IS, REVERSE DRAIN CURRENT (A)
VGS = 0V
DUTY CYCLE = 0.5%MAX
40 10
-ID, DRAIN CURRENT (A)
VDS = -5V 1
30
0.1 TJ = 150oC TJ = 25oC
20
TJ = 150oC 0.01
TJ = -55oC
10
TJ = 25oC 0.001
TJ =-55oC
0 0.0001
1 2 3 4 5 0.0 0.2 0.4 0.6 0.8 1.0 1.2
-VGS, GATE TO SOURCE VOLTAGE (V) -VSD, BODY DIODE FORWARD VOLTAGE (V)
ID = -8.8A
8 Ciss
VDD = -10V
CAPACITANCE (pF)
6 1000
VDD = -15V VDD = -20V Coss
4
2 Crss
f = 1MHz
VGS = 0V
0 100
0 5 10 15 20 25 30 0.1 1 10 30
Qg, GATE CHARGE(nC) -VDS, DRAIN TO SOURCE VOLTAGE (V)
-4
20 10
VDS = 0V
-5
10 10
TJ = 125oC
-6
10
TJ = 25oC
TJ = 125oC 10
-7
TJ = 25oC
-8
10
-9
1 10
0.01 0.1 1 10 30 0 5 10 15 20 25 30
tAV, TIME IN AVALANCHE(ms) -VGS, GATE TO SOURCE VOLTAGE(V)
10 100
-ID, DRAIN CURRENT (A)
8
-ID, DRAIN CURRENT (A)
100us
10
VGS = -10V
1ms
6
1 10ms
VGS = -4.5V THIS AREA IS 100ms
4
LIMITED BY rDS(on)
SINGLE PULSE 1s
0.1 TJ = MAX RATED
2 o
10s
RθJA = 125 C/W DC
o
RθJA = 50 C/W TA = 25oC
0 0.01
25 50 75 100 125 150 0.1 1 10 80
o
TA, AMBIENT TEMPERATURE ( C) -VDS, DRAIN to SOURCE VOLTAGE (V)
Figure 11. Maximum Continuous Drain Figure 12. Forward Bias Safe
Current vs Ambient Temperature Operating Area
SINGLE PULSE
RθJA = 125oC/W
1
0.6
-3 -2 -1 0 1 2 3
10 10 10 10 10 10 10
t, PULSE WIDTH (s)
2
DUTY CYCLE-DESCENDING ORDER
1
D = 0.5
NORMALIZED THERMAL
0.2
IMPEDANCE, ZθJA
0.1
0.05
0.02
0.01 PDM
0.1
t1
t2
SINGLE PULSE NOTES:
DUTY FACTOR: D = t1/t2
RθJA = 125oC/W
PEAK TJ = PDM x ZθJA x RθJA + TA
0.01
-3 -2 -1 0 1 2 3
10 10 10 10 10 10 10
t, RECTANGULAR PULSE DURATION (s)
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS
HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE
APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS
PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S
WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS.