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1.5V High Performance OP AMP Using Self Cascode Structure

Kshitij Bhardwaj S.S.Rajput
Institute of Engg. &Technology ABV-IIITM
Devi Ahilya VishwaVidayalay Morena Link Road
Indore, M.P., India Gwalior-474010, M.P., India
Tele.91-9977907066 Telep.91-751-2449815
K.bhardwaj37@gmail.com ssrajput@iiitm.ac.in

1. Abstract VT) 2 / 2, where effective equals 12/ (1+2) which can be

An operational amplifier (Op Amp) based on self cascode
structure is proposed that works with a supply voltage of
± .75 volt. It provides an open loop gain of 52dB with a
unity gain frequency of about 17 MHz, with 145 microwatt
of power consumption. Simulation results are based on p-
spice simulation for 0.25μm CMOS technology.
approximated by 1 when m is large [1].The voltage between
source and drain of M1 is small, and there is no appreciable
difference between the VDSAT of composite and simple transis-
tors; and a self-cascode can be used in low voltage operation.
For a self-cascode
VDSAT = VDSATM2 + VDSATM1.

Categories and Subject Descriptors 3. Self Cascode structure

VLSI Circuits –high speed low power circuits
The operating voltage of a regular cascode is much higher than
that of a self-cascode. The regular cascode operates with
General Terms
higher output compliance voltage which is in general
Low Power, OP-AMP, Self Cascode MOSFET structure, VGS+VSAT, while it is simply ≈ 2VSAT for a self cascode. The
Current Mirror (CM). advantage offered by self-cascode structure is that it offers
high output impedance similar to that of a cascode structure
2. Introduction while output voltage requirements are similar to those of a
single transistor.
Battery is the main source of power in all electronics
devices, which adds volume and weight, So the portability
require low power consumption and small size & long life .
One of the techniques to meet the low power consumption
needs to operate with sub volt supplies. This requirement
complicates the design of high performance analog circuit
structures. There are some other techniques suitable to set
new analog structures for low voltage operations [1-4].
In this paper we examine the self cascode structure in the
design of analog structures .A cascode is generally used to
increase the impedence and gain of analog structures;
however the price paid for this high impendence is the
lower voltage headroom for the output voltage swing .To
overcome this problem a self cascode structure is generally
used . A self-cascode is a 2-transistor structure as shown in
Fig. 1 (a). This structure can be treated as a single composite
transistor as shown in Fig. 1 (b). The composite structure has
much larger effective channel length and the effective output
conductance is much lower. The lower transistor M1 is
equivalent to a resistor whose value is input dependent. For
optimal operation, the W/L ratio of M2 is kept larger than that
3.1 Self Cascode CM
of M1, that is, m >> 1. For the composite transistor, the
effective transconductance (gm (effective)) will be gm2/m, A current mirror developed using Self Cascode structure is
which is equivalent to the transconductance of M1 (gm1). Now shown in Fig. 2. The output impendence of Self Cascode CM
the drain current (ID) through M1 and M2 will be effective (Vin - is large. Output and Input Characteristics of Self Cascode

978-1-4244-5187-6/09/$26.00 ©2009 IEEE

254
current mirror structure is shown in Fig.3 and Fig.4
respectively. Frequency response of self Cascode current
mirror is shown in Fig.5 with a 3 dB frequency of 70MHz.

Fig.4 Input Characteristics of self Cascode CM

Fig.2 CM structure based on Self cascode MOSFETs Frequency Response of self cascode CM

3.2 Theoretical Analysis 0

0 500 1000

The current transfer function of the Self Cascode current -1

Current Gain in dB

structure is given by -2

I out W2 L1 1 -3
= , Rin=
I in W1 L2 g m1 -4

-5

-6

Frequency in MHz

Fig.5 Frequency Response of Self Cascode Current Mirror

3.3 Proposed structure

Fig. 3. Output Characteristics
The self cascode building blocks described above facilitate
the building of an op amp to operate at very low voltage. In
the proposed op-amp (Fig.6) circuit a PMOS differential
pair with a diode connected load is used as a first stage.
Output of this stage is given to the NMOS self cascode
structure formed by M8, M9, M10, M11. A pmos self
cascode current mirror formed by M12, M13, M14 works
as a load to this stage. These two stages form the OTA
(operational transconductance amplifier) that has very high
output impedance. The (W/L) ratio of different MOS
transistors are chosen such a way that all transistor work in
saturation region. The output of first stage is connected to
an inverter with PMOS self cascode current mirror load by
which the gain of OP-AMP increased. C1 are used for the
frequency compensation to improve the phase margin.

255
 Table 2 (W/L) of MOS used in Op Amp

Transistor Size (W/L)μm

M1,M2,M9 40/0.5
M3,M4 4.2/0.5
M5,M13, 40/0.25
M6,M14,M16 5/0.25
M7,M12,M15 4.75/0.25
M8,M10 5/0.5
M11 35/0.5
M17 35/0.25

An open loop characteristic of the designed op amp of

Fig.6 is shown in Fig.7. The open loop gain comes out to
be 52db. Unity gain bandwidth is about 16.8 MHz and
results are complied in table3.

Fig.6 Proposed OP-AMP Structure using Self Cascode OPEN LOOP GAIN

60

3.4 Simulation Results: 50

40
A current mirror structure is shown in Fig.2. This structure
30
Gain in dB

has been simulated by PSPICE on 0.25um technology for

W/L ratio of 4.2/.5,5/.5 and 50/.5for M1, M2 and M3.The 20

input characteristics of the current mirror is shown in Fig.3 10

along with the frequency characteristics shown in Fig.4. 0

The op amp of Fig.5 has been simulated on p-spice on 0.25 -10
μm (Level 3) technology. Table 1 shows the different -20
parameters of the MOS transistor. The (W/L) values of 0.0 0.1 10.0

different MOS transistors are given in table2. Frequency in MHz

Fig. 7 Open Loop Gain of OP-AMP

Table 1 OP Amp Design Specification .
Table.3 Op Amp characterization Results
Parameters Specifications Parameters values
Technology 0.25 μm Open loop gain 52db

Threshold Voltages(VTHN,VTHP) 0.4238 V, -0.553 V Unity gain frequency 16.8 MHz

2 2
Transconductance (KPN,KPP) 250 μA/V ,51.9μA/V Gain Margin 5.4dB

Power Supply (VDD, VSS) 0.75 V,-0.75V Phase Margin 51o

Bias Current 30 μA Power dissipation 145 microwatt

3-db frequency 36.46KHz

4. Conclusion:

256
It is necessary to use low voltage low power circuits in all the
portable electronics devices. Self cascode structure has proved to
be an efficient technique. The Op Amp that is proposed in the
paper using self cascode structure is suitable for the low voltage
low power applications as vindicated by the results. The proposed
op amp is working at ±0.75 V supply voltage with a gain of 52db.
The power dissipation is quite low (145 microwatt). The supply
voltage of the op amp may also be reduced by designing it with
90nm or 65nm technology.
5. References
[1] S. S. Rajput and S.S. Jamuar, “Low Voltage Analog Circuit
Design Techniques,” IEEE Circuits and Systems Magazine,
Vol-2, No.2, pp 24-42, 2002.
[2] Elen,Analog & Mixed signal Center (AMSC), Texas A&M
University “Low Voltage Circuit Design Techniques”
257
[3] B.J. Blalock, P.E. Allen and G.A. Rincon-Mora, “Designing
1-V op amps using standard digital CMOS technology”,
IEEE Trans. Circuits and Systems – II, vol. 45, No. 7, pp.
769-779, July 1998.
[4] S.S.Rajput, “Low voltage, current mode Analog circuit
structures and their applications” IIT Delhi, Aug-2002.
[5] E. Sanchez- Sinencio and A.G. Andreou, “Low Voltage/low
Power Integrated Circuits and Systems,” IEEE Press (1999).
[6] Phillip E. Allen, Douglas R. Holberg, “CMOS Analog
Circuit Design”, Oxford University Press, 2004.
[7] Lisha Li,”High gain power operational amplifier design and
compensation techniques”Brigham Young University, April
2007.