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DIGITAL SYSTEMS
1. Hardware error can raise Trap.
(a) No
(b) Yes
(c) Not allowed
(d) Can be done with parity
6. The instruction RET transfers the content of the top two locations of the stack
to the
(a) Accumulator
(b) H and L Register
(c) B and C registers
(d) Program counter
7. The POP transfers the content of the loop two locations of the stack to
(a) Accumulator
(b) H and L registers
(c) Any two register pair
(d) Program counter
8. In a 3-input DAC with 1 V as full scale analog input, the binary inputs 000
and 001 represent ………………………….. respectively.
(a) 0 V and 1 V
(b) 1/8 V and ¼ V
(c) 0 V and 1/8 V
(d) 0 V and ¼ V
18. If output of an ADC converter is going to drive a display, hen it is convenient to have the output
coded in
(a) ASCII
(b) Gray Code
(c) BCD
(d) Octal
26. In certain application, propagation delay is not a consideration, but power dissipation is critical,
which logic family can be used ?
(a) CMOS
(b) MOS
(c) TT
(d) TTY
31. The S and R inputs of S-R flip flops are ………… input
(a) Asynchronous
(b) Synchronous
(c) Any type
(d) Synchronous, only for edge- triggering flip flops
32. The major restriction when operating a pulse triggered flip flop is
(a) data cannot be changed while, the clock pulse is in active state.
(b) data cannot be changed while, the clock pulse is in inactive state.
(c) data cannot be changed while, flip flop is set.
(d) data cannot be changed while, flip flop is reset.
35. A full counter with n flip flops will have …………….. states.
(a)
2n
(b)
2n -1
(c)
2n-1
(d)
2n +1
36. The ring counter with n flip flops has ……………. States.
(a)2n
(b) 2n
(c) 2n -1
(d) 2n-1
37. The number of clock pulses required to move data into and out of an eight bit serial in and serial
out shift register is
(a) 15
(b) 17
(c) 16
(d) 9
38. The binary numbers 1011 0101 is shifted into an eight bit parallel out shift register serially. The
register has an initial contents 1110 0100. The outputs of Q after 2 clock pulses and 4 clock
pulses are ………….. respectively.
(a) 0101 0100 and 0110 0100
(b) 1101 0111 and 1001 0010
(c) 1001 0010 and 1101 1110
(d) 0111 1001 and 0101 1110
43. The sum of two Hexadecimal numbers 23D and 9AA gives the hexadecimal number
(a) BE7
(b) BE5
(c) BF6
(d) AF7
45. Which of the following gates recognizes only words that have an odd number of 1s
(a) NAND
(b) XOR
(c) NOR
(d) None of these
46. If even parity mechanism is being used in system using ASCII code for data transfer, incorrect
receipt data byte is
(a) B5
(b) 1
(c) 2
(d) None of these
47. Any combinational circuit can be implemented by using the following building block
a) AND
b) NAND
c) OR
d) None of these
48. The number of memory location that a CPU with a 16 bit program counter can address
(a) 16k
(b) 64k
(c ) 256k
(e) 32 k
a) In a J-K flip-flop the function K=J is used to realize
b) T flip – flop
c) S-R flip-flop
d) D flip-flop
e) M/S J-K flip
50) The following logic building block can be used to implement any
combinational logic circuit
a) Decoder
b) Multiplexer
c) Ex-Or gate
d) Encoder
53) The least negative valaue that the product of two 8-bit 2’s complement
number can take is
a) -214
b) -215
c) -216
d) None of these
56) The numbers in the range -23 to +31 is represented by minimum number of bits
a) 6
b) 8
c) 7
d) 5
64) If the radix point (binary point) is fixed and assumed to be to on the right of the
right most digit, the representation of such number is called
a) Fixed point
b) Floating point
c) Radix point
d) None of these
65) Which of the following memory elements uses an RC circuit as its input?
a) Unclocked D latch
b) Level-clocked D latch
c) Edge – triggered D flip-flop
d) None of the above
67) Two 4-bit 2’s compliment numbers are added using a ripple carry adder, the
range of the sum output is
a) -128 to +127
b) -256 to +255
c) -512 to + 511
d) -256 to + 256
68) In order to correct a single error, the minimum number of check bits that must
be added to 4 data bits is
a) 2
b) 3
c) 4
d) There is insufficient data to answer the question
72) Which of the following shift operations divide a signed binary number of 2
a) Logical left shift
b) Logical right shift
c) Arithmetic left shift
d) Arithmetic right shift
74) A combinational circuit that converts binary information from n coded inputs to
a maximum of 2n unique outputs called as
a) Encoder
b) Decoder
c) Multiplexer
d) Demultiplexer
79) Which one does not change the information content during movement of
binary information in registers
a) Register transfer micro-operations
b) Arithmetic operations
c) Logic operations
d) None of above
86) In a decimal number system, the weight of each position is a power of the
base number ……….
a) 10
b) 8
c) 2
d) 16
28. There are two basic forms of Boolean expressions : the sum of products and
………………..
29. Demorgan’s theorms are used to represent the function only with
………………………… gates.
30. A …………………………. Operates as a decoder in reverse.
Answers
1)Instruction Register. 2)Counters 3)7F 4)Micro 5)AB+BC+CA.
6)5 7)Same 8)Characters 9)1101 10)7F
11)Billionth 12)Sequential 13)Combinational 14)Binary
15)Bits 16)Storage 17)Flip-flops 18)Ex-or 19)Routing
20)4 21)Hamming distance 22)Odd 23)Data input
24)2 25)DAC 26)Complement 27)Distributive
28)Product of sum 29)Universal 30)Encoder.
True/False
1. A finite state machine with 255 states can be implemented by using 13 flip-
flops
2. Ripple counter is another name for a asynchronous counter.
14. The CPU program counter keeps track of the time of the next program
instruction to be executed.
15. During the decoding stage the decoder in the program memory interprets
the opcode that currently resides in the instruction register.
20. In ASCII, decimal digits are represented by 8421 BCD code preceded by
011.
21. There are flip-flops with asynchronous inputs.
22. The serial in parallel out shift register can be used as serial in serial out
register.
23. Registers are addressable by programs
24. The flip-flop has two outputs, which are always the complement of each
other
25. In a k- map of four variables A, B, C and D, the term AB will cover a strip of 2
squares.
26. R-2R Ladder DAC is an alternative to the binary-weighted-input DAC.
27. The complement of a product form of an expression is not equal to the sum
of the complements.
28. An inverter changes a LOW level to a HIGH level and vice versa
Answers (True/False)
1. True 2. True 3. True 4. False 5. True 6. False
7. False 8. False 9. True 10. False 11. False 12. False
13. False 14. False 15. True 16. False 17. True 18. True
19. True 20. True 21. True 22. True 23. True 24. True
25. False 26. True 27. False 28. True 29. False 30. True