Professional Documents
Culture Documents
Introduction
Phase locked loops are essential blocks in most analog mixedsignal and radio frequency (RF) applications today. Because of the complexity of PLLs, the different time constants involved (two widely-spaced time constants), and the fact that the voltage-controlled oscillator (VCO) frequency often oscillates several order of magnitude faster than the reference frequency, simulating PLLs at a transistor level presents multiple challenges and is extremely time demanding. Cadence SpectreRF Noise-aware PLL flow enables designers to efficiently and accurately predict PLL response using a non-linear model approach to capture the VCO dynamic behavior
Ref Div
fref
PFD
CP
LPF
VCO
N * fref
Out
Divide by N
Ref Div
fref
PFD
CP
LPF
VCO
N * fref
Out
Divide by N
Behavioral model based simulation approaches accelerate simulation speed, allowing designers to trade-off block characteristics and PLL performance. Cadence has developed a new non-linear model that allows designers to accurately simulate the dynamic behavior of the VCO, such as injection locking and power-supply interference.
Compute
V/ Hz
20 V/ Hz 10
V/ Hz
5 V/ Hz
V
PFD
R
CP
F
VCO
2 V/ Hz 1 V/ Hz
500 nV/ Hz 200 nV/ Hz 100 nV/ Hz 1 kHz 10 kHz 100 kHz 1 MHz 10 MHz 100 MHz
Place DUT in Testbench Start ADE and Setup Test Simulate PSS/PNOISE Automatically Generate Model
Create PLL Testbench Start ADE and Setup Test Simulate Transient Analyze Results
10
(custom veriloga)
(PPV model)
(LC tank noise injection)
(schematic) (utility for freq output and saving periods.txt for phase noise/jitter calculation) Cell: pll_bench
11
Model Overview
Noise-Aware PLL flow supports extraction and modeling of Voltage Controlled Oscillator, Phase/Frequency Detector, Charge Pump, Divider VCO Model supports Single-ended VCO outputs. Sensitivity to Tuning Voltage, Positive Power Supply, and Negative Power Supply. Phase/Frequency Detector and Charge Pump P/FD and CP are merged. . Divider model Divider noise is not extracted. The divider is merged into the VCO for faster simulation. Models are single-ended, voltage output levels Two types of models are generated CMI model will not be editable. Verilog-A model will be editable and designers will be able to extend the model themselves.
12
Why do we need nonlinear oscillator models? Oscillators are fundamentally nonlinear systems. Linear oscillator models often fail to accurately predict oscillation amplitude and phase deviations under perturbations [1]. Nonlinear oscillator models can capture the nonlinear dynamics of oscillators such as injection locking, power supply interference, cycle slipping,
13
Two main approaches are available and provide the same information: Impulse Sensitivity Function ISF ([1], [2], [3]). Perturbation Projection Vector PPV ([1], [4]). The two models are tightly related by further observing the definitions of ISF and PPV. ISF defines the phase sensitivity to state variables. PPV represents the time sensitivity to the state variables ([1], [6]). PPV is a more mathematical and precise method of describing the VCO and is valid for all classes of oscillators contrarily to ISF ([5]).
14
15
(10)
(t) is the phase deviation due to perturbation of the VCO and satisfies the nonlinear differential equation. Owing to the PPV, T1(t), oscillator phase deviations due to perturbations can be efficiently evaluated by solving the one dimensional nonlinear differential equation (1). The PPV relates the changes in the circuits nodes voltages or currents to the VCO phase.
16
[6]
17
18
Strengths of SpectreRF Noise aware PLL flow Significantly decreases simulation time compared to a traditional spice/fast spice transient approach:
Even simple PLLs can require 2-3weeks when simulating with traditional SPICE simulators. Complex PLLs can easily require 2-3 months.
19
20
21
22
Experimental data extracted from PLL test circuit available in Cadence RF kit ([8] and [9])
*Sampling refers to the number of sample points per period. To calculate the phase accurately, the transient time step is bounded as ((1/(vco frequency)) / sample points per period
23
Impact of Power Supply Noise rejection on PLL phase noise: No beat freq generated (injection noise at 10M generates spur at 10M)
24
Impact of Injection noise pulling: Spurs in phase noise spectrum are present after noise injection
25
26
Conclusions
Cadence SpectreRF Noise-aware PLL flow predicts the phase noise of a PLL-based frequency synthesizer using a simulation method that is both accurate and efficient. For each block, the phase noise is extracted and applied to a phase-domain model for the entire PLL.VCO phase noise is accurately characterized using advanced perturbation technology (PPV). Strengths of this flow (automatic calibration, greatly improved simulation time without loss of accuracy, direct plotting capability of PLL metrics) were presented. Compared to traditional approaches, experimental data confirmed a significant speed-up with comparable accuracy.
September 17, 2007
27
References
[1] Emad Hegazi, Jacob Rael, Asad Abidi. The Designers Guide to High-Purity Oscillators. Kluwer Academic Publishers, 2005 [2] Hajimiri A, Lee T H. A General Theory of Phase Noise in Electrical Oscillators. IEEE Journal of Solid-State Circuits, 1998, 33(2): 179~194 [3] Lee T H, Hajimiri A. Oscillator Phase Noise: A Tutorial. IEEE Journal of Solid-State Circuits,2002, 35(3): 326~336 [4] Demir A, Liu E W Y, and Sangiovanni-Vincentelli A L. Timedomain non Monte-Carlo noise simulation for nonlinear dynamic circuits with arbitrary excitations. IEEE Transactions for ComputerAided Design, 1996, 15(5): 493~505 [5] Vanassche P, Gielen G and Sensen W. On the Difference between Two Widely Publized Methods for Analyzing Oscillator Phase Noise Behavior. Proceeding IEEE/ACM ICCAD 2002
28
References
[6] Automated oscillator macromodelling techniques for capturing amplitude variations and injection locking , X. Lai, J. Roychowdhury , ICCAD, 2004, 687-694 [7] TP-PPV: Piecewise Nonlinear, Time-Shifted Oscillator Macromodel Extraction For Fast, Accurate PLL Simulation, X. Lai, J. Roychowdhury , ICCAD, 2006 [8] Cadence RF kit user guide version 5.2.1, February 2007 [9] Cadence RFIC design methodology kit workshop, version 5.2.1, February 2007 [10] SpectreRF Workshop Noise-Aware PLL Design Flow, MMSIM6.2, August 2007
29
30