Introduction to Semiconductor Physics Part 1: Semiconductor Basics Solid State Physics Overview

Prof. A. Mason

Band Theory and Band Diagrams Recall from physics that electron energy is quantitized; electrons of a given element can only occupy specific discrete energies, and those closest to the nucleus have the least energy and are most tightly bound to the atom. In some elements (like diamond, carbon, silicon, etc.), when many atoms are brought together to form a solid, a crystal lattice structure is created which has many unique properties (note: this is the origin of the term solid-state). In a crystal lattice, the available electron energy levels get blurred a bit and we find the discrete energy levels becomes thick bands of energy which electrons can occupy. This phenomena is shown in Figure 1.1. Band diagrams are a tool used in solid-state physics to illustrate what is going on in the outer electron shells (energy levels) of a group of atoms held together in a tightly-packed crystal structure (like a silicon wafer). Band diagram help illustrate where the outer electrons are in a given situation. Look at Figure 1.2 which shows typical band diagrams for an insulator, a conductor, and a semiconductor. All have a band at the top which is the conduction band and a band at the bottom which is the valence band. These bands represent the outermost energy levels that electrons can occupy. Generally speaking (i.e. without getting into too many details) electrons in the valence band are still tightly bound to the atom and cannot move around to other atoms in the crystal. However, electrons in the conduction band have enough energy that they can freely move throughout the crystal material thus acting as mobile charge carriers which can conduct current. (Recall that electrons try to occupy the lowest energy levels available, and an electron at a higher energy level will always move to a lower level if it is available. Just remember that electrons are happiest when they are as close as possible to the nucleus.

Another important factor in the band diagram is the energy gap, Eg, which is the energy difference between the valance and conduction bands. Because electrons can only occupy energies within the two bands, the gap between the two bands is a forbidden region called the band gap. The band gap is significant because it tells us how much energy electrons need before they will jump up to the conduction band and be available to conduct current. The band gap is a constant for each material (although it varies slightly with temperature, a fact that is exploited in a class of circuits appropriately called band gap circuits which we will discuss near the end of the semester). For Si at room temperature, Eg = 1.1eV. What is a semiconductor? In an insulating material, all of the electrons are held within the valence band, and no electrons are in the conduction band and free to move around to create currents thus an insulator. In a conducting material, the outer electrons fill the valence band but they also occupy the conduction band, so some electrons are available to move around and 1

Introduction to Semiconductor Physics

Prof. A. Mason

create currents thus a conductor. Also, in an insulator, the band gap is large meaning that an electron must gain a lot of energy to move up to the conduction band. In a conductor, these bands are much closer (i.e. the band gap is smaller) and electrons are more likely to have enough energy to change bands. A semiconductor is much like an insulator in that its outer electrons fill the valence band but do not occupy the conduction band; however, the band gap is much smaller than in an insulator. As a result, electrons can obtain enough energy to jump to the conduction band through a variety of mechanisms including ambient thermal energy (e.g. heat at room temperature). When this happens, the electrons in the conduction band can move around and the semiconductor can conduct an electrical current. Thus, a semiconductor is a material that can act as both an insulator and a conductor depending on the conditions around the material.

What is a hole? In an intrinsic (pure) semiconductor material at 0K, all of the electrons are in the valence band. When an electron gets enough energy to move up to the conduction band, it leaves behind a space that an electron can occupy. This empty space is called a hole, and the process of an electron moving from the valence band into the conduction band is called electron-hole pair generation as illustrated in Figure 1.3. This is important in electronics because a hole acts as a positive charge carrier. For example, when an electron jumps out of the valence band leaving behind a hole, the white spaces in the valence band are holes left by another electron can move into that hole (which commonly the electrons that have moved up to the conduction occurs in the presence of an electric field). Now there is a band hole left where the second electron came from and a third electron will jump into its place leaving behind another hole. And on and on, until we see this one hole move across the material. Thus, it acts just like an electron, only it has a positive charge. It might help to imagine that electrons must move to fill this hole, and electrons will move in the opposite direction from the hole, so the net current is negative of the electron current. Its a strange concept, I know, but it is very important in how circuits are modeled.

Conduction in Semiconductors
Intrinsic Carrier Concentration Silicon (Si), the primary element in sand, is the most common semiconductor. When the silicon atoms come together they form a crystal lattice structure, which is a very regular cube-like arrangement of atoms that gives Si some of the useful electrical properties that is has. Si is a group IV element and has 4 electrons in its outer shell that can be freed and shared with other atoms in the crystal lattice. When an electron (which is a negative charge carrier) is freed from the atom, it leaves behind a hole, or the absence of an electron (which acts as a positive charge carrier). Free carriers are generated when electrons have gained enough energy to escape their bonds to the atom and move from the valence band to the conduction band. This process is called electron-hole pair generation. Electron-hole pairs can be created by any mechanism which delivers sufficient energy to an electron, including absorbing energy from light (as in a photo diode) and thermal excitation (absorbing heat energy). Under normal circumstances, heat energy is the largest contributor to the creation of free carriers. Thus, the number of available free carriers is a strong function of temperature. 2

Introduction to Semiconductor Physics

Prof. A. Mason

A material is defined as intrinsic when it consists purely of one element and no outside force (like light energy) affects the number of free carrier other than heat energy. In intrinsic Si, the heat energy available at room temperature generates approximately 1.5x1010 carriers per cm3 of each type (holes and electrons) . The number of free carriers doubles for approximately every 11C increase in temperature. This number represents a very important constant (at room temperature), and we define ni = 1.5x1010 cm-3 where ni denotes the carrier concentration in intrinsic silicon at room temperature (constant for a given temperature). Dopants in Semiconductors To create active circuit devices like diodes and transistors, other elements are typically added to the semiconductor material to alter its electrical characteristics. This process is called doping, and a material that has been doped is called extrinsic. If elements with a different number of valence electrons are added to the silicon lattice, these elements are called dopants or impurities and they increase the number of free charge carriers available to conduct current. Typically, silicon is doped with elements having either 5 or 3 valence electrons (group 5 of group 3 atoms). At room temperature, there is sufficient thermal energy to ionize the impurity atoms and introduce additional free electrons or free holes depending on the type of impurity 1 . In this manner, doping has a strong effect on the electrical properties of silicon. Atoms with 5 valence electrons are said to donate their extra electrons to the silicon crystal, thus the impurity is called a donor. Commonly used donor elements are phosphorus, P, and arsenic, As. These impurities are called ntype since they introduce negatively charged carriers. When n-type dopants give up there extra electrons they become ionized, and charge neutrality is maintained since the number of extra electrons is equal to the number of ionized atoms. In a similar manner, impurities with 3 valence electrons introduce a positive charge carrier, or hole, and are called acceptors. A common acceptor in silicon device fabrication is boron, B. When silicon is doped with acceptors, the material is said to be p-type because positively charged carriers (holes) have been introduced. When p-type dopants accept free electrons they become ionized, and charge neutrality is maintained since the number of holes generated is equal to the number of ionized atoms.
n-type Donor + p-type Acceptor

P
group V element

P+
ion

electron

B
group III element

B+
ion

+
hole

free carrier

free carrier

At equilibrium, with no external influences such as light sources or applied voltages, the concentration of electrons, n0, and the concentration of holes, p0, are related by n o p o = n i2 where ni is the intrinsic carrier concentration. In an intrinsic material, no = po = ni since every free electron leave behind a hole. In an extrinsic (doped) material, no po but no po = ni2 is still true. Based on charge neutrality, for a sample doped with ND donor atoms per cm-3 and NA acceptor atoms per cm-3 we can write no + NA = po + ND which shows that the sum of the electron concentration plus the ionized acceptor atoms is equal to the sum of the hole concentration plus the ionized donor atoms. The equation assumes that all donors and acceptors are fully

Recall that atoms with four valence electrons have very tightly bound outer shells. In atoms with five electrons, the fifth electron is not as tightly bound and will easily escape the bond at room temperature to become a free carrier (leaving behind a positively charged ion). Likewise, atoms with only three valence electrons will be more stable if they ionize and take on an extra electron. Thus a group five atom provides one free carrier and a group three atom provides one hole.

Introduction to Semiconductor Physics

Prof. A. Mason

ionized, which is generally true at or above room temperature. Given the impurity concentration, the above equations can be solved simultaneously to determine electron and hole concentrations. In electronic devices, we typically add only one type of impurity within a given area to form either n-type or p-type regions. In n-type regions there are typically only donor impurities and the donor concentration is much greater than the intrinsic carrier concentration, NA=0 and ND>>ni. Under these conditions we can write nn = ND where nn is the free electron concentration in the n-type material and ND is the donor concentration (number of added impurity atoms/cm3). Since there are many extra electrons in n-type material due to donor impurities, the number of holes will be much less than in intrinsic silicon and is given by, p n = n i2 / N D where pn is the hole concentration in an n-type material and ni is the intrinsic carrier concentration in silicon. Similarly, in p-type regions we can generally assume that ND=0 and NA>>ni. In p-type regions, the concentration of positive carriers (holes), pp, will be approximately equal to the acceptor concentration, NA. pp = NA and the number of negative carriers in the p-type material, np, is given by n p = n i2 / N A Notice the use of notation, where negative charged carriers are n, positive charged carriers are p, and the subscripts denote the material, either n-type or p-type. This notation will be used throughout our discussion of pn junctions and bipolar transistors. The above relationships are only valid when ND or NA is >> ni, which will always be the case in our problems related to integrated circuit design. EXAMPLE A Si sample at room temperature is doped with 1011 As atoms/cm3. What are the equilibrium electron and hole concentrations at 300 K? SOLUTION Since the NA is zero we can write, n o p o = n i2 no + NA = po + ND no2 ND no ni2 = 0 Solving this quadratic equations results in n0 = 1.02x1011 [cm-3] and thus, p0 = ni2 / n0 = 2.25x1020 / 1.02x1011 p0 = 2.2x109 [cm-3] Notice that, since ND>ni, the results would be very similar if we assumed nn=ND=1011 cm-3, although there would be a slight error since ND>is not much greater than ni. Conductivity, Drift, and Mobility Charge carriers in a solid are in constant motion. However, this random scattering produces no net motion of electrons within the material, and therefore no net current flow. In the presence of an electric field E, electrons experience a force -qE from the field. This force will case a net drift that can generate a current density J which is described by Jx = qnnEx (n-type) Jx = qppEx (p-type) 4

Introduction to Semiconductor Physics

Prof. A. Mason

where q is the electron charge (q=1.6x10-19 C), n and p are the carrier concentrations in n- and p-type material respectively, is the carrier mobility, and the x subscript denotes the direction vector for the electric field. Notice that the current density and the electric field are in the same direction. The mobility, , is different for n- and p-type carriers, and it represents the average velocity of the carrier per unit of electric field

= <vx> / Ex
Thus the units of mobility are (cm/s)/(V/cm) = cm2/V-s. This unit can be related by conductivity, (-cm)-1, by = qnn and similarly = qpp for p-type material. Generally, one type of carrier will dominate, but the general expression for the current density is Jx = q (nn + pp) Ex = Ex Mobility is a parameter determined by a number of material properties related to band structure, and is strongly affected by impurity concentration, and temperature. Because of difference in the conduction and valence band properties, there is a significant difference in the mobility for n- and p-type materials. Although mobility is not truly a constant, it is nearly constant for the types of circuits we will cover in this class. Typical values for mobility are

n = 1360 cm2/V-s p = 480 cm2/V-s

Mobility is strongly affected by temperature; it is lower at low temperatures and at high temperatures and has its maximum value in the middle of the temperature range. Mobility is also affected by impurity concentration (i.e., the number of dopants that have been added to the semiconductor); it will decrease as the number of dopants increases. The resistance of a material to flow of current, R, is given by R = L / wt where L is the length of the material in the direction of current flow (i.e. the direction of the electric field), w and t are the cross-sectional dimensions (wt = A, where A is the area of the cross section), and is the resistivity (-cm). Resistivity is indirectly proportional to the conductance =1/ EXAMPLE If the carrier mobilities for Germanium, Ge, are n = 3900 cm2/V-s, and p = 1900 cm2/V-s, what is the resistivity of intrinsic Ge at 300 K. Assume the intrinsic carrier concentration for Ge is 2.5x1013. SOLUTION Since the material is intrinsic, n = p = ni = 2.5x1013 i = q (n + p) ni = 1.6x10-19(5800)(2.5x1013) i = 2.32x10-2 [-cm)-1 i = i-1 = 43 [-cm] Summary of Constants
k = 8.62x10-5 eV/K = 1.38x10-23 J/K, Boltzmans constant kT = 0.026 eV, at room temperature Eg = 1.1eV, band gap in Si at room temperature ni = 1.5x1010 cm-3, intrinsic carrier concentration in Si at room temperature. q=1.6x10-19 C (coulombs) Nc = 2.8x1019 cm-3 Nv = 1.04x1019 cm-3

Introduction to Semiconductor Physics Part 2: pn Junction Basics

Prof. A. Mason

Diffusion of Carriers In a pn junction, n-type impurities are added to a Si substrate adjacent to a region with p-type impurities. The difference in the two materials causes electrons to flow from the n region (where there are excess conduction band electrons) to the p region (where there are excess valence band holes). This charge transfer is a process called diffusion, where a substance in high concentration moves to where there is a lower concentration in an effort to balance out the distribution. As an example of the diffusion process, consider two rooms that are each filled with a gas of a different color, say red and blue. When a door between the two rooms is opened, the blue gas will naturally move into the room with the red gas, and the red gas will naturally flow into the room with the blue gas. In time, the two gasses will have completely mixed until the amount of gas of each color in each room is the same. That process is also called diffusion, and it is the same thing that happens when materials with different concentrations of holes and electrons come together.

p-type - +
+ +
3

- - -+

+
-

+ +
-

n-type

- - -+ -+ -+ -+
NA acceptors/cm

+ +
-

ND donors/cm donor ion and electron free carrier acceptor ion and hole free carrier

hole diffusion hole current electron diffusion electron current

Depletion Region In a pn junction, all of the carriers near the junction edge of the two materials will diffuse away leaving behind ionized impurities on both sides. Donors on the n-side will give up there extra electron and leave behind a positively charged ion (ND), and acceptors on the p-side will give up there extra holes (taking on an extra electron) and leave behind a negatively charged ion (NA). This diffusion of free carriers creates a depletion region around the junction of the two sides where no free carriers exist. Because charged ions are left behind in this region, it is also called a space charge region. The total charge on each side must be equal to maintain charge neutrality. If the depletion region has a width W, and it penetrates a distance xp into the p-type region, and xn into the n-type region then q A xp NA = q A xn ND Here A is the junction area which is the same on both sides so we can write, xpNA = xnND to maintain charge neutrality. As a result, the depletion region will extend further into the more lightly doped side of the junction, as illustrated below for the case NA > ND. As the free carries move out of the depletion region leaving behind charged particles, an electric field develops due to the separation of charges. This field is directed from the positive charge on the n-side toward the negative charge on the p-side. Free carriers in the electric field will feel the force which will create a drift current which will oppose the diffusion current. As diffusion continues, the electric field will get stronger and the drift current will increase. At some point the drift current will equal the diffusion current and an equilibrium will develop in which no net current will flow and the system will reach a stable state.
electric field

depletion region

E
n-type

p-type
3

NA acceptors/cm immobile acceptor ions (negative-charge)

- + ++ - + + - + - + +
xn
W

ND donors/cm immobile donor ions (positive-charge)

xp

Built-in Potential The electric field created by diffusion of carriers generates what is called the built-in potential of the junction which opposes the diffusion of free carriers until there is no more net movement of charge. The built in potential of an open-circuit (zero bias) junction is given by

Introduction to Semiconductor Physics

N N 0 = VT ln A 2 D n i

Prof. A. Mason

where VT = kT/q = 26mV at room temperature. Here NA and ND are assumed to be the impurity concentrations in the p- and n-type material respectively. If a reverse bias VR is also applied, then the total voltage across the junction is ( 0+VR). Notice that, if we let ND = nn and NA = pp, and we recall the equilibrium conditions that ppnp = ni2 = nnpn, then we can solve the equation above to get

pp pn

0 q0 nn = e kT = e VT np

Thus we see that the built-in potential is directly related to the impurity concentration. (See Example 2.1 below).

EXAMPLE 2.1 If a pn junction has NA = 3x1018 cm-3 on the p-side and ND = 1016 cm-3 on the n-side, calculate 0. SOLUTION

N N 0 = VT ln A 2 D n i

= 0.026 ln[(3x1018(1016)/(1.5x1010)2] = 0.845 V

Depletion Region Width The charge distribution in the depletion layer is governed by Poissons equation in one dimension

2V E qN A,D = = = 2 x x
which can also be written in the form 0 = - Emax W
where Emax is the maximum value of the electric field and W is the width of the depletion layer, W = xp + xn. Emax occurs at the junction of the n- and p-regions as shown in Figure 2.1. If the impurity concentrations are know, the depletion depth into

each side of the junction can be derived from Poissons equation and the charge neutrality equation given above (xpNA = xnND). The results of this derivation are
2 (0 + V R )N D xp = qN A (N D + N A )
1 2

2 (0 + V R )N A xn = qN D (N D + N A )

or, in a different form,

2 (0 + V R ) xp = N qN A 1 + A ND
1 2

2 (0 + V R ) xn = N qN D 1 + D NA

where VR is the reverse bias voltage and is the permittivity of Si, = 1.04x10-12 F/cm. is sometimes written as KS0, where 0 = 8.85x10-14 F/cm is the permittivity of free space and KS = 11.8 is the relative permittivity of silicon. 7

Introduction to Semiconductor Physics

Prof. A. Mason

These equations are good for reverse bias conditions, but not good for calculations under forward bias. They also assume the doping concentrations form an abrupt junction (or step junction), where the impurity concentration is equal throughout each region and changes abruptly at the junction between the n- and p-type material. There are also other types of junctions, such as the graded junction where the impurity concentration varies throughout each region and is normally lower near the junction interface and higher deeper into each region. Although in practice no junction is truly abrupt, it is usually appropriate to use this approximation unless the junction is specifically designed to be graded. The width of the entire depletion region, W = xp + xn can be expressed as
2 (0 + V R ) N D + N A W = q NDNA
1 2

Notice from the equations for xp and xn that if either ND or NA is much larger than the other, the depletion region will extend almost entirely into the lightly doped region. In this case, which is called a single-sided junction (or onesided junction), the above equations can be reduced.
2 (0 + V R ) W xp = qN A 2 (0 + V R ) W xn = qN D
1 2

for a n+p junction (highly doped n-side), ND>>NA

for a p+n junction (highly doped p-side), NA>>ND

We will apply these equations often in our analysis of analog circuits.

Figure 2.1: Charge, electric field, and junction potential in a pn junction as dictated by Poissons equation. W1 and W2 are equivalent to xp and xn, respectively. Depletion Region Capacitance 8

Introduction to Semiconductor Physics

Prof. A. Mason

Because the free carriers are separated by the depletion region, there is a junction capacitance which can be calculated. This capacitance is voltage dependant since the size of the depletion region, which separates the charge carriers, depends on the applied voltage. Under reverse bias VR, the junction capacitance can be defined as
qN A N D C j = A 2(N A + N D )
1 2

1 +V 0 R

where A is the area of the junction and VR is the applied reverse bias diode voltage. Notice that this equation is simply the standard equation for capacitance, C=A/d, where the distance between the two plates is the width of the depletion layer W. Note also that Cj/A is the capacitance per unit area which is an important parameter in diode modeling. If we define the equilibrium capacitance Cjo as the capacitance with no applied voltage (VR=0) we can write

qN A N D C jo = A 20 ( N A + N D )

Note the equation for Cj0 can be simplified if the junction is single-sided. Equations for Cj using Cj0 are given below for a step junction and a graded junction. Unless otherwise directed, we will normally assume a step junction profile. Graded junctions are discussed in more detail in the EE562 textbook.
C jo Cj = VR 1+ 0 C jo Cj = VR 3 1+ 0

(step junction)

(graded junction)

These relationships are valid for all reverse bias conditions where the diode voltage VD = -VR. They can also be used for small forward bias voltages as long as the forward bias current is low (i.e. for VD < 0/2). Note that these capacitance equations are good for small signal changes only. That is, because the capacitance depends heavily on the applied voltage, any large signal change in the voltage will cause the capacitance to change significantly. One way to manage this is to calculate the max. and min. values at the extremes of the large signal voltage swing and take the average of the values. However, this approach is limited to reverse biases or small forward biases (not more than 0) because the equations are not valid for large forward biases. For moderate to strong forward bias voltages, the depletion capacitance become negligible and the total diode capacitance is dominated by the diffusion capacitance, Cd. Cd models the effect of the extra diffusion current necessary when the forward bias increases. If the current through the junction is ID, then the diffusion capacitance can be expressed as
Cd = T ID VT

where T is the transit time of the diode, which is a specific parameter of the chosen fabrication technology. It is important to note that the diffusion capacitance is a function of the diode current and thus a function of the bias conditions of the device. Junction Breakdown All pn junctions under reverse bias will have a small reverse current flow due to the random generation of electronhole-pairs inside the depletion region and the presence of minority carriers near the depletion region edge that will be swept across the depletion region by the existing electric field. These carriers contribute to the leakage current of the junction. If a strong enough bias voltage is applied to the pn junction, the carriers acquire enough energy to start colliding with the lattice and creating new electron-hole pairs. This process is called avalanche breakdown, and it 9

Introduction to Semiconductor Physics

Prof. A. Mason

leads to a sudden increase in the reverse-bias current. It is called avalanche because the high energy carriers strike the lattice and generate other carriers that in-turn gain a lot of energy under the electric field and strike the lattice generating even more carriers in a process that avalanches and multiplies the current generated. For a step junction, the maximum electric field is at the junction of the two regions (see Figure 2.1) and is given by

Emax =
or, by substitution,

qN A

W1 =

qN D

W2

Emax

2qN A N DVR = (N A + N D )

Since we generally only care about the maximum field value under strong reverse bias conditions, this equation neglects 0 assuming that VR >> 0. It shows the basic relationship between the junction parameters and the maximum electric field. However, it is only valid for ideal step junctions, and actual fabricated junctions tend to have higher values of Emax. When Emax reaches a point, Ecrit then avalanche breakdown occurs. The reverse bias voltage at this point is called the breakdown voltage, BV. Notice that when Emax reached Ecrit, the reverse bias voltage is the breakdown voltage, and the equation above can be used to calculate BV. The breakdown voltage of a particular junction depends heavily on the dopant concentration and the methods used to fabricate the device, but typically pn junction breakdown will occur at reverse bias voltages of 20-30V. Typical values for Ecrit are 105 V/cm for N = 1015 cm-3 and 106 V/cm at N=1018 cm-3. Breakdown is not inherently destructive to the device, although avalanche current flow can get very high and needs to be limited by an external resistor to prevent excessive power dissipation. Diodes operated under reverse bias avalanche breakdown are commonly used as voltage references due to the sharp cut off in their I-V characteristics. The IV characteristics are shown later in Figure 2.3. Another type of devices, called a Zener diode, breakdown from a different process called Zener breakdown. In a Zener diode, both sides of the pn junction is heavily doped and the electric field becomes high enough (even at small reverse bias voltages) to strip away nearby valence electrons in a process called tunneling. Here, although large currents can be generated, no multiplication effect will occur as in avalanche breakdown. Zener breakdown typically occurs at voltages below 6V. Note however, that any diode operated under breakdown is commonly called a Zener, even if it is not experiencing zener breakdown. As mentioned above, real junctions tend to have higher values of Emax than that obtained from the above equation for an ideal step junction. As a result, practical junctions tend to breakdown at lower voltages than the equations predict, as much as 50% below the value calculated for an ideal step junction.

10

Introduction to Semiconductor Physics Part 3: pn Junction Current Flow

Prof. A. Mason

Biasing a Diode One of the most interesting aspects of the pn junction is its use in circuits as a diode. In a diode, under conditions of forward bias, a strong current can flow from the p region to the n region, while under the condition of reverse bias virtually no current flows making the diode very useful as a rectifier. (A rectifier is a circuit element that allows current flow in one direction only). Here we will define an external applied diode voltage VD as positive when applied from the p region [+] to the n region [-]. We also assume that the entire voltage drop across the diode appears across the depletion region (i.e. no voltage drop across the p- and n-type material). Although some voltage drop will occur across the p and n regions (when current is flowing), we assume this is negligible compared to the drop across the depletion layer. An applied voltage will change the potential barrier between the two regions which will alter the electric field in the depletion layer and, in turn, effect the various drift and diffusion currents in the diode. In addition, the energy bands are affected by the applied bias as is the width of the depletion region. Under forward bias, the potential barrier between the p and n regions will be lowered from 0 to (0 Vf) where Vf is the forward bias turn on voltage (VD = Vf). For a reverse bias, the reverse bias voltage, VR, will add to the builtin potential and the new potential barrier is (0 + VR). Notice that VD = -VR under reverse bias. The strength of the electric field is directly related to the strength of the potential barrier. Thus, under forward bias, the field is reduced while in reverse bias the field is stronger (and in the same direction as the equilibrium field). Also, a change in the electric field will alter the depletion layer width so that in forward bias it is smaller and in reverse bias it is larger than the equilibrium width. The equations above for depletion layer widths can still be used provided potential across the diode is described by (0 Vf) or (0 + VR).

+ VD p ID n

+ VD ID

ID
Vf

VD

The bending and separation of energy bands is also directly related to the potential barrier at the junction. The height of the electron energy barrier (shift in bands) is the electronic charge q times the junction potential., as shown in the figure on page 2. Thus, the bands are separated less [q(0 Vf)] in forward bias and more [q(0 + VR)] in reverse bias. Because the Fermi levels on the two sides match under equilibrium, the change in barrier potential implies a separation of the two Fermi levels as shown in Figure 2.2. Under forward bias, Efn is above Efp by qVf; for reverse bias Efp is higher than Efn by qVR. Thus, the two are separated by an energy (in eV) which is numerically equal to the applied voltage (in Volts). Diode Currents Diffusion Current As previously mentioned, there are both diffusion and drift currents at work in a diode. The diffusion current is composed of majority carriers: electrons on the n-side surmounting the potential energy barrier of the junction to diffuse to the p side, and holes on the p-side surmounting their barrier from p to n. The majority carriers in a material are those which are more common, i.e. electrons in n-type material and holes in p-type material. Similarly, we define minority carriers as those were are less common, i.e. holes on the n-side and electrons on the p-side. Notice that the band diagram curvature illustrates the potential barrier for electrons and shows the hill from n to p that electrons must climb to overcome the electric field. Similarly, if we flip the band diagram for holes (because of their opposite charge from the electron) we see the hill from p to n that holes must climb. When a forward bias is applied, the hill is lowered (to 0 VD) and we will find more electrons that have sufficient energy to diffuse from the n-side to the p-side, and the diffusion current can become quite large under forward bias. The same is true for holes on the p side. For reverse bias, the hill becomes so large (0 + VR) that virtually no electrons in the nside conduction band or holes in the p-side valence band have enough energy to surmount it. Therefore, the diffusion current is usually negligible under reverse bias conditions.

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Introduction to Semiconductor Physics

Prof. A. Mason

Drift Current The drift current is relatively unaffected by changes in the potential barrier height. This is because the drift current is limited by the number of minority carriers (p on n-side and n on p-side) that wander into the depletion region, not by the strength of the electric field. Any minority carrier that wanders into the depletion region will be swept away by the electric field, regardless of how strong the field is. The supply of minority carriers is determined by the electron-hole pairs (EHP) generated by thermal excitation. This current is also commonly called the generation current since it relies on the generation of EHP within a diffusion length of the depletion region. (The diffusion length is the average distance an electron or hole will travel before recombining with another free carrier). In special cases, like the photodiode, the rate of EHP generation can be increased by other mechanisms like optical excitation.

Figure 2.2: Diode under bias.

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Introduction to Semiconductor Physics

Prof. A. Mason

The Diode Equation The total current crossing the junction is the sum of the drift and diffusion currents. As Figure 2.2 shows, the diffusion currents for both holes and electrons are directed from p to n (although particle flows are in the opposite direction). The drift currents are directed from n to p. The net current across the junction is zero at equilibrium; the drift and diffusion currents are equal and in opposite directions. Under reverse bias, both n and p diffusion currents are negligible because of the very large barrier at the junction, and the only current is the relatively small (and essentially voltage-independent) generation current from n to p. This current is shown in Figure 2.3 which is a typical IV plot for a pn junction diode.

With zero applied voltage, the currents in a diode can be expressed as. ID = I(diff) |I(gen)| = 0 for VD= 0 Here we used the magnitude of I(gen) to emphasis that it is flowing the opposite direction of I(diff). Although we will not discuss the derivation in this class, it can be shown that an applied forward bias VD=Vf will increase the probability of carriers diffusing across the barrier by a factor of exp(Vf/VT). Thus the diffusion current can be given by its equilibrium value multiplied by exp(VD/VT). This diffusion probability is also reduced during a reverse bias VD=VR by the same factor. Since the equilibrium diffusion current is equal to I(gen) we can write

I D = I (gen)eVD

VT

I (gen)
VT

I D = I (gen) e VD I D = I S e VD

VT

where IS is the diode equilibrium generation current. As the equation shows, in forward bias the current grows exponentially, and once VD gets above a few VT, the current can be very large. When VD is negative (reverse bias), the current approaches IS, which is in the negative direction of the defined ID, and is called as the reverse saturation current (thus the use of IS). Notice that the IV characteristics in Figure 2.3 show a very nonlinear response that provides a strong current when forward biased and almost no current in reverse bias. The equilibrium generation current (or reverse saturation current) can be determined by the drift currents at equilibrium, which are determined largely by the minority carrier concentrations near the junction. Although we will not derive the result in this class, it can be shown that

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Introduction to Semiconductor Physics

D p pno Dn n po + I S = qA L Ln p

Prof. A. Mason

where D is the diffusion constant and L is the diffusion length for each carrier type, and p and n are the minority carrier concentrations on the n- and p-side respectively. Notice that the saturation current is a function of the area of the diode, A, so that we can increase the current available in a diode by increasing the cross sectional area of the device. Typical values for IS are 10-14 10-16 A. Because the minority carrier concentrations are inversely proportional to impurity concentrations on each side of the junction, we can also write
1 1 I S A N + N A D

which demonstrates that IS is directly proportional to the junction area and inversely proportional to the doping concentrations. Diode Small Signal Model The appropriate small signal model for a diode is a function of its large signal bias conditions. Under reverse bias, the diode is generally assumed to be turned off and thus act as an open circuit. Under forward bias, the diode is modeled by the parallel connection of three elements rd, Cj, and Cd. rd models the change in diode voltage, VD, as the diode current, ID, changes
VD I S e VT = V D

I 1 = D rd V D

VD

= IS

VT

VT

ID , VT

rd =

VT ID

and Cj and Cd are the junction and diffusion capacitances described above. Unless the diode currents are very small, Cd >> Cj, and the time constant of this model becomes = Cd rd = T, where T is the diode transit time. Note that here the time constant is independent of the diode current, as long as Cd >> Cj,. Physical View of a pn Junction The are many ways to form pn junction diodes in modern silicon process technologies. On of the most common approaches is shown below where we start with a p-type Si wafer, then form an n-type region called a well at the surface of he wafer (typically ~3m thick), the form a p+ layer inside the n-well (typically ~1m thick). The junction area, A, of a diode formed in this manner is dominated by the vertical line where the p+ region meets the n region. The diagram also illustrates the boundaries of the built-in depletion layer and shows that it extends further into the n-well than into the p+ region. The n+ region allows low-resistance ohmic contact to the n-well without creating a Schottky diode at the junction between the metal contact and the Si material.
contact to p-side depletion region boundaries contact to n-side

p+ n well
p-type Si wafer

n+
dielectric insulator (oxide)

pn diode junction

Summary of Constants q=1.6x10-19 C (coulombs) k = 8.62x10-5 eV/K = 1.38x10-23 J/K, Boltzmans constant. kT = 0.026 eV, at room temperature. Eg = 1.1eV, band gap in Si at room temperature. ni = 1.5x1010 cm-3, intrinsic carrier concentration in Si at room temperature. Nc = 2.8x1019 cm-3 Nv = 1.04x1019 cm-3 = 1.04x10-12 F/cm, permittivity of Si 14

Introduction to Semiconductor Physics

Prof. A. Mason

EXAMPLE 2.2 A p+n diode is doped with NA=5x1017 and ND=5x1015. (a) What is the depletion width into the n region at equilibrium? (b) What is the built-in potential? (c) What is the maximum electric field at equilibrium? (d) If the diode saturation current is 10-15, what bias is needed to generate 1mA? Is this forward or reverse bias? SOLUTION Notice that we need the solution to part (b) in part (a), so do (b) first. (b)

N N 0 = VT ln A 2 D n i
= 0.781 V

= 0.026 ln[(5x1017(5x1015)/(1.5x1010)2]

(a) At equilibrium, the junction potential is just 0, so on the n-side,

2 (0 ) W2 = N qN D 1 + D NA

2(1.04 10 -12 )(0.781) = 15 1.6 10 19 (5 1015 )1 + 5 10 5 1017

W2 = 45x10-6 [cm] = .45 [m]

(c) Since we now know W2, use

E max =

qN D

W2

Emax = -(1.6x10-19)(5x1015)(45x10-6) / (1.04x10-12) Emax = -34.6x103 [V/cm]

which is a bit lower than the typical values given in this handout, but still close enough that it seems reasonable. (d) To generate 1mA of current, we must forward bias the diode. Using this equation

I = I S eVD VT 1
solve for VD,

I VD = VT ln + 1 I S
VD = (0.026) ln(10-3/10-15 +1) VD = 0.718 V

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