FDS6982S

March 2000 PRELIMINARY

FDS6982S
Dual Notebook Power Supply N-Channel PowerTrench SyncFet
General Description
The FDS6982S is designed to replace two single SO-8 MOSFETs and Schottky diode in synchronous DC:DC power supplies that provide various peripheral voltages for notebook computers and other battery powered electronic devices. FDS6982S contains two unique 30V, N-channel, logic level, PowerTrench MOSFETs designed to maximize power conversion efficiency. The high-side switch (Q1) is designed with specific emphasis on reducing switching losses while the lowside switch (Q2) is optimized to reduce conduction losses. Q2 also includes an integrated Schottky diode using Fairchilds monolithic SyncFET technology.

Features
Q2: Optimized to minimize conduction losses Includes SyncFET Schottky body diode RDS(on) = 0.016 @ VGS = 10V RDS(on) = 0.021 @ VGS = 4.5V Q1: Optimized for low switching losses Low Gate Charge ( 8.5 nC typical) RDS(on) = 0.028 @ VGS = 10V RDS(on) = 0.035 @ VGS = 4.5V

8.6A, 30V

6.3A, 30V

D1 D1 D2 D2 S1 G1
5 6 7
Q1

4 3 2
Q2

SO-8
S2

G2

Absolute Maximum Ratings

Symbol
VDSS VGSS ID PD Drain-Source Voltage Gate-Source Voltage Drain Current

TA = 25C unless otherwise noted

Parameter

Q2
30
(Note 1a)

Q1
30 20 6.3 20 2 1.6 1 0.9 -55 to +150

Units
V V A W

- Continuous - Pulsed Power Dissipation for Dual Operation Power Dissipation for Single Operation

20 8.6 30

(Note 1a) (Note 1b) (Note 1c)

TJ, TSTG

Operating and Storage Junction Temperature Range

Thermal Characteristics
RJA RJC Thermal Resistance, Junction-to-Ambient Thermal Resistance, Junction-to-Case
(Note 1a) (Note 1)

78 40

C/W C/W

Package Marking and Ordering Information

Device Marking FDS6982S Device FDS6982S Reel Size 13 Tape width 12mm Quantity 2500 units

1999 Fairchild Semiconductor Corporation

FDS6982S Rev B(W)

FDS6982S

Electrical Characteristics
Symbol
BVDSS BVDSS TJ IDSS IGSSF IGSSR

TA = 25C unless otherwise noted

Parameter
Drain-Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate-Body Leakage, Forward

Test Conditions
VGS = 0 V, ID = 1 mA VGS = 0 V, ID = 250 uA ID = 1 mA, Referenced to 25C ID = 250 A, Referenced to 25C VDS = 24 V, VGS = 0 V VGS = 20 V, VDS = 0 V

Type Min Typ Max Units

Q2 Q1 Q2 Q1 Q2 Q1 All All 30 30 20 26 1000 1 100 -100 V mV/C A nA nA

Off Characteristics

Gate-Body Leakage, Reverse VGS = -20 V, VDS = 0 V

(Note 2)

On Characteristics
VGS(th) VGS(th) TJ RDS(on)

Gate Threshold Voltage Gate Threshold Voltage Temperature Coefficient Static Drain-Source On-Resistance

ID(on) gFS

On-State Drain Current Forward Transconductance

VDS = VGS, ID = 1 mA VDS = VGS, ID = 250 A ID = 1 mA, Referenced to 25C ID = 250 A, Referenced to 25C VGS = 10 V, ID = 8.6 A VGS = 10 V, ID = 8.6 A, TJ = 125C VGS = 4.5 V, ID = 7.5 A VGS = 10 V, ID = 6.3 A VGS = 10 V, ID = 6.3 A, TJ = 125C VGS = 4.5 V, ID = 5.6 A VGS = 10 V, VDS = 5 V VDS = 5 V, ID = 8.6 A VDS = 5 V, ID = 6.3 A VDS = 10 V, VGS = 0 V, f = 1.0 MHz

Q2 Q1 Q2 Q1 Q2

1 1 -3.5 -5 0.013 0.020 0.017 0.021 0.038 0.028 30 20 38 18 2040 815 615 186 216 66

3 3

V mV/C

Q1

0.016 0.027 0.021 0.028 0.047 0.035

Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1

A S

Dynamic Characteristics
Ciss Coss Crss Input Capacitance Output Capacitance Reverse Transfer Capacitance pF pF pF

FDS6982S Rev B (W)

Electrical Characteristics
Symbol Parameter

(continued)

TA = 25C unless otherwise noted

Test Conditions
(Note 2)

Type Min

Typ

Max Units

Switching Characteristics
td(on) tr td(off) tf Qg Qgs Qgd Turn-On Delay Time Turn-On Rise Time Turn-Off Delay Time Turn-Off Fall Time Total Gate Charge Gate-Source Charge Gate-Drain Charge

VDD = 15 V, ID = 1 A, VGS = 10V, RGEN = 6

Q2 VDS = 15 V, ID = 11.5 A, VGS = 5 V Q1 VDS = 15 V, ID = 6.3 A,VGS = 5 V

Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q2 Q2 Q1

10 10 10 14 34 21 14 7 17.5 8.5 6.3 2.4 5.4 3.1

18 18 18 25 55 34 23 14 26 12

ns ns ns ns nC nC nC

DrainSource Diode Characteristics and Maximum Ratings

IS tRR QRR VSD Maximum Continuous Drain-Source Diode Forward Current IF = 11.5A, diF/dt = 300 A/s Reverse Recovery Charge Drain-Source Diode Forward VGS = 0 V, IS = 3 A VGS = 0 V, IS = 6 A Voltage VGS = 0 V, IS = 1.3 A Reverse Recovery Time 3.0 1.3 20 19.7 0.42 0.56 0.70 .7 1.2 A ns nC V

(Note 3) (Note 2) (Note 2) (Note 2)

Notes: 1. RJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RJC is guaranteed by design while RCA is determined by the user's board design.

a) 78/W when mounted on a 2 0.5 in pad of 2 oz copper

b) 125/W when 2 mounted on a .02 in pad of 2 oz copper

c) 135/W when mounted on a minimum pad.

Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300s, Duty Cycle < 2.0% 3. See SyncFET Schottky body diode characteristics below.

FDS6982S Rev B (W)

FDS6982S

Typical Characteristics: Q2

50 6.0V 4.5V 5.0V 30 3.5V 20 4.0V RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE VGS = 10V ID, DRAIN CURRENT (A) 40

2.5

2 VGS = 3.0V

1.5

3.5V 4.0V 4.5V 6.0V 10V

10

3.0V

0 0 0.5 1 1.5 2 2.5 VDS, DRAIN-SOURCE VOLTAGE (V)

0.5 0 10 20 30 40 50 ID, DRAIN CURRENT (A)

Figure 1. On-Region Characteristics.

Figure 2. On-Resistance Variation with Drain Current and Gate Voltage.

0.04 RDS(ON), ON-RESISTANCE (OHM)

2 RDS(ON), NORMALIZED DRAIN-SOURCE ON-RESISTANCE 1.8 1.6 1.4 1.2 1 0.8 0.6 0.4 -50 -25 0 25 50 75 100
o

ID = 11.5A VGS = 10V

ID = 11.5 A 0.035

0.03

0.025 TA = 125oC

0.02 0.015 TA = 25 C
o

125

150

0.01 2 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V)

TJ, JUNCTION TEMPERATURE ( C)

Figure 3. On-Resistance Variation with Temperature.

50 VDS = 5V ID, DRAIN CURRENT (A) 40 TA = -55 C 25 C 100o 30
o o

Figure 4. On-Resistance Variation with Gate-to-Source Voltage.

10 VGS = 0V IS, REVERSE DRAIN CURRENT (A)

TA = 100oC 25oC -55 C

o

20

0.1

10

0 1 2 3 4 5 VGS, GATE TO SOURCE VOLTAGE (V)

0.01 0 0.2 0.4 0.6 0.8 VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 5. Transfer Characteristics.

Figure 6. Body Diode Forward Voltage Variation with Source Current and Temperature.

FDS6982S Rev B (W)

FDS6982S

Typical Characteristics: Q2

10 VGS, GATE-SOURCE VOLTAGE (V) ID = 11.5A 8 CAPACITANCE (pF) 15V 6 VDS = 5V 10V

3000 2500 CISS 2000 1500 1000 COSS 500 CRSS 0 0 10 20 Qg, GATE CHARGE (nC) 30 40 0 5 10 15 20 25 30 VDS, DRAIN TO SOURCE VOLTAGE (V) f = 1MHz VGS = 0 V

Figure 7. Gate Charge Characteristics.

100 P(pk), PEAK TRANSIENT POWER (W) RDS(ON) LIMIT 100s ID, DRAIN CURRENT (A) 10 1ms 10ms 100ms 1s 10s VGS = 10V SINGLE PULSE RJA = 135oC/W TA = 25oC 0.01 0.1 1 10 100 VDS, DRAIN-SOURCE VOLTAGE (V) DC 50

Figure 8. Capacitance Characteristics.

40

SINGLE PULSE RJA = 135C/W TA = 25C

30

20

0.1

10

0 0.001

0.01

0.1

1 t1, TIME (sec)

10

100

1000

Figure 9. Maximum Safe Operating Area.

Figure 10. Single Pulse Maximum Power Dissipation.

FDS6982S Rev B (W)

FDS6982S

Typical Characteristics Q1

40 VGS = 10V 6.0V 4.5V 4.0V

2 1.8 1.6 3.5V 1.4 1.2 VGS = 3.5V 4.0V 4.5V 5.0V 6.0V 1 2.5V 0.8 0 1 2 3 4 0 10 20 ID, DRAIN CURRENT (A) 30 40 10V 3.0V

30

20

10

VDS, DRAIN-SOURCE VOLTAGE (V)

Figure 11. On-Region Characteristics.

Figure 12. On-Resistance Variation with Drain Current and Gate Voltage.
0.08

1.6

ID = 6.3A VGS = 10V

ID = 3.5A
0.06

1.4

1.2
0.04

TA = 125 C

1
0.02

0.8

TA = 25 C

0.6 -50 -25 0 25 50 75 100

o

125

150

10

TJ, JUNCTION TEMPERATURE ( C)

VGS, GATE TO SOURCE VOLTAGE (V)

Figure 13. On-Resistance Variation with Temperature.

40 VDS = 5V 30

Figure 14. On-Resistance Variation with Gate-to-Source Voltage.

100

TA = -55 C

VGS = 0V 25 C
o

125 C

10 1 0.1 0.01 TA = 125 C 25 C

o o

20

-55 C

10 0.001 0.0001 1 2 3 4 5 6 0 0.4 0.8 1.2 1.6

VGS, GATE TO SOURCE VOLTAGE (V)

VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 15. Transfer Characteristics.

Figure 16. Body Diode Forward Voltage Variation with Source Current and Temperature.

FDS6982S Rev B (W)

FDS6982S

Typical Characteristics Q1

10 ID = 6.3A 8 15V VDS = 5V 10V

1200 1000 800 f = 1MHz VGS = 0 V

6 600 4 400 2 200 0 0 4 8 Qg, GATE CHARGE (nC) 12 16 0 5 10 15

CISS

COSS CRSS

20

25

30

VDS, DRAIN TO SOURCE VOLTAGE (V)

Figure 17. Gate Charge Characteristics.

100 RDS(ON) LIMIT 10 10ms 100ms 1s 10s DC VGS = 10V SINGLE PULSE RJA = 135 C/W TA = 25 C 0.01 0.1 1 10 100 0
o o

Figure 18. Capacitance Characteristics.

30 SINGLE PULSE

100s 1ms

25 20 15 10 5

RJA = 135 C/W TA = 25 C

o

0.1

0.01

0.1

10

100

1000

VDS, DRAIN-SOURCE VOLTAGE (V)

SINGLE PULSE TIME (SEC)

Figure 19. Maximum Safe Operating Area.

Figure 20. Single Pulse Maximum Power Dissipation.

1
r(t) , NO RMALIZED EFFECTIVE TRAN SIEN T T HERMAL RESISTANCE

0.5 0.2 0.1 0.05 0.02 0.01 0.005 0.002 0.001 0.0001

D = 0.5 0.2 0.1 0.05 0.02 0.01 Single Pulse P(pk)

R JA (t) = r(t) * R JA R JA = 135C/W

t1

t2

TJ - T A = P * R JA (t) Duty Cycle, D = t1 /t2

0.001 0.01 0.1 t 1, TIME (s ec) 1 10 100 300

Figure 21. Transient Thermal Response Curve.

Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design.

FDS6982S Rev B (W)

FDS6982S

Typical Characteristics (continued)

SyncFET Schottky Body Diode Characteristics

Fairchilds SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 12 shows the reverse recovery characteristic of the FDS6982S. Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power in the device.
IDSS, REVERSE LEAKAGE CURRENT (A) 0.1

0.01

100oC

Current: 3A/div

0.001 25oC

0.0001 0 10 20 30 VDS, REVERSE VOLTAGE (V)

10nS/div

Figure 14. SyncFET body diode reverse leakage versus drain-source voltage and temperature.

Figure 12. FDS6982S SyncFET body diode reverse recovery characteristic.

For comparison purposes, Figure 13 shows the reverse recovery characteristics of the body diode of an equivalent size MOSFET produced without SyncFET (FDS6982).

Current: 3A/div

10nS/div

Figure 13. Non-SyncFET (FDS6982) body diode reverse recovery characteristic.

FDS6982S Rev B (W)

SO-8 Tape and Reel Data and Package Dimensions

SOIC(8lds) Packaging Configuration: Figure 1.0
Packaging Description:
EL ECT ROST AT IC SEN SIT IVE DEVICES
DO NO T SHI P OR STO RE N EAR ST RO NG EL ECT ROST AT IC EL ECT RO M AGN ETI C, M AG NET IC O R R ADIO ACT IVE FI ELD S

TNR D ATE PT NUMB ER PEEL STREN GTH MIN ___ __ ____ __ ___gms MAX ___ ___ ___ ___ _ gms

Antistatic Cover Tape

ESD Label

SOIC-8 parts are shipped in tape. The carrier tape is made from a dissipative (carbon filled) polycarbonate resin. The cover tape is a multilayer film (Heat Activated Adhesive in nature) primarily composed of polyester film, adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standard option are shipped with 2,500 units per 13" or 330cm diameter reel. The reels are dark blue in color and is made of polystyrene plastic (antistatic coated). Other option comes in 500 units per 7" or 177cm diameter reel. This and some other options are further described in the Packaging Information table. These full reels are individually barcode labeled and placed inside a standard intermediate box (illustrated in figure 1.0) made of recyclable corrugated brown paper. One box contains two reels maximum. And these boxes are placed inside a barcode labeled shipping box which comes in different sizes depending on the number of parts shipped.

Static Dissipative Embossed Carrier Tape

F63TNR Label Customized Label

F852 NDS 9959 F852 NDS 9959 F852 NDS 9959 F852 NDS 9959
SOIC (8lds) Packaging Information Packaging Option Packaging type Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg) Note/Comments Standard (no flow code) TNR 2,500 13" Dia 343x64x343 5,000 0.0774 0.6060 L86Z Rail/Tube 95 530x130x83 30,000 0.0774 F011 TNR 4,000 13" Dia 343x64x343 8,000 0.0774 0.9696 D84Z TNR 500 7" Dia 184x187x47 1,000 0.0774 0.1182

F852 NDS 9959

Pin 1

SOIC-8 Unit Orientation

343mm x 342mm x 64mm Standard Intermediate box ESD Label F63TNR Label sample
LOT: CBVK741B019 FSID: FDS9953A QTY: 2500 SPEC:

F63TNLabel F63TN Label ESD Label

(F63TNR)3

D/C1: D9842 D/C2:

QTY1: QTY2:

SPEC REV: CPN: N/F: F

SOIC(8lds) Tape Leader and Trailer Configuration: Figure 2.0

Carrier Tape Cover Tape

Components Trailer Tape 640mm minimum or 80 empty pockets Leader Tape 1680mm minimum or 210 empty pockets

July 1999, Rev. B

SO-8 Tape and Reel Data and Package Dimensions, continued

SOIC(8lds) Embossed Carrier Tape Configuration: Figure 3.0
T E1

P0

D0

F K0 Wc B0 E2 W

Tc A0 P1 D1

User Direction of Feed

Dimensions are in millimeter Pkg type SOIC(8lds) (12mm)

A0
6.50 +/-0.10

B0
5.30 +/-0.10

W
12.0 +/-0.3

D0
1.55 +/-0.05

D1
1.60 +/-0.10

E1
1.75 +/-0.10

E2
10.25 min

F
5.50 +/-0.05

P1
8.0 +/-0.1

P0
4.0 +/-0.1

K0
2.1 +/-0.10

T
0.450 +/0.150

Wc
9.2 +/-0.3

Tc
0.06 +/-0.02

Notes: A0, B0, and K0 dimensions are determined with respect to the EIA/Jedec RS-481 rotational and lateral movement requirements (see sketches A, B, and C).
20 deg maximum Typical component cavity center line

0.5mm maximum

B0 20 deg maximum component rotation

0.5mm maximum

Sketch A (Side or Front Sectional View)

Component Rotation

A0 Sketch B (Top View)

Typical component center line

Sketch C (Top View)

Component lateral movement

SOIC(8lds) Reel Configuration: Figure 4.0

Component Rotation

W1 Measured at Hub

Dim A Max

Dim A max

Dim N

See detail AA

7" Diameter Option

B Min Dim C See detail AA W3

Dim D min

13" Diameter Option

W2 max Measured at Hub DETAIL AA

Dimensions are in inches and millimeters

Tape Size
12mm

Reel Option
7" Dia

Dim A
7.00 177.8 13.00 330

Dim B
0.059 1.5 0.059 1.5

Dim C
512 +0.020/-0.008 13 +0.5/-0.2 512 +0.020/-0.008 13 +0.5/-0.2

Dim D
0.795 20.2 0.795 20.2

Dim N
2.165 55 7.00 178

Dim W1
0.488 +0.078/-0.000 12.4 +2/0 0.488 +0.078/-0.000 12.4 +2/0

Dim W2
0.724 18.4 0.724 18.4

Dim W3 (LSL-USL)
0.469 0.606 11.9 15.4 0.469 0.606 11.9 15.4

12mm

13" Dia

1998 Fairchild Semiconductor Corporation

July 1999, Rev. B

SO-8 Tape and Reel Data and Package Dimensions, continued

SOIC-8 (FS PKG Code S1)

1:1
Scale 1:1 on letter size paper
Dimensions shown below are in: inches [millimeters]

Part Weight per unit (gram): 0.0774

September 1998, Rev. A

TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx CoolFET CROSSVOLT E2CMOSTM FACT FACT Quiet Series FAST FASTr GTO HiSeC
DISCLAIMER

ISOPLANAR MICROWIRE POP PowerTrench QFET QS Quiet Series SuperSOT-3 SuperSOT-6 SuperSOT-8

SyncFET TinyLogic UHC VCX

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or 2. A critical component is any component of a life support device or system whose failure to perform can systems which, (a) are intended for surgical implant into be reasonably expected to cause the failure of the life the body, or (b) support or sustain life, or (c) whose support device or system, or to affect its safety or failure to perform when properly used in accordance with instructions for use provided in the labeling, can be effectiveness. reasonably expected to result in significant injury to the user. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative or In Design Definition This datasheet contains the design specifications for product development. Specifications may change in any manner without notice. This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design. This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

Preliminary

First Production

No Identification Needed

Full Production

Obsolete

Not In Production

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Rev. D