T R A Y LOGIC IN A POSITIONAL CONTROL SYSTEM ENR H.T. Mouftah, K.C. Smith and Z . G .

Vranesic Department of E l e c t r i c a l Engineering University of Toronto Toronto, Ontario, CANADA Abstract The a p p l i c a t i o n of COS/MOS i n t e g r a t e d c i r c u i t s i n t h e construction of a three- valued p o s i t i o n a l c o n t r o l system is presented. A u n i t - d i s t a n c e t e r n a r y code and t h e design o f a t e r n a r y encoder a r e given. A t e r n a r y code converter a b l e t o t r a n s l a t e t h i s u n i t - d i s t a n c e code t o t h e signed t e r n a r y code i s described. A t e r n a r y threshold l e v e l d e t e c t o r i s required t o conv e r t a noisy, slowly-changing, analog voltage i n t o an abrupt d i g i t a l l o g i c change a t required threshold l e v e l s . A three- valued comparator i s constructed t o compare t h e reference s i g n a l with t h e one fed back, an and t o s u p p l ~ e r r o r s i g n a l . The l o g i c d e s i m of t h e terna;; c o n t r o l c i r c u i t i s a l s o p r e s e n t e d . 1. Introduction give t h e p o s i t i o n of t h e motor s h a f t a s a t e r n a r y number. Thus, t h e outputs of t h e c e l l s provide a c o n t i ~ o u s n d i c a t i o n of t h e t e r n a r y number r e p r e s e n t i i n t t h e s h a f t p o s i t i o n as t h e s h a f t r o t a t e s . To e l i m i n a t e ambiguity i n t h e encoder a u n i t d i s t a n c e code must be used. In t h i s code t h e repres e n t a t i o n o f two consecutive numbers i s d i f f e r e n t i n only one p o s i t i o n . Furthermore, it i s c r i t i c a l (when chosing a s u i t a b l e u n i t - d i s t a n c e code) t h a t t h e output of t h e transducer cannot pass from s t a t e -1 t o s t a t e +1 without passing through s t a t e ol, otherwise an ambiguity o f d e t e c t e d s t a t e s i s p o s s i b l e . Table I shows t h e proposed u n i t - d i s t a n c e t e r n a r y code. 4. 'The Ternary Threshold Level Detector

In d i g i t a l process c o n t r o l t h e required outputs are basically ternary, e.g., for a d i g i t a l shaft servo t h r e e commands a r e needed: no e r r o r , remain i n p o s i t i o n ; counter- clockwise e r r o r , r o t a t e clockwise; and clockwise e r r o r , r o t a t e counter- clockwise. For t h i s and o t h e r reasons, three- valued l o g i c may be applied i n t h e design of c o n t r o l systems with reduct i o n of c i r c u i t complexity. Though t h i s f a c t has been r e a l i z e d , few attempts have been made i n t h i s d i r e c tion'-3. In t h i s paper, t h e a p p l i c a t i o n of COS/MOS i n t e grated c i r c u i t s i n t h e c o n s t r u c t i o n of a three- valued p o s i t i o n a l c o n t r o l system i s presented. A s u i t a b l e u n i t - d i s t a n c e code and t h e l o g i c a l design f o r t h e necessary code conversion i s g i v e n . The design of a t e r n a r y comparator a s well a s a t e r n a r y c o n t r o l c i r c u i t a r e discussed.
2.

The function of t h e threshold level d e t e c t o r i s t o convert a slowly changing analog voltage i n t o an abrupt d i g i t a l l o g i c change a t the required threshold l e v e l s . Since s i g n a l s taken from t h e encoder photoe l e c t r i c c e l l s may be noisy and have slow t r a n s i t i o n times, a t e r n a r y d e t e c t o r i s required a t t h e output of each p h o t o - e l e c t r i c c e l l . The d e t e c t o r i s designed t o supply an output r e l a t e d t o t h e input s i g n a l a s shown i n Figure 2 . The function of t h e t e r n a r y d e t e c t o r may be e a s i l y r e a l i z e d by cascading two ST1 c i r c u i t s as shown i n Figure 3 . The output Q i s given by:

where VDD > VUT > VLT > VSS,

VDD i s t h e d r a i n v o l t a g e (+4V),
~

Ternary P o s i t i o n a l Control System

The system i s composed of a servo motor with a shaft-mounted encoder which t r a n s l a t e s angular s h a f t p o s i t i o n i n t o d i g i t a l s i g n a l s by means of a photoe l e c t r i c system. A t e r n a r y threshold l e v e l d e t e c t o r accepts t h e s e s i g n a l s and s u p p l i e s them t o a code converter which feeds one i n p u t of a t e r n a r y comparat o r . The second input of t h e comparator i s a r e f e r ence s i g n a l representing t h e p o s i t i o n r e q u i r e d by t h e system. A t e r n a r y c o n t r o l c i r c u i t takes t h e output from t h e comparator and c o n t r o l s t h e servo motor. This i s represented i n Figure 1. Ternary elements used i n t h i s study a r e based on t h e operators given i n r e f e r e n c e s 4 and 5. Their d e f i n i t i o n s a r e l i s t e d i n t h e Appendix. The t h r e e s t a t e s -1, 0 and +1, a r e p h y s i c a l l y represented by - 4, 0 and +4 v o l t s i g n a l s , r e s p e c t i v e l y .
3.

VSS i s t h e source v o l t a g e [-4V1,

VUT and VLT a r e t h e upper and lower threshold

values. This c i r c u i t i s used a l s o a s a b u f f e r between t h e encoder and code converter.

5.

The Code Converter

The Encoder

The t e r n a r y encoder proposed here i s a simple o p t i c a l encoder with d i r e c t transmission. I t i s composed p r i n c i p a l l y of a disk having t h r e e l e v e l s : Opaque, p a r t i a l l y opaque and t r a n s p a r e n t . Reading i s r e a l i z e d by means of p h o t o - e l e c t r i c c e l l s coupled t o t e r n a r y d e t e c t o r s . Each t r a c k on t h e disk has one p h o t o - e l e c t r i c c e l l which i s coupled t o one t e r n a r y d e t e c t o r . The p o s i t i o n of t h e s h a f t with reference t o t h e r a d i a l l i n e containing t h e p h o t o c e l l s is read by p r o j e c t i n g a beam of l i g h t a t t h e p h o t o c e l l s . This passes through t h e disk and t h e outputs of t h e c e l l s

I t i s a p p r o p r i a t e t o convert t h e encoder output s i g n a l t o a signed t e r n a r y code before passing it through t h e comparison c i r c u i t . For t h i s conversion, t h e most s i g n i f i c a n t trit xn w i l l remain a s it is and t h e next most s i g n i f i c a n t t r i t xn-1 w i l l be simply when xn-1 i s i n v e r t e d i f xn i s 0 . S i m i l a r l y , f o r x n - ~ 0 , and so on. A straightforward method t o implement t h i s funct i o n i s t o use T-gates a s t h e b a s i c elements i n t h e converter [Figure 4 ) . The T-gate function i s defined by T(a , a , a ; S) = ai where i i s -, 0 o r + when S t a k e s on t h e values of -1, 0 o r +1 r e s p e c t i v e l y . However, we should note t h a t such c i r c u i t s tend t o r e s u l t i n r a t h e r complex configurations. The code converter proposed here i s considerably simpler. I t has a t e r n a r y code converter c e l l [TCCC) a s t h e e s s e n t i a l element. This i s composed of one ST1 c i r c u i t and two t e r n a r y switches (TS) connect e d as shown i n Figure 5b. The TS, which i s shown i n

- o +

Figure S a . , w i l l be a s h o r t c i r c u i t i f i t s c o n t r o l v o l t a g e VC i s p o s i t i v e (+4 v o l t s ) and open c i r c u i t i f VC i s negative (- 4 v o l t s ) . The c i r c u i t diagram o f t h i s TS was presented i n reference 5 . The u n i t - d i s t a n c e t o signed t e r n a r y code converter i s composed of t h e TCCC and t h e Jo(X) o p e r a t o r s connected i n a t r i a n g u l a r a r r a y form a s shown i n Figure 6 . The number of TCCC c i r c u i t s (N) necessary t o convert n t r i t s of u n i t d i s t a n c e code i s given by: n-1

7.

The Ternary Control C i r c u i t

Although t h i s number i s equal t o t h e number o f T-gates necessary t o convert t h e same t e r n a r y number using t h e converter of Figure 4 , t h e c o n s t r u c t i o n of t h e TCCC i t s e l f i s much simpler than t h a t of t h e T- gate. 6. Three-valued Comparator

The s i g n a l coming from t h e feedback path and r e p r e s e n t i n g t h e present s h a f t p o s i t i o n has t o be compared with a r e f e r e n c e s i g n a l r e p r e s e n t i n g t h e required s h a f t p o s i t i o n . The comparator compares t h e s e two s i g n a l s and determines which i s l a r g e r , thus determining t h e d i r e c t i o n of t h e c o r r e c t i v e r o t a t i o n t o cancel t h e e r r o r . A t e r n a r y comparator u n i t (TCU), a b l e t o compare two t r i t s x and y, i s given i n Figure 7a. I t i s composed of a T-gate, NTI, STI, PTI, Forward diode and r e v e r s e diode connected a s shown. The output C i s equal t o +1 i f x z y, 0 i f x = y and - 1 i f x < y . Performance of t h e T U i s described by t h e t r u t h t a b l e C shown i n Figure 7b. I t has t o be noted t h a t t h e t h r e e types of t e r n a r y i n v e r t e r s forming t h e T U h i l l be C p r a c t i c a l l g s u b s t i t u t e d by only one COS/MOS t e r n a r y inverter4- . To compare two t e r n a r y numbers, each composed of n t r i t s , i t is necessary t o have n TCU's t o compare each t r i t s e p a r a t e l y and n-1 T-gates t o determine which output o f t h e n TCU's w i l l be taken a s t h e e r r o r s i g n a l . The TCU,, which compares t h e two most s i g n i f i c a n t t r i t s , w i l l give t h e e r r o r s i g n a l i f i t s output i s +1 o r -1. I f i t s output i s equal t o 0 t h e output of TCUn- w i l l be taken a s t h e e r r o r s i g n a l ( i f i t i s +1 o r -1f. Again i f t h e l a t t e r i s equal t o 0 t h e output of TCUn_2 w i l l be taken under t h e same condit i o n s , and so on. An example of a 4 - t r i t comparator i s given i n Figure 8. Note t h a t t h e t e r n a r y comparat o r gives only t h e d i r e c t i o n of t h e c o r r e c t i n g r o t a t i o n . I t can be s u b s t i t u t e d by a f u l l t e r n a r y s u b t r a c t o r t o supply varying magnitudes of t h e e r r o r s i g n a l . In t h i s case o t h e r c i r c u i t s a r e required f o r proper o p e r a t i o n , such as s t a b i l i z i n g c i r c u i t s , which make t h e system more complex and c o s t l y . To guarantee c o r r e c t operation of t h e c i r c u i t it i s necessary t o synchronize input and output s i g n a l s of t h e proposed t e r n a r y comparator. An a d d i t i o n a l simple c i r c u i t i s used. The c o n t r o l p u l s e (low t o high) r e q u i r e d f o r e n t e r i n g t h e reference s i g n a l R t o t h e comparator may be i n v e r t e d through a delay element which c o n t r o l s a TS i n s e r t e d i n t h e output of t h e comparator. The delay element i s introduced t o t h e c i r c u i t by means of a t e r n a r y monostable composed e s s e n t i a l l y of two crosscoupled T O g a t e s ( a s shown NR i n Figure 9 ) . The delay time of t h e added element must be g r e a t e r than t h e t o t a l delay time f o r a s i g n a l t o propagate from TCU(4) t o TCU(1). The output o f t h e t e r n a r y comparator w i l l be blocked only while t h e r e f e r e n c e s i g n a l R i s e n t e r i n g and f o r a period equal t o t h e propagation delay time of t h e added delay element.

The e r r o r s i g n a l taken from t h e t e r n a r y comparator d r i v e s t h e t e r n a r y c o n t r o l c i r c u i t which gives t h e necessary c o n t r o l s i g n a l s t o t h e servo motor. The block diagram of t h e t e r n a r y c o n t r o l c i r c u i t i s given i n Figure 10. I t i s composed of two NTI c i r c u i t s , two PTI c i r c u i t s and one ST1 c i r c u i t d r i v i n g two p a i r s of complementary d i s c r e t e b i p o l a r t r a n s i s t o r s T1 - T4. Taking advantage of t h e c o n s t r u c t i o n of t h e t e r n a r y COS/MOS i n v e r t e r 5 . t h e f i v e t e r n a r v i n v e r t e r s shown i n Figure 10 can be replaced by only t h r e e . The NTI(1) and PTI(1) can be replaced by only one t e r n a r y i n v e r t e r ; t h e NTI(2) and t h e PTI(2) by a second one. The schematic diagram of t h i s c o n t r o l c i r c u i t may then be reduced t o t h e c i r c u i t o f Figure 11. When t h e e r r o r s i g n a l E i s 0 , t h e P and N channel t r a n s i s t o r s o f Q1 and Q2 a r e on and p o i n t s A1 and A2 a r e a t +4V; B 1 and B2 a t -4V; thus t h e f o u r t r a n s i s t o r s T1 - Ts w i l l be off and t h e servo motor w i l l not r o t a t e i n e i t h e r d i r e c t i o n . I f E becomes +l t h e N channel t r a n s i s t o r of Q1 and P channel of Q 2 w i l l b e on, making t r a n s i s t o r s T1 and T1, on while T2 and Tg w i l l be o f f . In t h i s case C, w i l l be p o s i t i v e with r e s p e c t t o C 2 and t h e servo motor w i l l have a c o n t r o l s i g n a l t o r o t a t e clockwise. If E becomes -1 t h e o p p o s i t e case w i l l be reached. I n t h i s case t r a n s i s t o r s T2 and T3 w i l l be on while TI and T,, w i l l be off making C1 n e g a t i v e with r e s p e c t t o Cp and t h e servo motor w i l l have a c o n t r o l s i g n a l t o r o t a t e counter-clockwise.
8.

Conclusion

The a p p l i c a t i o n of COS/MOS i n t e g r a t e d c i r c u i t s i n t h e c o n s t r u c t i o n of t h e three- valued p o s i t i o n a l c o n t r o l system i s shown t o be f e a s i b l e . This system r e a l i z a t i o n i s simpler than t h e corresponding b i n a r y one, with apparent economic advantages. However, p r e c i s i o n and s t a b i l i t y were not included i n t h i s study and f u r t h e r research i n t h i s d i r e c t i o n i s recommended. References
1.

G . Bauchet and S. T h e l l i e z , " N o t e s u r un a s s e r vissement t e r n a i r e de p o s i t i o n " , Automatisme, Tome XVI, No. 6- 7, June 1971, pp. 351-358.
C . Moraga and A. B i t t n e r , " A t e r n a r y p o s i t i o n automatic c o n t r o l system", Conference Record of t h e 1973 I n t e r n a t i o n a l Symposium on Multiple-valued Logic, pp. 137-155.

2.

3.

A. Pugh, "A p o s i t i o n i n g system using three- valued codes", Rad. and Electron. Eng., Vol. 36, October 1968, pp. 219-224.

4.

H.T. Mouftah, "A study on t h e implementation of three- valued logic" , i n t h e s e proceedings. H.T. Mouftah, and I.B. Jordan, " Integrated c i r c u i t s f o r t e r n a r y logic" , Proceedings o f t h e 1974 I n t e r n a t i o n a l Symposium on Multiple- valued Logic, pp. 285-302.
K . G . H i l t o n , "A d i g i t a l remote p o s i t i o n control" , E l e c t r o n . Engng., Vol. 31, September 1959, pp. 512-519.

5.

6.

7.

" C O Handbook", Motorola, I n c . , 1974 MMS "COS/MOS I n t e g r a t e d C i r c u i t s Manual", RCA S o l i d S t a t e Division Technical S e r i e s CMS-271. Appendix

8.

The three- valued o p e r a t o r s used i n t h i s paper a r e f i v e unary o p e r a t o r s : t h e simple t e r n a r y i n v e r t e r (STI), t h e p o s i t i v e t e r n a r y i n v e r t e r (PTI), t h e negat i v e t e r n a r y i n v e r t e r (NTI), t h e forward diode (FD) , t h e r e v e r s e diode (RD); t h e two m u l t i p l e input operat o r s : t h e t e r n a r y NAND (WAND) and t h e t e r n a r y NOR (TNOR) . They a r e defined a s follows:

F'T1,NTI

i f x f i

i f x = i

where i t a k e s on t h e value +1 f o r t h e PTI and - 1 f o r t h e NTI o p e r a t o r . The minus s i g n i n t h e s e two equations represents a r i t h m e t i c negation.

D where i can be +1 o r - 1, K+l r e p r e s e n t s t h e F operat o r ( - ) and K1 t h e RD operator C r ) . . TAD NN

Z

(x

. y)O= MIN(x,y)O

T O E (x + y)O= MAX(x,y)Q NR C i r c u i t s f o r t h e s e operators a s well a s o t h e r functional building blocks described i n t h i s paper have been presented i n reference 5 . These c i r c u i t s were designed with commercially a v a i l a b l e COS/MOS i n t e g r a t e d c i r c u i t packages, namely t h e CD4007 and t h e CD4016.

Signed Ternary Code Decimal

X3
X2
X,

Unit-Distance Ternary Code

X3'
X2'
X I '

-4 -3
-2

-1 -1 -1 0 0 0
+1

-1
0
+1

0
0

+1 +I +1
0

+l 0 -1 -1

0 0
0

0 0 0 0
0 0

-1
0

-1 0
+1 -1
0
+l

0
0

0 0

0
+l +1 0 -1 -1
0

+1
+2

0
0 0 +1 +1
+1

-1
-1

+3 +4
+5

+1 +1 -1
-1

0 +1 +I
+1

-1

-1 0
+1

-1 -1 -1 0

+6
+7

-1 0

+1 +1

+8

+1

-1

+1

+9
+10 +11 +12 +13 Table I :

+
+1 +1

l
0

o
+1

o
+1 -1 0 +1

+
+1 +1 +1 +1

l
0

o
+1

o
-1 -1 0 +1

+1
+1

+1 +1

+1
+1

A u n i t - d i s t a n c e t e r n a r y code

servo motor

encoder control circuit

3 - threshold level detector

4 - code converter
6

5 - comparator

Figure 1 Ternary positional control system

Figure 2 Input-output wave forms of a ternary threshold level detector

Figure 3 Two cascaded ST1 as ternary threshold level detector

Figure 4 The unit-distance t o signed ternary code converter designed with T-gates

(a)
Figure 5

(b)

(a) (b)

Symbolic diagram of a ternary switch (TS)

Block diagram o f a ternary code converter c e l l (TCCC)

xn

Xn- 1

Ih-2
Figure 6 The u n i t - d i s t a n c e t o s i g n e d t e r n a r y c o d e c o n v e r t e r

xn-s

--

output C

(a) (b)

The t e r n a r y c o m p a r a t o r u n i t (TCU)
T r u t h t a b l e f o r o p e r a t i o n o f t h e TCII Figure 7

R4

x4 --C

--TCU
(4)

4 - t r i t t e r n a r y comparator Figure8

+n l
-I

i n p u t clock pulse comparator output control circuit input

Figure 9 Synchronizing c i r c u i t

F i g u r e 10 Block diagram of t h e t e r n a r y c o n t r o l c i r c u i t

Figure 11 Schematic diagram of t h e t e r n a r y c o n t r o l c i r c u i t