Agenda

Abstract Introduction Previous system Present system Required tools Block diagram Application conclusion Reference

Abstract
Serial communication is a very useful feature in any project that you like to design. Serial means that you can send multiple bits of data over a SINGLE line.1 line can send many bits. This reduces the complexity of a design If you want to communicate to a computer, FPGA, another device like a microcontroller or even interface to a digital to analog converter.

Introduction..
In the year 1980 Uart is introduced by mc gram hill Berkeley California U.S.A

A universal asynchronous receiver/transmitter, abbreviated UART

A piece of computer hardware that translates data between parallel and serial UART is the micro chip

 Commonly used in conjunction with communication

standards such as RS-232, RS-422, RS-485 .

The uart take bytes of a data and transmits the individual bits in a sequential fashion at the destination.
A second uart re-assembles the bits into complete bytes .

A shift register which is the fundamental method of conversion between serial and parallel forms.

Previous system.
A uart is a usually an individual IC used for serial communication over a computer This is serial communication this is the one of the draw back

Why use a UART?

A UART may be used High speed is required An inexpensive communication link between two devices is required

UART communication is cheap

Differences.
Synchronous It is a direct communication, ware the communication are time synchronized. It will have frame this frame will consists of large amount of data. Asynchronous It is an indirect communication. It requires start and stop bits for which large amount of space is waste.

Present system..
PC serial port is a UART!
Serializes data to be sent over serial cable De-serializes received data
Serial Port

Serial Cable

Serial Port

Serial Cable

Device

Transmitter
Transmission operation is simpler since it is under the control of the transmitting system. the UART hardware generates a start bit, shifts the required number of data bits.
Since transmission of a single character may take a long time relative to CPU speeds. Since full-duplex operation requires sent and received at the same time.

UART Transmission Example

Send the ASCII letter W (1010111)
Line idling
Mark 1 Space Line idling again 7 data bits Least significant bit first 1 1 0 1 0 1 0

Start bit

Parity bit
(odd parity)

Stop bit

The Shift Register

Make it a 9-bit register. Have it load 0 for the start bit on the right (LSB). Have it load 7 data bits in the middle. Have it load the parity bit on the left (MSB). Have it shift 1 into the left so a stop bit is sent at the end. When it resets. Have it load all 1s so that its default output is a 1 (line idle value)
0 1 P D6 D5 D4 D3 D2 D1 D0 0 Shift Register Dout

Receiver
All operations of the UART hardware are controlled by a clock signal The receiver tests the state of the incoming signal on each clock pulse, looking for the beginning of the start bit.
If the apparent start bit lasts at least one-half of the bit time, Inserted between the receiver and shift register and host system interface

Block diagram

FIFO transmitter its transmit the bits one by one FIFO receiver its receive the bits in normal mode Register control is a temporary device , transmit and receive data from the cpu

7-bit Parity Generator in Verilog

module parity_gen (data, oddeven, parity); input [6:0] data; input oddeven; output parity; assign parity = (^data) ^ oddeven; end module
Reduction XOR operator

Differences b/w VHDL & Verilog VHDL VERILOG

It is similar to It is similar to the cAda(soft ware language. discription language) It is easy to learn It is difficult to learn than VHDL than verilog

A Uart usually contains the following components

Clock generator usually a multiple of the bit Input and output register Transmit and receive control Read and write control logic Transmit and receive buffer Parallel data bus buffer FIFO buffer memory

Features
Dual channel version. Advanced CMOS low power technology . Programmable serial interface characteristics for each channel.

16 byte FIFO for receiver as well as for trans miter.

Application
Transmitting and receiving UARTs must be set for the same bit speed, character length, parity, and stop bits for proper operation. The receiving Some very low-cost Since the CPU timing was critical Home computers or embedded systems dispensed with a uart Higher data throughput Larger FIFOs Automatic flow controllers

TOOLS
SOFT WARES Xilinx. Mentor graphic tools(model sim). Micro wind.

CONCLUSION
Serial communication is need for long distance And chief than the parallel communication Parallel communication is used for small distance , so we are prefering serial communication. SO serial communication is very usefull in future.

References

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