Chapter 10 High- Frequency and HighPower Devices

Objectives :
1. Concept of Degenerate S/C

2. Understanding of Tunneling Effects ,Transit

Time effects 3. Concept of Negative Resistance 4. Understanding of SCRs 5. Description of IGFET

Three most commonly conductance devices are

used

negative

(i) Esaki or Tunnel Diode, which depend on quantum mechanical tunneling (ii) Transit Time diodes, which depend on combination of carrier injection and transit-time effects (iii)Gunn diodes, which depend on the transfer of electrons from a high-mobility state to low mobility state.
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Degenerate S/C :

If the conduction-band electron concentration n exceeds the effective density of states Nc, the Fermi Level is no longer with in the band gap, but lies within the conduction band. When this occurs, the material is called degenerate n-type. Here the region between Ec and EF is mostly filled by electrons The analogous case of degenerate p-type material occurs when the acceptor concentration is very high and the Fermi level lies in the valance band. Here the region between Ev and EF is almost completely filled with holes.
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Tunnel Diode : The tunnel diode is a p-n junction device that operates in certain regions of its I-V characteristics by the quantum mechanical tunneling of electrons through the potential barrier of the junction. Tunnel diode exhibits the important feature of negative resistance over a portion of its I-V characteristics L.Esaki received Noble Prize in 1973 for discovering this effect
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In fig.d tunneling current decreases with increase in bias giving dV/dI negative
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For forward bias more than negative resistance region the current begins to increase. The forward current now is dominated by diffusion current
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Peak tunneling current IP

Type-n negative resistance or voltage controlled negative resistance

Valley current IV

IP/IV is called figure of merit for tunnel diode VP/Vf is the measure of voltage between the two positive resistance regions

IMPATT DIODE: This device operates by a combination of carrier injection and transit-time effects.
The device consists of two regions: 1. n+p region , at which avalanche multiplication occurs. 2. Intrinsic i region, through which generated holes must drift in moving to the p+ contact. 3. Similar devices can be built in the p+-n-i-n+ configuration, in which electrons resulting from avalanche multiplication drift through the I region, taking advantage of the higher mobility of electrons compared with holes
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The negative conductance occurs because of two processes, causing the current to lag behind the voltage in time 1. A delay due to the avalanche process 11 2. A further delay due to the transit time of the carriers across the drift region

If the length of the drift region will be chosen such a way that the transit time will be one-half of the oscillation period then the pulses of holes is collected at the p+ contact just as the voltage cycle is completed, and the cycle repeats itself,
L vd 1 1 2 f

vd 2L

Ex: vd=107cm/s for Si , i=5m then f=1010Hz f is the operating frequency and vd is the drift velocity for holes In IMPATT diode the optimum frequency is one-half the inverse transit time vd/L 12

The GUNN diode: This device is operated by the transferred-electron mechanism. In transferred-electron mechanism, the conduction electrons of some S/C are shifted from a state of high mobility to a state of low mobility by the influence of a strong electric field. In normal n- GaAs the valance band is filled and the central valley of the conduction band normally contains electrons and there is a set of subsidiary minima at L (satellite valley) at higher energy (many kT above) are normally occupied
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1.

At central valley upto a critical value of the applied field the velocity of the electrons will increase . 2. Beyond this field (3000V) the electrons will start to jump to the satellite valley, where the effective mass is 8 times higher because of less dE/dK curvature at satellite valley. As the effective mass is very high then velocity decreases with increase of electric field. 3. Further increase in field will shift more number of electrons from central valley to the satellite valley. 4. Beyond a certain value of electric field velocity of the satellite valley electrons will increase. 5. The negative conductivity effect depends only on the bulk properties of the S/C and not on junction or surface effects. It is therefore called bulk negative differential conductivity.
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The negative resistance due to electron transfer occurs at a higher field for InP, and the electrons achieve a higher peak velocity before transfer.
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Formation and Drift of Space Charge Domains

It can be seen from the continuity equation that a localized space charge dies out exponentially with time in a homogeneous sample with positive conductivity. If the initial space charge is Q0 , the instantaneous charge is

Q(t ) Q0 e t / d

where d=/ is called the dielectric relaxation time. Because of this process random fluctuation in carrier concentration are quickly neutralized and space charge neutrality is achieved. If d is negative instead of positive then space charge fluctuations build up exponentially in time.
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How the space-charge fluctuation build up?

1. If a small shift of electron concentration in some region of the device, a dipole layer can form. 2. In normal condition this dipole layer die out quickly 3. Under negative conductivity, the charge within the dipole and therefore local electric field builds up 4. This build-up takes place in a stream of electrons drifting from the cathode to the anode and the dipole (called domain) drifts along with the streams as it grows

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P-N-P-N Diode : It is also called semiconductor

controlled rectifier 1. It is a four layer device that effectively blocks current through two terminals until it is turned on by a small signal at third terminal 2. This device have high impedance off condition under forward bias until a switching signal is applied 3. After switching the device exhibits low impedance on condition 4. The signal required for switching can be varied externally. So the device can be used to block or pass currents at predetermined levels.
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Switching pulse 1v at j2

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Two Transistor Analogy

In this analogy 1. The collector region of the n-p-n is in common with the base of the p-n-p 2. The base of the n-p-n serves as the collector of the p-n-p. 3. The centre junction j2 serves as the collector junction for both transistors

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If 1=emitter to collector current transfer ratio for the p-n-p transistor 2=emitter to collector current transfer ratio for the n-p-n transistor

iC1 1i I C 01 i B 2 iC 2 2 i I C 02 i B1
But

iC 1 iC 2 i i ( 1 2 ) I C 01 I Co 2 i I C 01 I Co 2 i 1 ( 1 2 )
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 i is small as long as the sum 1 + 2 is small compared to unity As the sum approaches to unity the current should increase but not increase infinitely as predicted by the above equation This is because the derivation is no longer valid when 1 + 2 is unity Since both the junction are forward biased in forward conducting state both the transistors are become saturated after switching So 1 + 2 will never reach upto unity

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Amplification with BJTs

If the effect of saturation current and recombination is neglected then iC=BiEp [B=base transport factor, i.e fraction of injected holes which make it across the base to the collector] i Ep The emitter injection efficiency i En i Ep
Electron component Hole component

The value of B and to be very near to unity

BiEp iC B iE iEn iEp

Current transfer ratio

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 The emitter to-collector current transfer ratio is the product of emitter injection efficiency and the base transport factor B. At very low current (the forward blocking state) is usually dominated by recombination within the transition region of the emitter junction and value is less As the current is increased , injection across the junction begins to dominate over recombination and increases To increase B there are several mechanisms like saturation of recombination centers as the excess carrier concentration becomes large To keep 1 + 2 less than unity there is no separate mechanism in forward blocking state but current is low by the dominance of recombination within the transition 27 region of j1 and j3

Variation of with injection

Forward Blocking State :

Current through this junction is equal to the thermally generated Reverse saturation current of j2

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Triggering Mechanism:
The most common method of triggering is to apply a peak bias voltage Vp. This type of voltage triggering results in a breakdown. The breakdown mechanism commonly occurs by the combination of base-width narrowing and avalanche multiplication

Avalanche Multiplication
We have already seen that breakdown occurs in the collector junction of a transistor with iB=0 when M=1. [IC=MICO/(1 - M)] In this case Mp1+Mn2=1 [Mp is the hole multiplication factor and Mn is the electron multiplication factor]
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Base Width Narrowing As the bias v increases in the forward-blocking state, the depletion region about j2 spreads and the neutral regions on the either side (n1 and p2) becomes thinner. As the base width decreases IC increases so the value of increases. So the triggering will occur. Proper punch-through is not necessary because as 1and 2 increases total multiplication effect will also increases Once the breakdown begins , the increased numbers of carriers in n1 and p2 drive the device to the forward conducting state. As the switching proceeds, the reverse bias is lost and breakdown mechanism is no longer present Therefore base narrowing and avalanche multiplication serve only to start the switching process
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 If the forward-bias voltage is applied rapidly to the device then one mechanism will occur named as dv/dt triggering This mechanism arises because, as the depletion width of j2 increases, electrons are removed from the n1 side to the p1 side and the hole removed from the p2 side to the n2 side. This will constitute a current called displacement current. If dv/dt is large, the rate of charge removal from each side of j2 cause the current to increase significantly In terms of the junction capacitance (Cj2) of the reverse biased junction, the transient current is given by
i (t ) dC j 2 v j 2 dt C j2 dv j 2 dt v j2 dC j 2 dt
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where vj2 is the instantaneous voltage across j2

 The increase in current due to a rapid rise in voltage can cause switching well below the steady state triggering voltage Vp dv/dt rating is usually specified along with Vp for p-np-n diodes Obviously dv/dt triggering can be a disadvantage in circuits subjected to unpredictable voltage transistor

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Semiconductor Controlled Rectifier (With Gate Triggering) or Thyristor : This device is p-n-p-n
diode except that a third lead (gate) is attached to one of the base regions.

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t2 is the transit time required to inject electrons through j3 to p2 and t1 is the transit time required to pass the hole through j1 to n1. So t1 +t2 is the delay time required to establish the transistor 34 action across the entire p-n-p-n device, it is less than few micro sec

Turning Off the SCR :

The turning off the transistor from conducting state to the blocking can be accomplished by reducing the current i through the device below a critical value (holding current) required to maintain 1+ 2 =1 This condition can be achieved by applying a reverse gate voltage that will extract holes from p2 base. If the rate of hole extraction is sufficiently high to remove the transistor from saturation , then the device turns off.

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Difficulties of Turning off in SCR

1. 2. Lateral flow of current from p2 to gate The bias at the emitter will also vary with position when lateral current flows causing nonuniform biasing of j3 3. Additional bulky circuitry is needed to turn off. 4. Turn off capability can be utilized only over a limited range for a given device.

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Uses of Thyristor or SCR :

1. Light dimmer (Light intensity varies continuously from full to dark) 2. Motors and Heaters

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Insulated Gate Bipolar Transistor: This also a

SCR but can easily turned off from conducting to the blocking state by action of the gate Invented by Baliga in 1979 Other Names are : Conductivity modulated FET (COMFET), Insulated-gate transistor (IGT) , Insulated Gate Rectifier (IGR), Gain-enhanced MOSFET (GEMFET), and Bipolar FET (BiFET)

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Channel length

Base region or Drain of the DMOS device. 50m thick and low doping concentration 1014 cm-3

Here the channel length is formed by diffusion of the acceptors implanted in the same region as the n+ cathode i.e, the channel length is determined not by the lithography rather by diffusion acceptors. 39 Such a structure is known as a double-diffused MOSFET (DMOS).

Activity of n- region :
1. As the thick ness of the region is large so it can support a large blocking voltage in the off state. 2. In the on state the conductivity of this region is modulated (increased) by the electrons injected from the n+ cathode and the holes injected from the p+ anode 3. Hence the alternative name (conductivity modulated FET (COMFET). 4. The increased conductivity allows the voltage drop cross the device to be minimal in the on state

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Regions of Operations:
1. When Gate voltage is zero : n type inversion is not
formed in the p-type channel region and the n+ cathode is not shorted to the n- base the structure looks like conventional SCR. For positive anode-to-cathode bias VAK, avalanche b.d occurs at the n-p junction, while for negative VAK avalanche b.d occurs at n-p+ junction

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2. When a gate bias is applied to the DMOS gate:

For positive VAK , there is significant current flow but starts from a offset or cut-in voltage ~0.7v as like a diode. a. For small VAK upto the offset voltage, the structure looks like a DMOS in series with a p-i-n diode made up of the p+ substrate (the anode), the n- blocking region (the base), which is essentially the intrinsic region and the n+ cathode. b. The p-i-n device is forward biased so the current through the device is IA exp(qVAK/2kT)
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c.

When VAK is larger than the offset voltage the characteristics look like a MOSFET multiplied by a p-n-p bipolar junction transistor gain term. p+ substrate (anode) as emitter, the n- base , and the pchannel as collector. d. Now the current through the device is IA=(1+pnp)IMOS This is the preferred mode of operation

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 The IGBT clearly incorporates some of the best features of MOSFET and BJT. Like a MOSFET it has high input impedance and low input capacitance. On the other hand in the on state, it has low resistance and high current-handling capacity. Like a BJT or an SCR Because of these factors, and because it can turn off more easily that SCR , the IGBT is gradually becoming the power device of choice.
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 Prob:
1. A typical n-type GaAs diode with an n-type doping concentration of 2x1014 cm-3 is subjected to an electric field of 3200 V/cm. If the threshold electric field value of the device is 2800 V/cm, its overall length is 10m, and the device is operated at a frequency of 10GHz, calculate the electron drift and the current density. 2. A GaAs IMPATT diode has a drift length of 2m and a carrier drift velocity of 2x107 cm/s. Determine the drift time of the carriers and the operating frequency for this IMPATT structures

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