SAN Topologies

Module 3

2006 Hewlett-Packard Development Company, L.P. The information contained herein is subject to change without notice

Objectives
Describe these SAN topologies:
Point-to-point Arbitrated loop Switched fabric

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Point-to-point topology
Is inexpensive Uses full bandwidth Connects two devices only

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Arbitrated loop topology

Node A
NL_Port 0 Receiver
Transmitter Transmitter

Node B
NL_Port 1

Receiver

Fibre Channel hub

Node D
NL_Port 3 Receiver
Transmitter Transmitter

Node C
NL_Port 2
3

Receiver

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Arbitrated loop hubs

Provide a physical star topology for a loop configuration Complete connections between transmitters and receivers on a port-by-port basis through multiplexer circuitry Finish the loop by connecting the transmitter of the last hub port to the receiver of the first

Have bypass circuitry at each port

Enables the loop to circumvent a disabled or disconnected node

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Switched fabric topology

Node A
NL_Por t Receiver
0

NL_Ports

Node B
Transmitte r Receiver NL_Por t

Transmitte r

Node B
N_Port 1 FL_Port F_Port
Receiver
Transmitter Transmitter Receiver

FC_AL
Node D
NL_Por t Receiver
0

Fibre Channel HUB

Transmitter Receiver

Transmitte r

Node A
N_Port 0 N_Port 0
Transmitter Receiver Receiver Transmitter

Fabric
F_Port
5

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World-Wide Names
64-bit unique identifier for each Fibre Channel node Not used for routing traffic across network Used to preserve identity of a node if its FC-2 or FC-3 layer address is changed

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Loop addressing
AL_PA is assigned during the loop initialization The highest-priority port on the loop becomes loop master to manage the generation of a positional map of the loop
In a public loop, the switch has ALPA 00 and becomes master In a private loop the node with the lowest ALPA becomes master

The loop master transmits frames to identify existing nodes and allow new nodes to obtain an ALPA/LOOP_ID
In a public loop the switch looks for fabric assigned addresses (LIFA) L_Ports report their position (LIRP)

After the AL_PA bit map has returned to the loop master it contains a complete map of all the ports on the loop The loop master transmits the completed frame so that all Rev. the 6.21 HP Restricted ports on the loop can capture the completed positional

Private loop
A private loop can accommodate up to 126 NL_ports
Contains only devices which are not fabric-aware Cannot communicate with fabric devices

NL_Port NL_Port NL_Port NL_Port NL_Port

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Loop 1

Hub

Translative mode
Fabric direct attach nodes

Fabric assigned address NN NN NN

N F F N

Public loop address LL LL PP

Public loop NL NL

Private loop address

FL FL

00 00 PP
Public loop

NL

Public nodes
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Private node
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Public loop
A public loop can accommodate up to 126 NL_ports and one FL_port
The FL_port extends the number of nodes for communication

FL_Por t

FL_Por t

FL_Po rt

FL_Po rt

FL_Po rt

FL_Port To other L_Ports or F_Ports

NL_Port
NL_Port NL_Port NL_Port
Loop 1 Loop 2

NL_Port NL_Port NL_Port

HUB

HUB

NL_Port NL_Port
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Port logins
PLOGI is performed immediately after loop initialization:
Server attempts to login to all devices on the loop by issuing PLOGI frames addressed to each possible AL_PA address Targets that accept the PLOGI will return an ACC frame

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Fabric addressing B series

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Simple name server

Target discovery for an arbitrated loop is performed by PLOGI to all 126 AL_PA device addresses Name server function resides within each switch Device drivers may register values for:
24-bit address

64-bit port WWN

64-bit node WWN Class of service parameters FC-4 protocols supported Port type

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Learning check

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