WIRELESS ATM SECURITY BY GSM USING ARM 7

By
SIVASANKAR ARCHNA RAJENDER RAJASHEKAR Under The Guidance of SARDAR KHAME SINGH
ASSOCIATE PROFESSOR

10J11A04B0 10J11A0484 10J11A0487 10J11A0471

Department of Electronics and Communication Engineering Abhinav Hi-Tech College Of Engineering (Approved By AICTE New Delhi & Affiliated to JNTU Hyderabad) Gandipet, Himayath Nagar, C.B.Post, Hyderabad 500 075.

INTRODUCTION :-

1) PREVENT ATM FROM THIEF

2) Safety for ATM

COMPONENTS :LPC2148 Micro controller, GPS module GSM Modem, MAX 232, LCD Display MEMS, Power supply, ADC 0804, Relay, Smoke sensor.

Comparisons Between 8051 and ARM Processor

Execution is fast

2 Timers
2 UARTS Baud Rate is 1 lack 32 Interrupts 1 DAC 2 I2C 32kb SRAM 512kb Flash memory (PROM).

ARM Processors
Originally Acorn RISC Machines, but now called as Advanced RISC Machines.

Development started in 1985.

ARM7 TDMI was most successful ARM core. ARM7 TDMI is the ARMv4 processor.

It is the one of the RISC mechanism.

It follows van-neumann architecture

Features of ARM Processors

32 bit RISC*processor supports three stage pipelining. High Code density.( Less memory) Hardware Debug Technology.

Load store architecture.

Inline barrel shifter. Thumb 16 bit instruction set. Fixed op code width to ease decoding and pipelining

ARM Processor
ARM7 micro processor follows 4 major rules 1. INSTRUCTION SET. Most instructions are single cycle instructions. 2. Pipeline. 3 Stage pipelining 3. Registers. 37 registers(20 Banked registers) 4. Load-Store architecture. In ARM we can perform the operations using registers only

Processor Modes
7 processor modes one non-privileged mode ( user mode) six privileged modes

User mode (programs and applications)

Abort( failed attempt to access memory) Fast Interrupt request Interrupt request Supervisor ( after reset, OS kernal operation)

System(Special version of user mode)

Undefined ( undefined instruction)

Registers in ARM
ARM has 37 registers in all. 20 registers are hidden from program at different times

The user registers R0-R7 are common to all operating modes.

FIQ mode has its own R8-R14 that replace the user registers. Each of the other modes have their own R13 and R14. CPSR is common to all modes and there is an additional Saved program Status register (SPSR)

R13 is also referred to as SP, the Stack Pointer.

R14 is also referred to as LR, the Link Register. R15 is also referred to as PC, the Program Counter

Timers & Serial Communication

4 inputs (capture pins)

4 outputs (matched pins)

4 timer registers PR (Prescalar register) TC (Timer count register) TCR (Timer control register)

PC (Prescalar count register)