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EEE 531: Semiconductor Device Theory I Dragica Vasileska

PN Junctions Theory

Dragica Vasileska

Department of Electrical Engineering
Arizona State University
1. PN-Junctions: Introduction to some
general concepts
2. Current-Voltage Characteristics of an
Ideal PN-junction (Shockley model)
3. Non-Idealities in PN-Junctions
4. AC Analysis and Diode Switching

EEE 531: Semiconductor Device Theory I Dragica Vasileska
1. PN-junctions - General Consideration:
PN-junction is a two terminal device.
Based on the doping profile, PN-junctions can be
separated into two major categories:
- step junctions
- linearly-graded junctions
p-side n-side
A D
N N
p-side n-side
A D
N N
ax
Step junction Linearly-graded junction
EEE 531: Semiconductor Device Theory I Dragica Vasileska
(A) Equilibrium analysis of step junctions
(a) Built-in voltage V
bi
:






(b) Majority- minority carrier
relationship:
C
E
V
E
i
E
F
E
bi
qV
W
) (x
x
-qN
A

qN
D

) (x V
x
bi
V
) (x E
x
max
E
p
x
n
x
+
-
p-side
n-side
( ) ( )
( ) | |
| |
|
|
.
|

\
|
~
|
|
.
|

\
|
=
=
=
+ =
2 2
0 0
0
0
ln ln
exp
exp
i
D A
T
i
n p
B
bi
B F i i p
B i F i n
n
i F
p
F i bi
n
N N
V
n
n p
q
T k
V
T k E E n p
T k E E n n
E E E E qV
| |
| |
T bi n p
T bi p n
V V n n
V V p p
/ exp
/ exp
0 0
0 0
=
=
EEE 531: Semiconductor Device Theory I Dragica Vasileska
(c) Depletion region width:
Solve 1D Poisson equation using depletion charge
approximation, subject to the following boundary condi-
tions:
p-side:

n-side:
Use the continuity of the two solutions at x=0, and
charge neutrality, to obtain the expression for the depletion
region width W:


0 ) ( ) ( , ) ( , 0 ) ( = = = =
p n bi n p
x E x E V x V x V
( )
2
0
2
) (
p
s
A
p
x x
k
qN
x V +
c
=
( )
bi n
s
D
n
V x x
k
qN
x V +
c
=
2
0
2
) (
D A
bi D A s
n D p A
n p
p n
N qN
V N N k
W
x N x N
V V
W x x
) ( 2
) 0 ( ) 0 (
0
+ c
=

=
=
= +
EEE 531: Semiconductor Device Theory I Dragica Vasileska
(d) Maximum electric field:
The maximum electric field, which occurs at the
metallurgical junction, is given by:

(e) Carrier concentration variation:
) (
0 0
max
D A s
D A
x
N N k
W N qN
dx
dV
E
+ c
= =
=
10
5
10
7
10
9
10
11
10
13
10
15
0 0.5 1 1.5 2 2.5 3 3.5
n [cm
-3
]
p [cm
-3
]
C
o
n
c
e
n
t
r
a
t
i
o
n


[
c
m
-
3
]
Distance [m]
cm kV E
cm kV E
m W
cm N N
sim
DC
calc
D A
/ 93 . 8
/ 36 . 9
23 . 1
10
) max(
) max(
3 15


=
=
=
= =

EEE 531: Semiconductor Device Theory I Dragica Vasileska
cm kV E cm kV E m W
cm N N
sim DC calc
D A
/ 93 . 8 , / 36 . 9 , 23 . 1
10
) max( ) max(
3 15
= = =
= =

-10
15
-5x10
14
0
5x10
14
10
15
0 0.5 1 1.5 2 2.5 3 3.5

(
x
)
/
q


[
c
m
-
3
]
Distance [m]
-10
-8
-6
-4
-2
0
0 0.5 1 1.5 2 2.5 3 3.5
E
l
e
c
t
r
i
c

f
i
e
l
d


[
k
V
/
c
m
]
Distance [m]
EEE 531: Semiconductor Device Theory I Dragica Vasileska
cm kV E cm kV E m W
cm N cm N
sim DC calc
D A
/ 67 , / 53 . 49 , 328 . 0
10 , 10
) max( ) max(
3 18 3 16


= = =
= =

-10
17
-5x10
16
0
5x10
16
10
17
0.6 0.8 1 1.2 1.4

(
x
)
/
q


[
c
m
-
3
]
Distance [m]
-70
-60
-50
-40
-30
-20
-10
0
10
0.6 0.8 1 1.2 1.4
E
l
e
c
t
r
i
c

f
i
e
l
d


[
k
V
/
c
m
]
Distance [m]
EEE 531: Semiconductor Device Theory I Dragica Vasileska
(f) Depletion layer capacitance:
Consider a p
+
n, or one-sided junction, for which:

The depletion layer capacitance is calculated using:

( )
D
bi s
qN
V V k
W

0
2 c
=
0
2
0
) ( 2 1
) ( 2 c
=
c
= = =
s D
bi
bi
s D D c
k qN
V V
C
V V
k qN
dV
dW qN
dV
dQ
C

V V
bi

V
2
1 C
D
N
slope
1

Forward bias
Reverse
bias
Measurement setup:
W
dW
~
V
v
ac

EEE 531: Semiconductor Device Theory I Dragica Vasileska
(B) Equilibrium analysis of linearly-graded junction:
(a) Depletion layer width:
(c) Maximum electric field:
(d) Depletion layer capacitance:
Based on accurate numerical simulations, the depletion
layer capacitance can be more accurately calculated if V
bi

is replaced by the gradient voltage V
g
:

( )
3 / 1
0
12
(

c
=
qa
V V k
W
bi s

( )
3 / 1
2
0
2
12
(

c
=
V V
qak
C
bi
s

0
2
max
8 c
=
s
k
qaW
E
(

c
=
3
0
2
8
ln
3
2
i
T s
T g
qn
V k a
V V
EEE 531: Semiconductor Device Theory I Dragica Vasileska
(2) Ideal Current-Voltage Characteristics:
Assumptions:
Abrupt depletion layer approximation
Low-level injection injected minority carrier density
much smaller than the majority carrier density
No generation-recombination within the space-charge
region (SCR)
(a) Depletion layer:



C
E
V
E
Fn
E
qV
Fp
E
W
( )
( )
( )
T n n n
T p p p
T i
V V p x p
V V n x n
V V n np
/ exp ) (
/ exp ) (
/ exp
0
0
2
=
=
=
p
x
n
x
EEE 531: Semiconductor Device Theory I Dragica Vasileska
(b) Quasi-neutral regions:
Using minority carrier continuity equations, one arrives at
the following expressions for the excess hole and electron
densities in the quasi-neutral regions:



n p
T
p n
T
L x x
V V
p p
L x x
V V
n n
e e n x n
e e p x p
/ ) (
/
0
/ ) (
/
0
) 1 ( ) (
) 1 ( ) (
+

= A
= A
) (x n
p
) (x p
n
0 n
p
0 p
n
p
x
n
x
x
Forward bias
Reverse bias
Space-charge
region W
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Corresponding minority-carriers diffusion current densities
are:



n p
T
p n
T
L x x
V V
n
p n diff
n
L x x
V V
p
n p diff
p
e e
L
n qD
x J
e e
L
p qD
x J
/ ) (
/ 0
/ ) (
/ 0
) 1 ( ) (
) 1 ( ) (
+

=
=
p
x
n
x
x
diff
p
J minority
diff
n
J minority
) ( ) (
p
diff
n n
diff
p tot
x J x J J + =
No SCR generation/recombination
drift
n
diff
n
J J + majority
drift
p
diff
p
J J + majority
tot
J
Shockley model
EEE 531: Semiconductor Device Theory I Dragica Vasileska
(c) Total current density:
Total current equals the sum of the minority carrier diffu-
sion currents defined at the edges of the SCR:



Reverse saturation current I
S
:
( ) 1
) ( ) (
/ 0 0

|
|
.
|

\
|
+ =
+ =
T
V V
n
p n
p
n p
p
diff
n n
diff
p tot
e
L
n D
L
p D
qA
x I x I I
|
|
.
|

\
|
+ =
|
|
.
|

\
|
+ =
A n
n
D p
p
i
n
p n
p
n p
s
N L
D
N L
D
qAn
L
n D
L
p D
qA I
2 0 0
I
V
Ge Si GaAs
EEE 531: Semiconductor Device Theory I Dragica Vasileska
(d) Origin of the current flow:
C
E
V
E
Fn
E
qV
Fp
E
W
Forward bias:
C
E
V
E
Fn
E
qV
Fp
E
W
Reverse bias:
( ) V V q
bi

( ) V V q
bi
+
Reverse saturation current is
due to minority carriers being
collected over a distance on the
order of the diffusion length.
L
n

L
p

EEE 531: Semiconductor Device Theory I Dragica Vasileska
(e) Majority carriers current:
Consider a forward-biased diode under low-level injection
conditions:





Total hole current in the quasi-neutral regions:
) (x p
n
0 n
p
n
x
x
0 n
n
) (x n
n
~
Quasi-neutrality requires:


This leads to:

) ( ) ( x p x n
n n
A ~ A
) ( ) ( x J
D
D
x J
diff
p
p
n
diff
n
=
) ( ) ( ) ( ) ( x J x J x J x J
diff
p
drift
p
diff
p
tot
p
~ + =
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Electron drift current in the quasi-neutral region:
) (
) (
1
) ( ), ( 1 ) ( x J
x qn
x E x J
D
D
J x J
diff
n
n
diff
p
p
n
tot
diff
n

~
|
|
.
|

\
|
+ =
x
) (x J
diff
p
) (x J
diff
n
) (x J
drift
n
) ( ) ( ) ( x J x J x J
drift
n
diff
n
tot
n
+ =
tot
J
) ( ) ( x J x J
diff
p
diff
n
+
EEE 531: Semiconductor Device Theory I Dragica Vasileska
(f) Limitations of the Shockley model:
The simplified Shockley model accurately describes IV-
characteristics of Ge diodes at low current densities.
For Si and Ge diodes, one needs to take into account
several important non-ideal effects, such as:
Generation and recombination of carriers within the
depletion region.
Series resistance effects due to voltage drop in the
quasi-neutral regions.
Junction breakdown at large reverse biases due to tun-
neling and impact ionization effects.
EEE 531: Semiconductor Device Theory I Dragica Vasileska
3. Non-Idealities in PN-junctions:
(A) Generation and Recombination Currents
Continuity equation for holes:


Steady-state and no light genera-
tion process:
Space-charge region recombination current:
scr
J
p p
p
R G
x
J
q t
p
+
c
c
=
c
c 1
0 , 0 = = c c
p
G t p
}
=
}
=
}
=


n
p
n
p
n
p
x
x
p scr
x
x
p p p n p
x
x
p
dx R q J
dx R q x J x J x dJ ) ( ) ( ) (
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Reverse-bias conditions:
Concentrations n and p are negligible in the depletion
region:



Space-charge region current is actually generation current:


Total reverse-saturation current:

|
|
.
|

\
|
t +
|
|
.
|

\
|
t = t
t
=
t + t

~
T k
E E
T k
E E n
p n
n
R
B
t i
n
B
i t
p g
g
i
n p
i
exp exp ,
1 1
2

Generation lifetime
V V
W qn
J
W qn
J J
bi
g
i
gen
g
i
gen scr

t
=
t
= =
( ) ( )
gen s
V V
scr
V V
s
J J J e J J
T
T
+ + =
>
1
/
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Generation current dominates when n
i
is small, which is
always the case for Si and GaAs diodes.
I (log-scale)
V (log-scale)
s
AJ
gen
AJ
C
E
V
E
Fn
E
Fp
E
W
IV-characteristics
under reverse bias conditions
Generated carriers are
swept away from the
depletion region.
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Forward-bias conditions:
Concentrations n and p are large in the depletion region:


Condition for maximum recombination rate:



Estimate of the recombination current:

( )
( ) ( )
1 1
/ 2
/ 2
1
p p n n
e n
R e n np
n p
V V
i
V V
i
T
T
+ t + + t

= =
n p rec
V V
rec
i
n p
V V
i
V V
i
T
T
T
e
n
p n
e n
R
e n p n
t + t = t
t
=
t + t
~
= =
,
2 /
/ 2
max
2 /
T
V V
rec
i
scr
e
W qn
J
2 / max
t
=
Recombination lifetime
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Exact expression for the recombination current:


Corrections to the model:


Total forward current:


q ideality factor. Deviations of q from unity represent
an important measure for the recombination current.

( )
0
2 /
2
,
1
2
,
c

=
t
= u
t
u
=
s
bin D
np
np
T
V V
rec
i
scr
k
V V qN
E
E
V e
qn
J
T

T r
V m V
rec
i
scr
e
qn
J
/
t
u
=
( ) ( ) 1 1
/
,
/ /
=
t
u
+ =
q
T T r T
V V
eff s
V m V
rec
i
V V
s
e J e
qn
e J J
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Importance of recombination effects:
Low voltages, small n
i
recombination current dominates
Large voltages diffusion current dominates
log(I)
V
d
AJ
scr
AJ
AJ
EEE 531: Semiconductor Device Theory I Dragica Vasileska
(B) Breakdown Mechanisms
Junction breakdown can be due to:
tunneling breakdown
avalanche breakdown
One can determine which mechanism is responsible for the
breakdown based on the value of the breakdown voltage
V
BD
:
V
BD
< 4E
g
/q tunneling breakdown
V
BD
> 6E
g
/q avalanche breakdown
4E
g
/q < V
BD
< 6E
g
/q both tunneling and
avalanche mechanisms are responsible

EEE 531: Semiconductor Device Theory I Dragica Vasileska
Tunneling breakdown:
Tunneling breakdown occurs in heavily-doped pn-
junctions in which the depletion region width W is about
10 nm.
W
E
F

E
C

E
V

Zero-bias band diagram: Forward-bias band diagram:
W
E
Fn

E
C

E
V

E
Fp

EEE 531: Semiconductor Device Theory I Dragica Vasileska
E
Fn

E
C

E
V

E
F
p

Reverse-bias band diagram:
Tunneling current (obtained by
using WKB approximation):


F
cr
average electric field in
the junction
The critical voltage for
tunneling breakdown, V
BR
, is
estimated from:

With T, E
g
and I
t
.

|
|
.
|

\
|

t
=
cr
g
g
cr
t
qF
E m
E
VA F q m
I

3
2 4
exp
4
2
2 / 3 *
2 / 1 2 2
3 *
S BR t
I V I 10 ) (
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Avalanche breakdown:
Most important mechanism in junction breakdown, i.e. it
imposes an upper limit on the reverse bias for most diodes.
Impact ionization is characterized by ionization rates o
n
and
o
p
, defined as probabilities for impact ionization per unit
length, i.e. how many electron-hole pairs have been
generated per particle per unit length:


- E
i
critical energy for impact ionization to occur
- F
cr
critical electric field
- mean-free path for carriers
|
|
.
|

\
|

o
cr
i
i
F q
E
exp
EEE 531: Semiconductor Device Theory I Dragica Vasileska
E
Fn

E
C

E
V

E
F
p

Expanded view of the
depletion region
Avalanche mechanism:
Generation of the excess electron-hole
pairs is due to impact ionization.
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Description of the avalanche process:
dx J J
n n n
o +
dx
n
J
dx J J
n n p
o +
p
J
Impact ionization initiated by electrons.
dx J J
p p n
o +
dx
n
J
dx J J
p p p
o +
p
J
Impact ionization initiated by holes.
.
0 , 0
const J J J
dx
dJ
dx
dJ
dx
dJ
dx
dJ
p n
p
n
p
n
= + =

=
< >
-

Multiplication factors for
electrons and holes:
) (
) 0 (
,
) 0 (
) (
W J
J
M
J
W J
M
p
p
p
n
n
n
= =
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Breakdown voltage voltage for which the multiplication
rates M
n
and M
p
become infinite. For this purpose, one
needs to express M
n
and M
p
in terms of o
n
and o
p
:
( )
( )

}
o =
}
o =

o o =
o + o =
}
o o
}
o o
W
dx
p
p
W
dx
n
n
p p n n
p
p p n n
n
dx e
M
dx e
M
J J
dx
dJ
J J
dx
dJ
x
p n
x
p n
0
'
0
'
0
0
1
1
1
1
The breakdown condition does not depend on which
type of carrier initiated the process.
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Limiting cases:
(a) o
n
=o
p
(semiconductor with equal ionization rates):





(b) o
n
>>o
p
(impact ionization dominated by one carrier):

}
}
o
= o =
}
}
o
= o =
W
W
p
p p
p
W
W
n
n n
n
dx
M dx
M
dx
M dx
M
0
0
0
0
1
1 1
1
1
1 1
1
}
o + ~ =
}
o
W
n
dx
n
dx e M
W
n
0
1
0
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Breakdown voltages:
(a) Step p+n-junction
p
W
n
W
+
p
n
) (x F
max
F
For one sided junction we can make
the following approximation:


Voltage drop across the depletion
region on the n-side:


Maximum electric field:


Empirical expression for the
breakdown voltage V
BD
:

n p n
W W W W ~ + =
W F V W F V
BD n n max max
2
1
2
1
~ ~ =
x
2
max
0
0
max
2
F
qN
k
V
k
W qN
F
D
s
BD
s
D
c
=
c
=
(

|
.
|

\
|
|
|
.
|

\
|
~
cm
kV N
E
V
D
g
BD

16
2 / 3
10
1 . 1
60
EEE 531: Semiconductor Device Theory I Dragica Vasileska
(b) Step p+-n-n+ junction
p
W
1
W
+
p
+
n
) (x F
max
F
Extension of the n-layer large:


Extension of the n-layer small:


Final expression for the punch-
through voltage V
P
:

m BD
W F V
max
2
1
=
( )
1 1 max
2
1
2
1
W W F W F V
m m P
=
x
m
W
n
1
F
|
|
.
|

\
|
=
m m
BD P
W
W
W
W
V V
1 1
2
EEE 531: Semiconductor Device Theory I Dragica Vasileska
(4) AC-Analysis and Diode Switching
(a) Diffusion capacitance and small-signal equivalent
circuit
This is capacitance related to the change of the minority
carriers. It is important (even becomes dominant) under
forward bias conditions.
The diffusion capacitance is obtained from the device
impedance, and using the continuity equation for minority
carriers:

Applied voltages, currents and solution for Ap
n
:


p
n n
p
n
p
dx
p d
D
dt
p d
t
A

A
=
A
2
2
0 1 1 0
0 1 1 0
, ) (
, ) (
J J e J J t J
V V e V V t V
t i
t i
<< + =
<< + =
e
e


t i
n ns n
e x p x p t x p
e
+ = ) ( ) ( ) , (
1
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Equation for p
n1
(x):


Boundary conditions:



Final expression for p
n1
(x):

0
) (
0 ) (
1
2
'
1
2
1
2
1
2
1
2
= =
t
et +

p
n n
n
p p
p
n
L
x p
dx
p d
x p
D
i
dx
p d
|
|
.
|

\
|
=
|
|
.
|

\
|
+
=
= =
e
T T
n
n
T
t i
n n
n n n
V
V
V
V p
p
V
e V V
p t p
p p t p
0 1 0
1
1 0
0
1 0
exp ) 0 ( exp ) , 0 (
0 ) ( ) , (
|
|
.
|

\
|

|
|
.
|

\
|
=
'
0 1 0
1
exp exp ) , (
p T T
n
n
L
x
V
V
V
V p
t x p
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Small-signal hole current:

Low-frequency limit for the admittance Y:




RC-constant:

1
0
1 0
0
1
1
exp 1 YV
V
V
i
V L
V p AqD
dx
dp
AqD I
T
p
T p
n p
x
n
p
=
|
|
.
|

\
|
et + = =
=
p
T T
p
T p
n p
dif
T T
V V
s
T T p
n p
d
dif d p
T T p
n p
V
I
V
V
V L
p AqD
C
I
dV
dI
V
I
V
e I
V
V
V L
p AqD
G
C i G i
V
V
V L
p AqD
Y
T
t = |
.
|

\
|
t =
= = = |
.
|

\
|
=
e + =
|
.
|

\
|
et + |
.
|

\
|
=
2
1
exp
2
1
current Forward , exp
2
1
1 exp
0
0
/
0
0
0
0
0

2
p
dif d
C R
t
=
The characteristic time constant is on
the order of the minority carriers lifetime.
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Equivalent circuit model for forward bias:







Bias dependence:
depl
C
dif
C
d
d
G
R
1
=
s
R
s
L
C
a
V
dif
C
depl
C
EEE 531: Semiconductor Device Theory I Dragica Vasileska
(b) Diode switching
For switching applications, the transition from forward bias
to reverse bias must be nearly abrupt and the transit time
short.
Diode turn-on and turn-off characteristics can be obtained
from the solution of the continuity equations:
p
p p
p
p
p
p
p
p
n
p D
p p
n
Q
dt
dQ
t I t I
Q
t I
dt
dQ
p
x
J
q
R J
q dt
p d
t
+ = ~
t
=
+
t
A

c
c
V =
A
) ( ) ( ) (
1 1
1
Valid for p
+
n diode
Q
p
(t) = excess hole charge
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Diode turn-on:
For t<0, the switch is open, and
the excess hole charge is:

At t=0, the switch closes, and
we have the following boundary
condition:
0 ) 0 ( ) 0 ( = = <

p p
Q t Q
0 ) 0 ( ) 0 ( = =
+
p p
Q Q
p
+
n
t=0
I
F

(

t = + =
t t
p p
t
F p
t
p
e I Be A t Q
/ /
1 ) (
Final expression for the excess hole charge:
EEE 531: Semiconductor Device Theory I Dragica Vasileska
( ) ( )
|
|
.
|

\
|
+ =
+
= = A

S
F
T a
V V
p n p
L x
V V
n n
I
I
V V
e L Aqp Q e e p x p
T a
p
T a
1 ln
1 1 ) (
/
0
/
/
0
Graphical representation:





Steady state value for the bias across the diode:
) (t Q
p
t
F p
I t
) , ( t x p
n
x
0 n
p
t increasing
Slope almost constant
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Diode turn-off:
For t<0, the switch is in position
1, and a steady-state situation is
established:

At t=0, the switch is moved to
position 2, and up until time t=t
1

we have:

The current through the diode
until time t
1
is:
R
V
I
F
F
~
0 ) , 0 (
0
> >
a n n
V p t p
p
+
n
t=0
V
F

R
V
R

R
1
2
R
V
I
R
R
~
EEE 531: Semiconductor Device Theory I Dragica Vasileska
To solve exactly this problem and find diode switching
time, is a rather difficult task. To simplify the problem, we
make the crucial assumption that I
R
remains constant even
beyond t
1
.
The differential equation to be solved and the initial
condition are, thus, of the form:

This gives the following final solution:

Diode switching time:
F p p p
p
p p
R
I Q Q
Q
dt
dQ
I t = =
t
+ =
+
) 0 ( ) 0 ( ,
( )
p
t
R F p R p p
e I I I t Q
t
+ t + t =
/
) (
|
.
|

\
|
+ t = =
R
F
p rr rr p
I
I
t t Q 1 ln 0 ) (
EEE 531: Semiconductor Device Theory I Dragica Vasileska
Graphical representation:
) , ( t x p
n
x
0 n
p
t=0
Slope almost
constant
t=t
s

tt
rr

) (t V
a
F
I
R
I
s
t
R
I 1 . 0
rr
t
R
V
t
t
t
s
switching time
t
rr
reverse recovery time

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