Diodes For Power Electronic Applications: Lecture Notes

Lecture Notes
Diodes for Power Electronic Applications
OUTLINE
• PN junction power diode construction

• Breakdown voltage considerations
• On-state losses
• Switching characteristics
• Schottky diodes
• Modeling diode behavior with PSPICE
Copyright © by John Wiley & Sons 2003 Diodes - 1

Basic Structure of Power Semiconductor Diodes
Anode
i
10
P+ 19 -3 microns
N = 10 cm
A
breakdown
v 14 -3 voltage
N- epi N = 10 cm
D dependent
19 -3
N+ substrate N = 10 cm 250
D
microns
Cathode
anode i
1
i
R on
BV BD
v
≈1V v
cathode

Breakdown Voltage Estimate - Step Junction
Φ
• No n- p unc h- t hr o ug h d io d e . Dr ift
W(V)
r e g io n le ng t h Wd > W( BV BD) =
le ng t h o f s p a c e c ha r g e r e g io n a t
b r e a k d o wn. x
Φ
c
• W( V) = Wo 1 +V/ Φc
Φc + V
2εΦc(N a+N d )
• Wo=
qN aN d 4 Φc
• ( Em a x ) 2 = ( EBD) 2 = BV BD
W o2
2 Φc
• Em a x = 1 + V /Φ c
W o
• Solve for W (BV BD ) and BV BD
• Pow er diode at reverse breakdow n:
N a >> N d ;E = EBD ;V = BV BD >> Φc to obtain (put in Si values)
ε EBD 2 1.3x10 17
W o 2 BV BD 2εΦ c
BV BD = = ;[V ]
• W 2 (BV BD ) = ;W o
2 = 2 q N d Nd
Φc q N d
2 BV BD
W (BV BD ) = = 10 -5 BV BD ;[µ m ]
EBD
• Co nc l u s i o n s
1 . La r g e BV BD ( 1 0 3 V) r e q ui r e s Nd < 1 0 1 5 c m - 3
2 . La r g e BV BD ( 1 0 3 V) r e q ui r e s N- d r i f t r e g i o n > 1 0 0 µ m

Breakdown Voltage - Punch-Through Step Junction
• Punc h-t hro ug h s t e p junc t io n - W( BV BD) > Wd
• At b re a kd o wn:
- V + • V1 + V2 = BVBD
P+ N- N
+ • E1 + E2 = EBD
W q Nd Wd 2
d
Electric
• BVBD = EBD Wd -
2ε
E + E2 field
1
V
1 ε(EBD)2
E
2 • If N d << (required
V2 2q(BV BD )
x value of N d for non-punch-thru
diode),then
q Nd Wd qN dW d2
• E1 = ;V 1 = • BV BD ≈ EBD W d and
ε 2ε
• W d(Punch-thru)
• V 2 = E2 W d ≈ 0.5 W d(non-punch-thru)

Effect of Space Charge Layer Curvature
diffusing incident acceptor impurities
acceptor
impurities SiO 2
• If radius of curvature is comparable
to depletion layer thickness, electric
field becomes spatially nonuniform.
+
P
R
depletion • Spatially nonuniform electric field
layer N- reduces breakdown voltage.
+
N
• R > 6 W(BVBD) in order to limit
breakdown voltage reduction to 10%
• Impurities diffuse as fast laterally as vertically or less.
• Not feasible to keep R large if

• Curvature develops in junction boundary and in BVBD is to be large ( > 1000 V).
depletion layer.

Control of Space Charge Layer Boundary Contour
field plates
• Electrically isolated conductors

(field plates) act as equipotential
P+ surfaces.
depletion layer • Correct placement can force
boundary depletion layer boundary to have
- larger radius of curvature and t;hus
N
minimize field crowding.
SiO2 • Electrically isolated p-regions

P P
(guard rings)has depletion regions
P+ which interact with depletion region
depletion
guard ring of main pn junction.
layer
boundary N
- • Correct placement of guard rings
can result in composite depletion
N+
region boundary having large radius
aluminum of curvature and thus minimize field
contact
crowding.
Surface Contouring to Minimize Field Crowding
depletion layer
boundary
N
+ N+
SiO
2
N-
N-
P+ P+
bonding pad bonding pad
high field
region
• Large area diodes have depletion • Proper contouring of surface can

layers that contact Si surface. mimimize depletion layer curvature and
• Difference in dielectric constant of Si thus field crowding.
and air causes field crowding at surface. • Use of a passivation layer like SiO2 can
• Electric fields fringing out into air also help minimize field crowding and
attract impurities to surface that can also contain fringing fields and thus
lower breakdown voltage. prevent attraction of impurities to
surface.
Conductivity Modulation of Drift Region
• Forward bias injects holes into drift
region from P+ layer. Electrons
x attracted into drift region from N+
+ layer. So-called double injection.
P
+
N
- N+
-
W • If Wd ≤ high level diffusion length La ,

d
carrier distributions quite flat with p(x)
p(x) = n(x) log scale ≈ n(x) ≈ na.
16
=n a
= 10
• For na >> drift region doping Nd, the

p (x)
n (x)
p n no= 10
14 n resistance of the drift region will be
p quite small. So-called conductivity
no modulation.
n 6
po p = 10
no
x
• On-state losses greatly reduced below
those estimated on basis of drift region
low-level (Nd) ohmic conductivity.
Drift Region On-State Voltage Estimate
QF q A W d n a
• IF = = ; Current needed
τ τ
to maintain stored charge
F. Q
W
d
q [µn + µ p] na A V d x
• IF = ;
Wd
Ohm’ s ( Law
= (J σE)
=
+ + -
P N - N+
W d2
IF
• Vd = ; Equate above + V - + V -
[µn + µ p] τ j d
Cross-sectional
two equations and solve for
d V
area = A
• Conclus
ion: long lifetime
τ minimizesd.V

Diode On-State Voltage at Large Forward Currents
µo
• µn + µp = ; n b ≈ 1 0 1 7 c m-3 . i
na
1 +
nb
• Mo b ilit y re d uc t io n d ue t o inc re a s e d 1
c a rrie r-c a rrie r s c a t t e ring a t la rg e n a . R on
v
q n a A Vd µo ≈1V
• IF = ; Ohms La w
Wd na
1 + If Wd
nb
• Vd =
wit h d e ns it y -d e p e nd e nt mo b ilit y . q µo n b A
• V d = IF Ro n
• Inv e rt Ohm’s La w e q ua t io n t o find Vd a s
func t io n IF a s s uming n a > > n b .
• V = Vj + Vd
Diode Switching Waveforms in Power Circuits
Qrr = I t / 2
rr rr
di / dt d i / dt
F I F R 0 .2 5 Irr
I
rr
t
3
t
4
t
5 diF diR
• dt and dt determined
V
FP
Von t
rr by external circuit.
t • Inductances or power
t V
V
R semiconductor devices.
2 rr
t
t 5
1 S =
t
4

Diode Internal Behavior During Turn-on
t interval
1
- +
+ - + di F
P - + N- N+
Csc (V) =
ε A
V FP ≈ FIRd + L
i (t) - + W(V) dt
F
Wd
Rd = L = stray or
q μ n N d A wiring inductance
Csc Rd L
t interval
2
+ - +
P - + N- N+
i (t) - +
F
V ≈ 1.0 V
j
time
• Injection of excess
time
time carriers into drift
region greatly
reduces Rd.
x

Diode Internal Behavior During Turn-off
t - t interval
3 4
i (t)
R + - + - N+
P - N
- ++
Vj ≈ 1.0 V • R d inc r e a s e s a s e x c e s s
Rd
c a r r ie r s a r e r e m o v e d v ia
C L
sc r e c o m b ina t io n a nd c a r r ie r
s we e p - o ut ( ne g a t iv e c ur r e nt ) .
time
time time d iR
• V r = Ir r R d + L
dt
t s i nt e r v a l
• Ins uf f ic i e nt e x c e s s c a r r i e r s r e m a i n t o s up p o r t Ir r , s o
P + N- junc t io n b e c o m e s r e v e r s e - b ia s e d a nd c ur r e nt
de cr e as e s t o ze r o.
• Vo l t a g e d r o p s f r o m V r r t o V R a s c ur r e nt d e c r e a s e s
t o z e r o . Ne g a t i v e c ur r e nt int e g r a t e d o v e r i t s t im e
d ur a t io n r e m o v e s a t o t a l c ha r g e Qr r .

Factors Effecting Reverse Recovery Time
d iR d iR t rr • If s t o re d c ha rg e re mo v e d mo s t ly
• Irr = t = ; De fine d o n b y s we e p -o ut Qrr ≈ QF ≈ IF τ
dt 4 d t ( S + 1 )
s wit c hing wa v e fo rm d ia g ra m
• Using this in eqs.for Irr and trr

and assum ing S + 1 ≈ 1 gives
Irr t rr d iR t rr 2
• Qrr = = ; De fine d
2 d t 2 ( S + 1 )
2 IF τ
o n wa v e fo rm d ia g ra m trr = and
diR
dt
• Inv e rt ing Qrr e q ua t io n t o s o lv e fo r t rr y ie ld s
d iR diR
2 Qrr (S+ 1 ) 2 Qrr Irr = 2 IF τ
dt dt
t rr = a nd Irr =
d iR ( S + 1 )
dt

Carrier Lifetime-Breakdown Voltage Tradeoffs
• Low on-state losses require Co nc lus io ns

kT
L= D τ = τ 1. Hig he r b re a kd o wn v o lt a g e s
q [µ n + µ p]
re q uire la rg e r life t ime s if lo w
L = Wd ≥W()V) 10 10-5BV BD
= = o n-s t a t e lo s s e s a re t o b e
ma int a ine d .
• Solving for the lifetime yields 2. Hig h b re a kd o wn v o lt a g e

W d2 d e v ic e s s lo we r t ha n lo w
τ = x10-12 ( BVBD ) 2
= 410 b re a kd o wn v o lt a g e
(kT/q) [µ n+µ p]
d e v ic e s .
3. Turn-o ff t ime s s ho rt e ne d
• Substituting τfor
inrr Iand rrt equations gives
d iR
IF b y la rg e b ut Irr is
dt
• trr = 2.810x10-6 BV BD
(di R/)dt) inc re a s e d .
di R
• Irr = 2.810x10-6 BV BD IF
dt

Schottky Diodes
anode
aluminum
SiO2 contact -
Cha ra c t e ris t ic s rectifying
• V( o n) = 0 .3 - 0 .5 v o lt s .
P P
• Bre a kd o wn v o lt a g e s guard
≤ 1 0 0 -2 0 0 v o lt s . ring
depletion layer depletion layer
boundary with N boundary
• Ma jo rit y c a rrie r d e v ic e - no guard rings without guard
s t o re d c ha rg e . rings
• Fa s t s wit c hing b e c a us e o f la c k
o f s t o re d c ha rg e . N+
aluminum
cathode
contact -
ohmic
Physics of Schottky Diode Operation
• Ele c t ro ns d iffus e fro m Si t o Al

b e c a us e e le c t ro ns ha v e la rg e r + V -
i(t)
a v e ra g e e ne rg y in s ilic o n
Aluminum n-type Si
c o mp a re d t o a luminum.
Electron Energy
• De p le t io n la y e r a nd t hus p o t e nt ia l
b a rrie r s e t up . Giv e s ris e t o
E
re c t ify ing c o nt a c t . Si
E
Al
• No ho le inje c t io n int o s ilic o n. No
s o urc e o f ho le s in a luminum. Thus
- +
d io d e is a ma jo rit y c a rrie r d e v ic e . Al - + N-Si
+
• Re v e rs e s a t ura t io n c urre nt muc h Depletion layer
Diffusing
la rg e r t ha n in p n junc t io n d io d e .
electrons
This le a d s t o s ma lle r V( o n) ( 0 .3 -
0 .5 v o lt s )

Schottky Diode Breakdown Voltage
• Bre a kd o wn v o lt a g e limit e d t o
1 0 0 -2 0 0 v o lt s . anode
• Na rro w d e p le t io n re g io n
wid t hs b e c a us e o f he a v ie r
d rift re g io n d o p ing ne e d e d fo r
P P
lo w o n-s t a t e lo s s e s .
• Sma ll ra d ius o f c urv a t ure o f

d e p le t io n re g io n whe re
me t a lliz a t io n e nd s o n s urfa c e 16
N ≈ 10
o f s ilic o n. Gua rd ring s he lp t o
mit ig a t e t his p ro b le m. +
N
• De p le t io n la y e r fo rms rig ht a t
s ilic o n s urfa c e whe re cathode
ma ximum fie ld ne e d e d fo r
b re a kd o wn is le s s b e c a us e o f
imp e rfe c t io ns , c o nt a mina nt s .

Schottky Diode Switching Waveforms
• Sc ho t t ky d io d e s s wit c h muc h
fa s t e r t ha n p n junc t io n d io d e s . No Current
mino rit y c a rrie r s t o ra g e .
I
F
• Fo re wa rd v o lt a g e o v e rs ho o t VFP
t
muc h s ma lle r in Sc ho t t ky d io d e s .
Drift re g io n o hmic re s is t a nc e RΩ. V
FP
• Reverse recovery tim e trr m uch

V(on)
sm aller in Schottky diodes.No
m inority carrier storage. t
voltage
• Reverse recovery current Irr
com parable to pn junction diodes. C(Schottky) ≈ 5 C(PN)
space charge capacitance in
Schottky diode larger than in pn
R (Sch.) << R (pn)
junction diode becasue of Ω Ω
narrow er depletion layer w idths
resulting from heavier dopings.

Ohmic Contacts
• Ele c t ro ns d iffus e fro m Al int o p -

t y p e Si b e c a s ue e le c t ro ns in Al
ha v e hig he r a v e ra g e e ne rg y .
• Ele c t ro ns in p -t y p e Si fo rm a n Electron Energy

a c c umula t io n la y e r o f g re a t ly
E
e nha nc e d c o nd uc t iv it y . Al
E
• Co nt a c t p o t e nt ia l a nd re c t ify ing Si
junc t io n c o mp le t e ly ma s ke d b y Accumulation layer
i(t)
e nha nc e d c o nd uc t iv it y . So -c a lle d P-Si or
-
Al
o hmic c o nt a c t . - N+-Si
• In N+ Si d e p le t io n la y e r is v e ry Diffusing
na rro w a nd e le c t ric fie ld s a p p ro a c h electrons
imp a c t io niz a t io n v a lue s . Sma ll
v o lt a g e s mo v e e le c t ro ns a c ro s s
b a rrie r e a s ily b e c a s ue q ua nt um
me c ha nic a l t unne ling o c c urs .

PN Vs Schottkys at Large BVBD
• Mino rit y c a rrie r d rift re g io n • De s ire d b re a kd o wn v o lt a g e
re la t io ns hip s 1 .3 x1 0 1 7
q [ µn + µp ] n a A V d re q uire s Nd = a nd
• IF ≈
BVBD
Wd
Wd ≥ 1 0 -5 BVBD
• Ma ximum p ra c t ic a l v a lue o f n a = 1 0 1 7
• La rg e BVBD (1 0 0 0 V) re q uire s Nd
c m -3 a nd c o rre s p o nd ing t o
µn + µp = 9 0 0 c m 2 / ( V-s e c )
= 1 0 1 4 c m -3 whe re µn + µp =
1 5 0 0 c m 2 / ( V-s e c )
• De s ire d b re a kd o wn v o lt a g e re q uire s
Wd ≥ 1 0 -5 BV BD IF Vd
• ≈ 3 .1 x1 0 6
IF Vd A [ BVBD] 2
= 1 .4 x1 0 6
A BVBD
• Co nc lus io n: Mino rit y c a rrie r
• Ma jo rit y c a rrie r d rift re g io n d e v ic e s ha v e lo we r o n-s t a t e
re la t io ns hip s
lo s s e s a t la rg e BVBD.
q [ µn + µp ] Nd A V d
• IF ≈
Wd

PSPICE Built-in Diode Model
• Circuit diagram • Components
• Cj - nonlinear space-charge capacitance
+ i
diode
• Cd - diffusion capacitance. Caused by excess

carriers. Based on quasi-static description of
+
j
C
i (v )
stored charge in drift region of diode.
C
dc j
v j
d
diode
-
• Current source idc(vj) models the exponential

R
s
I-V characteristic.
-
• Rs accounts for parasitic ohmic losses at high

v = v + R i
diode
j
s diode currents.

Stored Charge in Diode Drift Region - Actual
Versus Quasi-static Approximation
x
+ - +
• One dimensional diagram of a
power diode.
P N N
n(x,t) n(x,t)
time
• Quasistatic view of decay of

time
excess carrier distribution
during diode turn-off.
time
n(x,t) = n(x=0,t) f(x)
0 Wd
x
• Redistribution of excess
carriers via diffusion ignored.
time
Equ;ivalent to carriers moving
with inifinte velocity.
time
time
• Actual behavior of stored

charge distribution during
x
turn-off.

Example of Faulty Simulation Using Built-in Pspice Diode Model
L
stray
50 nH
+
D
f
I
o
• Test circuit example - step-down converter.
V 50 A
100 V - • PSPICE diode model parameters - (TT=100ns

Cjo=100pF Rs=.004 Is=20fA)
Sw
Diode
Voltage
0V
-100V
-200V
-300V
• Diode voltage transient
-400V
-500V
0s 100ns 200ns 300ns 400ns 500ns
time
Diode
Current
100A
50A
0A
• Diode current transient.

-50A
-100A
0s 100ns 200ns 300ns 400ns 500ns
time

Improved (lumped-charge) Diode Model
N - region
• More accurately model distributed nature p(x) = n(x)
of excess carrier distribution by dividing
it into several regions, each described by + N+
P Q
a quasi-static function. Termed the Q Q Q
3 region
region 1 2 4
lumped-charge approach.
x
δ d
diode
• Circuit diagram of improved diode model. Circuit written in
terms of physical equations of the lumped-charge model.
+
D
v Gd
CJ j
Vsense1
-
6
5 8
7
+ -
2
R
s + + +
Re
Ee Em Rm Edm Cdm
- - - Rdm
3
+
Emo
- 0
• Detailed equations of model given in subcircuit listing.

+
Vsense2
-
• Many other even better (but more complicated models available in

9
technical literature..
Details of Lumped-Charge Model
Subcircuit Listing
.Subckt DMODIFY 1 9 Params: Is1=1e-6, Ise=1e-40, Tau=100ns, • Symbolize subcircuit listing into
+Tm=100ns,Rmo=Rs=.001, Vta=.0259, CAP=100p, Gde=.5,
+ Fbcoeff=.5, Phi=1, Irbk=1e20,Vrbk=1e20
SCHEMATICS using SYMBOL
*Node 1= anodeand Node 9 = cathode WIZARD
Dcj 1 2 Dcap ; Included for space charge capacitance and reverse
*breakdown. • Pass numerical values of
.model Dcap D (Is=1e-25 Rs=0 TT=0 Cjo={CAP} M={Gde} parameters Tau, Tm, Rmo,Rs, etc.
+FC={Fbcoeff} Vj={Phi} +IBV={Irbk} BV=Vrbk})
Gd 1 2 Value={(v(5)-v(6))/Tm +Ise*(exp(v(1,2)/Vta)-1)}
by entering values in PART
*Following components model forward and reverse recovery. ATTRIBUTE window (called up
Ee 5 0 VALUE = {Is1*Tau*(exp(V(1,2)/(2*Vta))-1)}; Ee=Qe
Re 5 0 1e6
within SCHEMATICS).
Em 6 0 VALUE = {(V(5)/Tm-i(Vsense1))*Tm*Tau/(Tm+Tau)}
*Em=Qm
• See reference shown below for
Rm 6 0 1e6 more details and parameter
Edm 7 0 VALUE = {v(6)};Edm=Qm extraction procedures.
Vsense1 7 8 dc 0 ; i(vsense1)=dQm/dt
Cdm 8 0 1 • Peter O. Lauritzen and Cliff L. Ma,
Rdm 8 0 1e9 "A Simple Diode Model with
Rs 2 3 4e-3
Emo 3 4 VALUE={2*Vta*Rmo*Tm*i(Vsense2) Forward and Reverse Recovery",
+/(v(6)*Rmo+Vta*Tm)}; Vm IEEE Trans. on Power Electronics,
Vsense2 4 9 dc 0 Vol. 8, No. 4, pp. 342-346, (Oct.,
.ends
1993)
Simulation Results Using Lumped-Charge Diode Model
Diode voltage and current waveforms Simulation Circuit
L
Diode
10V
stray
50 nH
Voltage
0V
0V
Io
.
D
+ V f
-10V d 50 A
410ns 415ns 420ns
- 100 V
Sw
-100V
-200V
0s 100ns 200ns 300ns 400ns 500ns
time
Diode
• Note soft reverse

Current
50A
recovery and forward
voltage overshoot.
Qualitatively matches
experimental
0A
measurements.
-50A
0s 100ns 200ns 300ns 400ns 500ns
time

Diodes For Power Electronic Applications: Lecture Notes

Uploaded by

Document Information

Original Description:

Original Title

Copyright

Available Formats

Share this document

Share or Embed Document

Sharing Options

Did you find this document useful?

Is this content inappropriate?

Copyright:

Available Formats

Diodes For Power Electronic Applications: Lecture Notes

Uploaded by

Copyright:

Available Formats

Lecture Notes

Diodes for Power Electronic Applications

• PN junction power diode construction

Copyright © by John Wiley & Sons 2003 Diodes - 1

Copyright © by John Wiley & Sons 2003 Diodes - 2

Copyright © by John Wiley & Sons 2003 Diodes - 3

Copyright © by John Wiley & Sons 2003 Diodes - 4

• Not feasible to keep R large if

Copyright © by John Wiley & Sons 2003 Diodes - 5

• Electrically isolated conductors

SiO2 • Electrically isolated p-regions

• Large area diodes have depletion • Proper contouring of surface can

W • If Wd ≤ high level diffusion length La ,

• For na >> drift region doping Nd, the

Copyright © by John Wiley & Sons 2003 Diodes - 9

Copyright © by John Wiley & Sons 2003 Diodes - 11

Copyright © by John Wiley & Sons 2003 Diodes - 12

Copyright © by John Wiley & Sons 2003 Diodes - 13

• Using this in eqs.for Irr and trr

Copyright © by John Wiley & Sons 2003 Diodes - 14

• Low on-state losses require Co nc lus io ns

• Solving for the lifetime yields 2. Hig h b re a kd o wn v o lt a g e

Copyright © by John Wiley & Sons 2003 Diodes - 15

• Ele c t ro ns d iffus e fro m Si t o Al

Copyright © by John Wiley & Sons 2003 Diodes - 17

• Sma ll ra d ius o f c urv a t ure o f

Copyright © by John Wiley & Sons 2003 Diodes - 18

• Reverse recovery tim e trr m uch

Copyright © by John Wiley & Sons 2003 Diodes - 19

• Ele c t ro ns d iffus e fro m Al int o p -

• Ele c t ro ns in p -t y p e Si fo rm a n Electron Energy

Copyright © by John Wiley & Sons 2003 Diodes - 20

Copyright © by John Wiley & Sons 2003 Diodes - 21

• Circuit diagram • Components

• Cj - nonlinear space-charge capacitance

• Cd - diffusion capacitance. Caused by excess

• Current source idc(vj) models the exponential

• Rs accounts for parasitic ohmic losses at high

Copyright © by John Wiley & Sons 2003 Diodes - 22

• Quasistatic view of decay of

n(x,t) = n(x=0,t) f(x)

• Actual behavior of stored

Copyright © by John Wiley & Sons 2003 Diodes - 23

100 V - • PSPICE diode model parameters - (TT=100ns

0s 100ns 200ns 300ns 400ns 500ns

• Diode current transient.

0s 100ns 200ns 300ns 400ns 500ns

Copyright © by John Wiley & Sons 2003 Diodes - 24

• Detailed equations of model given in subcircuit listing.

• Many other even better (but more complicated models available in

0s 100ns 200ns 300ns 400ns 500ns

• Note soft reverse

0s 100ns 200ns 300ns 400ns 500ns

Copyright © by John Wiley & Sons 2003 Diodes - 27

You might also like