BSIM4 PARAMETER EXTRACTION OF DEEPLY

DEPLETED CHANNEL MOS TRANSISTORS

Project report by- Debayan Bairagi
Roll no:97/VLM/121001
M.Tech in VLSI Design



INTRODUCTION
Ultra low power dissipation IC is becoming an essential
requirement in present day application in various field from
biomedical to communication.
So different devices are adopted and they are also being scaled
down to meet ultra low power dissipation. Here we are facing
some challenges
1. Scaling down leads to some secondary issues related to devices physics
which has been insignificant in other wise but now plays some significant
role in circuit performance. One of the most important effect for MOS is
short channel effect. Like for ultra low power amplifier application it has
to be operated in sub threshold region to get higher gain but due to DIBL
effect we find some undesired result.
2. However commercial use needs proper characterization of these device
with all these effects. So that we can easily model this device and go for
mass scale production.
NEED OF PARAMETER EXTRACTING
Compact Models are characterized with set of mathematical
equations having some parameters which are used as inputs to a
SPICE for circuit simulation. BSIM4 being the most
commercially used model.
The parameters of the model along with equation reproduce the
device characteristics for different dimension ,range of
temperature , process variation etc. Hence different device with
different structures , different technology node have different
parameters.
With the availability of new devices theres a constant need of
extraction of parameters to develop model file for its SPICE
based simulation.
PROBLEM DEFINITION


Development of Tool for Extraction of various BSIM4 parameters
of DDC MOS transistor.

Using the extracted parameters to develop SPICE model file
compatible with BSIM4 compact model.


OUTLINE OF THE PARAMETER EXTRACTION
PROCESS

All sorts of Experimental/simulation data consists of:
Long channel Threshold Voltage Variation with substrate bias.
Threshold Voltage Variation with gate length at low and high drain bias.
long channel gate length =1m;short channel gate length =80nm ;
gate width=1m .
Using the BSIM4 compact model for MOSFET cost function is
developed for each parameter.
Using the experimental data and optimization algorithm, required
parameters are extracted with relative percentage error very low.

Initial Guess of
Parameters P
i


Model Equations

Evaluate the cost
function

Evaluate the error E
Measured data
E<

Algorithmic determination
of the new parameters
P
i+1

Extracted Set of
parameters



N
o
Yes
Fitting with Local
optimization
PARAMETER EXTRACTION PROCEDURE
EVOLUTIONARY OPTIMIZATION ALGORITHM
USED IN THE EXTRACTION PROCESS:
1. Choose an initial point x(0) and size reduction parameter i for all design
variables, i=1,2,3n. Choose a termination parameter and set x = x(0) .
2. If || ||< , terminate; Else create 2
n
points by adding and subtracting
i
/10
for each variable at point x.(Distance between two non adjacent points ,
termed E in the procedure)
3. Compute the function value at all 2
n
+1 points find the point having
minimum function value. Designate the minimum point to be x.
4. If x= x(0) reduce the size parameter
i
=
i
/10 and Go to step 2;Else set
x(0) =x and Go to step 2.
In this algorithm 2
n
points forms the corner points of a hypercube and function is evaluated
at 2
n
+1 points.
After comparison minimum point is identified and another hypercube is formed around that
point.
This process continues until the minimum point is found and size of hypercube becomes
very small.