Synchronization

Shanghai Jiao Tong University

Synchronization
Synchronization is one of the most critical functions of a communication
system with coherent receiver. To some extent, it is the basis of a
synchronous communication system.

Carrier synchronization
Symbol/Bit synchronization
Frame synchronization

Synchronization
Carrier synchronization (
Receiver needs estimate and compensate for frequency
and phase differences between a received signals carrier
wave and the receivers local oscillator for the purpose of
coherent demodulation, no matter it is analog or digital
communication systems

Synchronization
Symbol/bit synchronization ( /
In digital systems, the output of the receiving filter (i.e. matched filter)
must be sampled at the symbol rate and at the precise sampling time
instants. Hence, we require a clock signal. The process of extracting
such a clock signal at the receiver is called symbol/bit synchronization.

Frame synchronization
In frame-based digital systems, receiver also needs to estimate the
starting/stopping time of a data frame. The process of extracting such a
clock signal is called frame synchronization.

Phase-locked Loop
PLL is often used in carrier syn. and symbol syn. It is a closedloop control system consisting of
Phase detector (PD): generate the phase difference of v i(t) and vo(t).
Voltage-controlled oscillator (VCO): adjust the oscillator frequency based on
this phase difference to eliminate the phase difference. At steady state, the
output frequency will be exactly the same with the input frequency.
Loop filter (LF)

Phase-locked Loop
vi (t ) vi sin[0t (t )]

vo (t ) vo cos[0t (t )]
A PD contains a multiplier and a lowpass filter. The output of PD is:

vd (t ) K d sin[ (t ) (t )] K d sin e (t )
Loop filter
is also a LPF.

The output of the LF is (where F(p) is the transfer function)

vc (t ) F ( p)vd (t )

Phase-locked Loop
The output of VCO can be a sinusoid or a periodic impulse train. The
differentiation of the output frequency are largely proportional to the input
voltage.

d (t )
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If F(p)=1 Then

d (t )
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This kind of loop is called the first-order loop

Digital PLL

DPLL
Input

Digital
PD

Digital LP

Digital VCO
output
9-6 DPLL

Phase-locked Loop
In a coherence system, a PLL is used for:
1. PLL can track the input frequency and generate the output signal with
small phase difference.
2. PLL has the character of narrowband filtering which can eliminate the
noise introduced by modulation and reduce the additive noise.
3. Memory PLL can sustain the coherence state for enough time.
CMOS-based integrated PLL has several advantages such as ease of
modification, reliable and low power consumption, therefore are widely
used in coherence system.

Carrier Synchronization
To extract the carrier
1. Pilot-tone insertion method
Sending a carrier component at specific spectral-line along with the signal
component. Since the inserted carrier component has high frequency stability,
it is called pilot ( ).

2. Direct extraction method

Directly extract the synchronization information from the received
signal component.

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Pilot-tone insertion method

1. Pilot-tone insertion method

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The pilot signal is generated by shift the carrier by 90 0 and decrease by several
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component, then the pilot is

11

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Pilot-tone insertion method

S(f)

X(f)

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DSB, SSB and PSK are all capable of pilot-tone insertion method. VSB can
also apply pilot-tone insertion method but with certain modification.

13

Narrowband Filter

The drawback of narrowband filter:

The pass band is not narrow enough
fc is fixed, cannot tolerate any frequency drift with respect to the central
frequency
Can be replaced by PLL

Pilot-tone insertion method is suitable for DSB, SSB, VS and 2PSK

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Direct extraction method

2. Direct extraction method
1).If the spectrum of the received signal already contains carrier
component, then the carrier component can be extracted simply by a
narrowband filter or a PLL.
2).If the modulated signal supresses the carrier component, then the
carrier component may be extracted by performing nonlinear
transformation or using a PLL with specific design.

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Nonlinear-transformation-based method
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Nonlinear-transformation-based method
Square PLL

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In-phase orthogonal loopCostas Loop

2. In-phase orthogonal loop Costas Loop

Contains in-phase branch and

orthogonal branch. All parts except
LF and VCO are similar with a phase
detector.
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In-phase orthogonal loopCostas Loop

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Performance
3. Performance of carrier synchronization
technique
1) Phase error: steady-state phase error, random phase error
2) Synchronization build time and hold time

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Symbol Synchronization
In a digital communication system, the output of the receiving
filter must be sampled periodically at the symbol rate and at the
precise sampling time instance.
To perform this periodic sampling, we need a clock signal at the
receiver
The process of extracting such a clock signal is called symbol
synchronization or timing recovery
One method is for the transmitter to simultaneously transmit the
clock frequency along with the information signal. The receive can
simply employ a narrowband filter or PLL to extract it. This
method requires extra power and bandwidth and hence, but
frequently used in telephone transmission systems.
Another method is to extract the clock signal from the received
data signal by using some kind of non-linear transformation.

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Early-Late Gate Synchronization

Basic Idea: exploit the symmetry properties of the output
signal of matched filter or correlator
Due to the symmetry, the values of the
correlation function at the early samples
and the late samples
are equal.
Thus, the proper sampling time is the midpoint
between
and

23

24

Nonlinear-transformation-based
method

1. Nonlinear-transformation-based method

Some transformations can add synchronous signal with f=1/T to the

original signal. For example, we can transform the signal to return-to-zero
waveform. After narrowband filtering and phase shifting, we can generate
the clock signal used for synchronization.

25

Digital PLL (DPLL)

2. DPLL

26

Digital PLL (DPLL)

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Performance
3. Performance of symbol synchronization system
DPLL
1). Phase error
2). Synchronization build time
3). Synchronization hold time
4). Synchronous bandwidth

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Frame Synchronization
Recall that carrier and symbol synchronization needs to estimate
the phase of synchronous signal which can be realized by using a
PLL.
Frame synchronization is to insert frame alignment signal
(distinctive bit sequence) and then detect the alignment symbol.
Besides adding frame alignment bits, some code such as selfsynchronizing code can be synchronized without adding extra bits.
Here, we only focus on the first method inserting frame
alignment signal.

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Frame Synchronization

Start-stop method
Bunched frame alignment signal
Distributed frame alignment signal

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Start-stop Method

1. Start-stop method

It is widely used in teleprinter. Each symbol contains 5-8 data bits, a start bit and
a stop bit.

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Start-stop Method
Drawbacks:
1). Low transmission efficiency
2). Low timing accuracy

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Bunched frame alignment signal

2. Bunched frame alignment signal
This method inserts synchronous code at a particular place in
each frame. The code should have a sharp self-correlation function.
The detector should be simple to implement.

Frame synchronization code:

Barker code
optimal synchronous code
pseudo-random code.

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Barker Code
(2) Barker code generator
shift register
Example when n=7, a 7 bits shift register. The initial state is a barker code.

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Barker Code
(3) Barker code detector

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Distributed frame alignment signal

3. Distributed frame alignment signal
The synchronous code is distributed in the data signal. That means
between each n bits, a synchronous bit is inserted.
Design criteria of synchronous code:
1. Easy to detect. For example: 11111111or 10101010
2. Easy to separate synchronous code from data code. For example: In
some digital telephone system all 0 stands for ring, so synchronous code
can only use 10101010.

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Bunched frame alignment signal
1. Probability of missing synchronization PL

Affected by noise, the detector may not be able to detect the

synchronous code. The probability of this situation is called probability of
missing synchronization PL.
Assume the length of synchronous code is n bit error rate is Pe. The
detector will not be able to detect if more than m bit errors happen, then:

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Probability of false synchronization PF

Since data code can be arbitrary, it may be the same with synchronous
code. The probability of this situation is called probability of false synchronization
PF.

PF equals to the probability of appearance of synchronous code in the data code.

a. In a binary code, assume 0 and 1 appears with the same probability. There are 2 n
combinations of a n bit code.

b. Assume when there are more than m bit errors, the data code will also be detected
as synchronous code.

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Suggested Reading

, 2008.6,
Chapter 8.6 of Fundamentals of Communications
Systems, Pearson Prentice Hall 2005, by Proakis
& Salehi

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