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PIC18 con CCS

(PIC18F14K50)

Autor:

Andrs Ral Bruno Saravia


Microchip RTC Argentina

PIC18 Arquitectura
Revisin

Microchip Familias de MCUs

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 3

Familia PIC18
PIC18 Tradicional
PIC18 serie - J
PIC18 serie - K
4KB

32KB

128KB

Program Flash
Tipicamente los productos con mucha memoria tambien tienen muchos pines y perifericos avanzados integrados

Tradiciona PIC18

PIC18 serie J

PIC18 serie K

40 MHz, 10 MIPS, 5V
Flash endurance 100k
EEPROM
Caractersticas Premium

40-48 MHz, 10-12 MIPS, 3V


Flash endurance 1k 10k
Emulate EEPROM
Menor costo >32KB Flash

64MHz, 16 MIPS, 3V
Flash endurance 10k
EEPROM
Menor costo <32KB Flash

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 4

Diagrama en Bloques Simplificado


Arquitectura PIC 8-bit
Espacio de
Programa

Espacio de
Datos
Tabla de
Acceso

8-bit

Memoria
Flash

Bus de
instrucciones
16-bit

8-bit

Bus de datos
8-bit CPU

8-bit

2011 Microchip Technology Incorporated. All Rights Reserved.

RAM

Peripfericos

Puertos I/O

Slide 5

Mapa de Memoria de Datos


Arquitectura PIC 8-bit
Memoria de datos
hasta 4k bytes
Dividida en
bancos de 256
byte
Medio Banco 0 y
medio banco 15
son usados para
crear un banco
virtual de acceso
directo

ACCESS RAM

PIC18F2520/4520
Mapa de Registros

Banco0 GPR
Banco1 GPR

Banco2 GPR

ACCESS RAM
ACCESS SFR

Banco13 GPR

Banco14 GPR

* La divisin 50/50 no se mantiene


en los dispositivos con muchos
registros SFR (Special Function
Registers)

Banco15 GPR
ACCESS SFR

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 6

Mapa de memoria de Programa


Arquitectura PIC 8-bit

Hasta 2MB (1M


Words) continuos
totalmente lineal
Contador de Programa de 21-bit

Vector de Reset

000000h

Vector de INT de alta prioridad

000008h

Vector de INT de baja prioridad

000018h

Memoria de Programa
En el chip

007FFEh
008000h

Nivel de Stack 1
Nivel de Stack 2

Nivel de Stack 30
Nivel de Stack 31

Memoria de Programa
Sin implementar
(Read as 0)

Stack de 31 niveles
1FFFFEh

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 7

Tabla de Lectura
Arquitectura PIC 8-bit
TBLPTRU

TBLPTRH

TBLPTRL

00

00

09

Memoria de Datos (RAM)

Memoria de Programa (Flash)

0x000
22-bit Address

0x001
0x002
0x003
0x004
0x005

Puntero de Mem. Prog. de 21-bit

0x000001

0x000000

0x000003

0x000002

0x000005

0x000004

0x000007

0x000006

0x000009

TABLAT

2C

2C

0x000008

0x00000B

0x00000A

8-bit Data

0xFFA

0x1FFFF5

0x1FFFF4

0xFFB

0x1FFFF7

0x1FFFF6

0xFFC

0x1FFFF9

0x1FFFF8

0xFFD

0x1FFFFB

0x1FFFFA

0xFFE

0x1FFFFD

0x1FFFFC

0xFFF

0x1FFFFF

0x1FFFFE
Byte Alto

2011 Microchip Technology Incorporated. All Rights Reserved.

Byte Bajo
Slide 8

Caractersticas especiales
Como setear los bits de configuracin del PIC

Osciladores

PIC18F: Sistema de Clock


Fuentes de Clock
Primaria
Seleccin Fija
LP, XT, HS, RC, EC, Int RC Osc

Secundaria
Oscilador Timer1 Frecuencia fija
Necesario para base de tiempo de RTR

Oscilador Interno RC
INTOSC (8 MHz por default)
4, 2, 1 MHz, 500, 250, 125 y 31 kHz seleccionables

INTRC (31 kHz)


2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 11

Sistema de Clock PIC18F1XK50

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 12

PIC18F1XK50 Opciones del Oscilador


para el USB

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 13

PIC18F
Caractersticas Especiales

In-Circuit Serial Programming


Solo necesita 2 pines para programar
al dispositivo
Conveniente para programar en
sistemas
Calibracin de datos
Serializacin de datos

Pin
Pin
VPP
PP
VDD
DD
VSS
SS
RB6
RB7

Function
Function
Programming Voltage
Supply Voltage
Ground
Clock Input
Data I/O & Command Input

Suportado por debuggers y


programadores en MPLAB

ICSP Connector

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 15

Caractersticas Especiales PIC18F


Amplio Voltaje de operacin: 2.0V a 5.5V
Memoria de Programa Flash Mejorada con
100,000 ciclos de borrado/escritura
Memoria de Datos EEPROM con 1,000,000 de
ciclos de borrado/escritura
Retencin de Datos en Memoria EEPROM
Flash/Data : 100 aos tpico

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 16

Watchdog Timer
Ayuda al software a recuperarse de un mal
funcionamiento
Usa un oscilador libre RC en el chip
WDT es borrado por la instruccin CLRWDT
WDT Habilitable (WDTEN) no puede ser borrado por soft
el overflow (desborde) del WDT reetea al chip
Perodo del timeout programable : 18ms a 3.0s tpico
Opera en modo SLEEP; sobre el time out, despierta la
CPU.

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 17

Generador de Reset Interno


POR: Power On Reset
con MCLR ataado a VDD, es generado
un pulso de RESET cuando el flanco
de subida a VDD es detectado

VDD
MCLR

Circuito
RESET
en CHIP

Reset
Interno

PWRT: Power Up Timer


72 ms (nominal)
Desacoplado del BOR

VDD

OST: Oscillator Startup Timer


Mantiene en RESET al dispositivo por
1024 cyclos de maquina (TCYs)
Le permite al cristal o al resonador
estabilizarse
Bypaseado en: Two Speed Startup
Mode
INTOSC usa un clock para el
Internal
procesador no estable
Reset

MCLR
POR
PWRT

TPWRT
TOST

OST

2011 Microchip Technology Incorporated. All Rights Reserved.

Reset

Operacin
Slide 18

BOR Brown Out Reset


Cuando el voltaje cae por debajo de un umbral
particular, el dispositivo se pone en RESET
Impide el funcionamiento irregular o inesperado
Elimina la necesidad de un circuito externo BOR

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 19

PBOR Programmable Brown Out


Reset
Opcin de configuracin (fijado en tiempo de
programa)
No puede ser activado/desactivado por
software
Cuatro puntos de disparo BVDD seleccionables
2.5V Mini VDD para OTP MCUs PICmicro
2.7V
4.2V
4.5V
Para otros umbrales use un supervisor externo
(MCP1xx, MCP8xx/TCM8xx, or TC12xx)
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 20

PBOR Programmable Brown Out


Reset
Mantiene al MCU PICmicro MCU en RESET durante ~72ms despues que VDD supero el nivel de umbral

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 21

PLVD Detector de Bajo Voltaje


Programable
Alerta antes que el
brown out
16 Puntos de
disparo
seleccionables
1.8V hasta 4.5V en
pasos de 0.1 a
0.2V
Entrada analgica
externa

VREF interno
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 22

PIC18F Caractersticas especiales


Resets

PIC18 RESETS
Power-on Reset (POR)
MCLR Reset durante la operacin normal
Programmable Brown-out Reset (BOR)
Watchdog Timer (WDT) Reset (durante la
ejecucin )
Instruccin RESET
Reset por Stack Full
Reset por Stack Underflow

Para todos los resets el vector del PC es la


direccin 0
Despues del RESET el PC tiene 0x000000
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 23

PIC18F Caractersticas especiales


RESET Registers

Los siguientes bits son afectados por el RESET


RCON Register
POR = 0: Power On RESET
BOR = 0 & POR = 1: BOR RESET
TO = 0: WDT RESET
RI = 0: RESET Instruccin

STKPTR Register
STKFUL = 1: Stack over flow RESET
STKUNF = 1: Stack under flow RESET

MCLR RESET ies indicado por:


POR, BOR, TO & RI = 1 y STKFUL & STKUNF = 0

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 24

PIC18 Bits de Configuracin

Que son los bits de Configuracin?

Registro CONFIGlocalizado en la
memoria de programa, fuera del
area de ejecucin del cdigo
(inicia en @ 0x300000)

Reset Vector
High Interrupt Vector
Low Interrupt Vector
User
Memory

Proteccion del Codigo


Watchdog Timer
Tipo de Oscilador
Opcion de Debug
Otras

16-bit Program Memory

User Flash

Registros de Configuracin

2011 Microchip Technology Incorporated. All Rights Reserved.

Device ID

Configuration
Memory

Son usados para activar o no


las caractersticas especiales:

Slide 26

Bits de Configuracin
PIC18F4520 (4 of 11)
CONFIG1H Register
R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

IESO

FCMEN

FOSC3

FOSC2

FOSC1

FOSC0

bit 7

bit 0

CONFIG2L Register
R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

BORV1

BORV0

BOREN1

BOREN0

PWRTEN

bit 7

bit 0

CONFIG2H Register
R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

WDTPS3

WDTPS2

WDTPS1

WDTPS0

WDTEN

bit 7

bit 0

CONFIG3H Register
R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

MCLRE

LPT1OSC

PBADEN

CCP2MX

bit 7

bit 0
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 27

Configurations Bits con CCS


Usar directiva #FUSES

#fuses HS,NOWDT
options puede variar segun el
dispositivo. Un listado de las opciones
vlidas esta en el tope de cada archivo de
cabecera de cada dispositivo.

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 28

PIC18F1x50

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 29

PIC18F14K50 Pin Out

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 30

USB Fundamentos

Un poco de historia...
USB fue co-desarrollado por un grupo de
compaas.
Compaq
Intel
Microsoft
NEC
quera hacer mucho mas facil el adicionar/remover
perifericos de la PCs

1998 USB 1.1


2000 USB 2.0
2003 On-the-Go complementa a USB 2.0 (v1.0a)
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 32

USB Basico
USB un maestro Single Master + Multiple Slaves bus encuestado
constantemente
USB Host Controller (Master)
y Root Hub

Mouse
Start Of Frame

Frame

Printer
Mouse Packets

Speakers Packets

Frame
2011 Microchip Technology Incorporated. All Rights Reserved.

Speakers
Printer Packets

Frame
Slide 33

Comparacin de Buses
1394-Fire Wire

Ojo! No tiene que


soportar HighSpeed para ser
USB 2.0 Compatible

Ethernet
WiFi (b/g)

USB 2.0
LS-USB
1.5 Mb/s
CAN

HS-USB
480 Mb/s

USB 1.1

Serial Port
500 Kb/s

FS-USB
12 Mb/s

Parallel Port
1 Mb/s

1.5 Mb/s

12 Mb/s

100 Mb/s 480 Mb/s 1 Gb

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 34

Grandes Mitos
Mito: un Perifrico USB Low-Speed puede transferir datos
hasta la velocidad de 187.5 KB/s (1.5 Mbps)

Real: Imposible, por las restricciones de las


especificaciones del USB

8 byte de datos transferidos cada 10 ms


= 800 Bytes/segundo solamente

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 35

Siguiente Gran Mito!


Mito: Un perifrico USB Full-Speed USB puede transferir datos hasta
1.5 MB/s (12 Mb/s)

Real: Imposible, 1.5 MB/s es el total del ancho de banda del BUS
El ancho de banda se reparte entre todos los perifricos USB
El Over head del Protocolo
Las restricciones del Protocolo
La realidad de la transferencia de datos de un nico perifrico
puede llegar a ~1.0 MB/s en el mejor de los casos
Solo 64 KB/s en la mayora de los casos

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 36

Topologa del BUS USB Fsico


USB Host Controller
& Root Hub

Host (Tier 1)

Tier 2

Speaker

Hub

Tier 3

Logic
Analyzer

Hub

Tier 4

Printer

Hub

Tier 5
Tier 6
Tier 7

Keyboard

Hub: Carga maxima = 5

Hub
Hub
Data Logger

Hasta 126 perifricos...

Hub

PIC18 USB esta diseado


para ser periferico.
PIC24/PIC32 puede
funcionar como Host o
Perifrico.

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 37

Interfaz Fsica

VBUS

VBUS

D+

D+

D-

D-

GND

GND

~ 5.0 V
~ 3.3 V

Half Duplex con codificacin de datos NRZI


Bus Alimentado para cada dispositivo:
4.40-5.25V
Garantizado 100 mA
500 mA max por medio de negociacin
2011 Microchip Technology Incorporated. All Rights Reserved.

Debe usar
alimentacin externa
si se necesita mas de
uno
Slide 38

Conectores Standard
- USB 2.0 A
USB Host

B
FS, HS
Device

mini-B
FS, HS
Device

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 39

Conectores Standard
- Micro-USB -

Objetivo: Define un tamao ms pequeo, conector


compatible con USB 2.0 para dispositivos muy
pequeos (es decir, telfonos celulares)

Plugs y Receptaculos
Micro-B plug y receptaculo
Permitido en productos OTG y on OTG

Micro-A/B receptaculo
Permitido en productos OTG

Micro-A plug
Indicacual es escencialmente el host (OTG)
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 40

Endpoints: Source/Destino de datos


USBen un perifrico
Data Bucket
USB PIC MCU
USB framed data

USB framed data

RAM
Endpoint 1 IN

LED

Caps-Lock

Nmero mximo de endpoints por dispositivo especificados por el


USB :

RAM
Endpoint 1 OUT

16 OUT endpoints + 16 IN endpoints = 32 endpoints


PIC18F87J50, PIC18F4550, PIC24F, PIC32MX soporta hasta 32
endpoints
PIC18F14K50 soporta hasta 16 endpoints

EP0 = es el cao de comunicacin por Default


2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 41

Clases de Dispositivos USB


Floppy
Drive

Data Glove

Ethernet
Adapter

Mouse
External
Hard Drive
PICkit 3
Starter Kit
Joystick

Keyboard

Modem

Mass Storage Device


Class (MSD)

Communication Device
Class (CDC)

MPLAB
REAL ICE
in-circuit emulator

Custom Class
(Vendor Class)

Human Interface Device Class


(HID)

Muchas mas clases.


2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 42

El Proceso de Enumeracin
Power
(self/bus)

POWERED

Bus
reset

ATTACHED

DEFAULT

Cable
Connecte
d

Get Device
Descriptor
SUSPENDED

DETACHED

ADDRESS
Get
Descriptor
s
CONFIGURED

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 43

Auto-Deteccin: Full-Speed
Peripheral Device

VUSB 3.3 V

USB PIC MCU

Full Speed Identification


D+ line pull-up

1.5 k5%
+5V
D+

Transceiver

DGND

USB
Connector

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 44

Auto-Deteccin: Low-Speed
Peripheral Device

VUSB 3.3 V

USB PIC MCU

Low Speed Identification


D- line pull-up

1.5 k5%
+5V
D+

Transceiver

DGND

USB
Connector

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 45

Resistores Pull-up dentro del chip


Peripheral Device

USB PIC MCU

VUSB 3.3 V
resistores pull-up
dentro del chip!
+5V
D+

Transceiver

DGND

USB
Connector

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 46

Planeando la Alimentacin
- Arquitectura -

Low Power alimentado del bus


Hasta 100 mA (1 carga nica) desde el BUS

Function Controller +
Function

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 47

Planeando la Alimentacin
- Arquitectura -

High Power
100-500 mA desde el bus
Debe ser enumerado a low power (100 mA)
Device pide el bMaxPower
Host habilita la configuracin deseada
solicitando el Set_Configuration

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 48

Planeando la Alimentacin
- Arquitectura -

Self Powered device


Opcionalmente se puede consumir hasta 100 mA
del bus (si es reactivado) + tanto como se
encuentra disponible en su propia fuente

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 49

Planeando la Alimentacin
- Necesito Autoalimentacin? -

Deber alimentarse al dispositivo


externamente si:
este necesita funcionar sin estar conectado
al BUS
este necesita mas de 500 mA
Este va a estar conectado a una PC con
bateras, o hubs

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 50

Planeando la Alimentacin

VDD

Power from
USB Cable

10F

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 51

Dispositivos alimentado externamente


- Detectando la conexin al USB Self-Powered
VBUS from
USB Cable

VDD
I/O

Si el dispositivo est autoalimentado,


debe utilizar un pin I / O con
tolernacia 5V al detectar una
conexin del cable antes de habilitar
el mdulo USB y pull-up en D + y D-.
Adems, el dispositivo no debe nunca
estar en modo fuente VBUS

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 52

Scalable USB
PIC MCU Portfolio
~50 USB PIC MCUs

Performance

The industrys strongest


scalable product, family,
and software migration path

PIC32
High Performance, Pin Compatible to PIC24F
80 MHz, 1.53 DMIPS/MHz
Up to 80 MIPS
64- & 100-Pin Packages
Up to 512 KB Flash
Up to 32 KB RAM
USB 2.0 Device, Embedded Host, OTG

PIC24F
Mid-Range, Capacitive-Touch Capable
Up to 16 MIPS
64-, 80- & 100-Pin Packages
Up to 256 KB Flash
Up to 16KB RAM
USB 2.0 Device, Embedded Host, OTG

PIC18F
Small, Low Power, Low Cost
Up to 12 MIPS
18- to 80-Pin Packages
Up to 128KB Flash
Up to 4KB RAM
USB 2.0 Device Support

a
gr
e
t
In

nm

o
r
B vi
LA En
P
M e nt
d
e
ifi lopm
n
U ve
De
d
te

t
en

32-bit
16-bit
8-bit

Migration
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 53

Control USB with CCS compiler


usb_init()
usb_task()
usb_enumerated()
usb_cdc_kbhit()
usb_cdc_getc()
usb_cdc_putc(c)
usb_cdc_puts(*str)
Include files:
<usb_desc_cdc.h> & <usb_cdc.h>
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 54

PICPerifricos Comunes

PIC18 Common Peripherals


Puertos I/O
Analog Comparator
Converso Analgico Digital
Timers (0,1,2,3)
CCP como PWM
Addressable USART (AUSART)

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 56

Puertos I/O

Puertos I/O
Hasta 70 pines bidireccionales
Los mismos estan multiplexados con Perifricos

Alta capacidad de Corriente


25mA en modo fuente/sumidero

Manipulacin directa de cada bit en un solo


ciclo
Diodos de Proteccin ESD 4kV
Basado sobre el modelo del cuerpo Humano

Despues del reset:


Todos los I/O son entradas (Hi-Z)
Todos los pines con capacidades analgicas
activadas por default
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 58

Configurundo los pines como digitales


El mtodo depende del dispositivo especfico
Puede escontrarse en el registro ADCON 1
Port Configuration Bits

Registro de control (ADCON1)

Could be in ADCON1 register


VCFG1
VCFG1 VCFG0
VCFG0 PCFG3
PCFG3 PCFG2
PCFG2 PCFG1
PCFG1 PCFG0
PCFG0

Puede encontrarse en el registro ANSEL


1 = Analog; 0 = Digital

Analog Select Register (ANSEL)


ANS7
ANS7 ANS6
ANS6 ANS5
ANS5 ANS4
ANS4 ANS3
ANS3 ANS2
ANS2 ANS1
ANS1 ANS0
ANS0

Analog Select High Register (ANSELH)


ANS13
ANS13 ANS12
ANS12 ANS11
ANS11 ANS10
ANS10 ANS9
ANS9 ANS8
ANS8

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 59

Control de la direccin I/O

Bit n en el registro de control TRISx


controla la direccin en el Bit n en PORTx
1 = Entrada, 0 = Salida
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 60

Entrada Slida de Datos


Registros TRIS, PORT y LAT
Bus Interno de Datos

Escribe
PORTx
o LATx

LATx

Lee
LATx

0 1 0 1 0 0 1 1

PORTx
(I/O Pins)
TRISx

Lee
PORTx

Pines son todos


entradas por default

Direccin de Datos
0 0 1 1 0 1 0 0 (1 = IN, 0 = OUT)
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 61

PORTB Opciones
Todos lod pines del PORTB tienen resistores de PULL UP.
Un bit controla el pull up de todos los pines
INTCON2 Register
R/W-1

R/W-1

R/W-1

R/W-1

U-0

R/W-1

bit 7

bit 7

U-0

R/W-1
bit 0

RBPU: PORTB Pull-up Enable bit


1 = All PORTB Pull-ups are disabled
0 = PORTB Pull-ups are enabled by
individual port latch values

bit 0

RBIP: RB Port Change Interrupt Priority bit


1 = High Priority
0 = Low Priority
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 62

Control I/O con CCS


output_a (value)
output_bit (pin, value)
output_high (pin)
output_low (pin)
output_toggle(pin)
variable = input (pin)
variable = input_a()

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 63

Conversor A/D:
A/D de 10-bit

Conersor A/D de 10-bit


Channel Select

CHS3:CHS0

In ADCON0 Register

AN12
AN12
AN9
AN8
AN7*
AN6*
AN5*
AN4

VREF+ / AN3
VREF- / AN2

13:1 Analog Mux

AN10

VAIN

10-bit A/D Result Registers

ADC
VREF+

AN1

ADRESH

ADRESL

VREF-

VDD

AN0

x0
x1
1x
0x

VSS
VREF Select VCFG1:VCFG0 In ADCON1 Register
2011 Microchip Technology Incorporated. All Rights Reserved.

*AN5-AN7 not available on 28-pin devices


Slide 65

ADC 10-bit
Escalando resultados
FS = Fondo de
escala

N-bits, 2N Codigos
posibles

Tamao del Bit o


Paso = VFS/2N

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 66

ADC 10-bit
Escalando resultados
Ejemplo:
10-bits ADC => 210 = 1024 codigos
Escala de valores completa 0 5.12 V
Cual es el tamao de un bit?

Respuesta:
Tamao del Bit = 5.12 / 1024 = 5 mV

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 67

ADC Interpretando los resultados


Ejemplo:
8-bits ADC => 28
Escala completa 0 5.0 V
1 Bit = 19.53 mV

Calculo del valor si ADRESH = 0xCA


Result = VIN / Tamao del Bit
VIN = Result * Tamao del Bit
VIN = 202 * 19.53 mV
VIN = 3.9456 V
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 68

Adquisicin de la seal
Acquisition Time

Conversion Time

time
VC
ADRES
10

Tiempo de adquisicin
determinado por la
capacidad CHold y la
Impedancia de fuente

ADC
+
VC
-

CHOLD

Este tiempo le permite


cargarse completamente a
CHold

VIN

time
SOURCE
RS < 10k

VSS
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 69

ADC Conversion
Acquisition Time

Conversion Time
Time
Acquisition

time
VC
ADRES

VIN

ADC Result
time
11 ADC Conversion
Clock cycles (TAD)

10

ADC

time
+
VC
-

CHOLD
VSS

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 70

Conversor A/D de 10-bit


Configuracin
ADCON0 Register
U-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

bit 7

bit 5-2

bit 0

CHS3:CHS0
Analog Channel Select Bits
0000 =
0001 =
0010 =
0011 =
0100 =
0101 =
0110 =
0111 =
1000 =
1001 =
1010 =
1011 =
1100 =

Channel 0 (AN0)
Channel 1 (AN1)
Channel 2 (AN2)
Channel 3 (AN3)
Channel 4 (AN4)
Channel 5 (AN5)
Channel 6 (AN6)
Channel 7 (AN7)
Channel 8 (AN8)
Channel 9 (AN9)
Channel 10 (AN10)
Channel 11 (AN11)
Channel 12 (AN12)

bit 1

GO/DONE: A/D Conversion Status bit


1 = A/D Conversion in progress
0 = A/D Idle

bit 0

ADON: A/D On bit


1 = A/D Converter module is enabled
0 = A/D Converter module is disabled

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 71

Conversor A/D de 10-bit


Configuracin
ADCON1 Register
U-0

U-0

R/W-0

R/W-0

R/W-0*

R/W*

bit 7

R/W*

R/W*
bit 0

bit 5

VCFG1: Voltage Reference (VREF-) Configuration bit


1 = VREF- (AN2)
0 = VSS

bit 4

VCFG0: Voltage Reference (VREF+) Configuration bit


1 = VREF+ (AN3)
0 = VDD

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 72

Conversor A/D de 10-bit


Configuracin
ADCON1 Register
U-0

U-0

R/W-0

R/W-0

R/W-0*

R/W*

bit 7

R/W*

R/W*
bit 0

bit 3-0 PCFG3:PCFG0


A/D Port Configuration Control bits

A = Analog Input
D = Digital I/O

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 73

Conversor A/D de 10-bit


Configuracin
ADCON2 Register
U-0

U-0

R/W-0

R/W-0

R/W-0*

R/W*

R/W*

bit 7

R/W*
bit 0

NOTE: This parameter determines the value of TAD: the conversion time per bit.
bit 2-0 ADCS2:ADCS0: A/D Conversion Clock Selection bits
111 = FRC (Clock derived from A/D RC oscillator)
110 = FOSC/64
101 = FOSC/16
100 = FOSC/4
011 = FRC (Clock derived from A/D RC oscillator)
010 = FOSC/32
001 = FOSC/8
000 = FOSC/2
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 74

Conversor A/D de 10-bit


Configuracin

Seleccionando el clock del A/D

A/D Clock Source (TAD


)
AD

Maximum Device Frequency

Operation

ADCS2:ADCS0

PIC18F4520

2 TOSC
OSC

000

2.86 MHz

4 TOSC
OSC

100

5.71 MHz

8 TOSC
OSC

001

11.43 MHz

16 TOSC
OSC

101

22.86 MHz

32 TOSC
OSC

010

40.0 MHz

64 TOSC
OSC

110

40.0 MHz

RC

x11

At FOSC = 4 MHz:
TOSC = 1/FOSC
= .25 s
TAD

= 4TOSC
= 1 s

* The Internal RC has a typical TAD time of 1.2s

Minimum TAD = 0.7s

See data sheet for official specification.


2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 75

Conversor A/D de 10-bit


Configuracin

Calculando el tiempo de adquisicin

TACQ = TAMP + TC + TCOFF


TAMP
TC
TCOFF

= Amplifier Settling Time


= Tamp internal + Tamp external
= Charging Time
= -(CHOLD)(RIC + RSS + RS)ln(1/2047)s
= Temperature Coefficient
= (Temp 25C)(0.02s/C) for Temp > 25C
= 0 for Temp < 25C
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 76

Conversor A/D de 10-bit


Configuracin

Calculando el tiempo del amplificados

TAMP = TAMP INT+ TAMP EXT


TAMP INT : Tiempo interno del amplificador. Chequear el data sheet para el
dispositivo especfico. Para el PIC18F4520, TAMP INT es 0.2 s.
TAMP EXT: Es el tiempo del amplificador externo. Este es muy importante
cuando el circuito externo acondiciona la seal. Para la placa de
micorochip PICDEM2 Plus es un POTENCIOMETRO, y este nmero es 0 s.

TAMP = 0.2 s

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 77

Conversor A/D de 10-bit


Configuracin

Calculando el Tiempo de Carga


TC = -(CHOLD)(RIC + RSS + RS)ln(1/2047)s
CHOLD
RIC
RSS
RS

= 25pF
= 1k
= 2k
= 2.5k MAX

Asumiendo que la impedancia mxima es de


2.5k :
TC = 1.05s
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 78

Conversor A/D de 10-bit


Configuracin

Calculando el coeficiete de temperatura

TCOFF = (Temp 25C)(0.02s/C)


Temp = Temperatura de Operacin
Valido para Temp. > 25C.
TCOFF = 0 para Temp. < 25C
Usando la mxima temperatura de operacin
de 85C para un dispositivo industrial:
TCOFF = 1.2s
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 79

Conversor A/D de 10-bit


Configuracin

Calculando el Tiempo de adquisicin

TACQ = TAMP + TC + TCOFF


Para Rs = 2.5k
Temp. = 85 C
TAMP = 0.2 s

TACQ = 0.2 + 1 + 1.2 = 2.4 s


2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 80

Conversor A/D de 10-bit


Configuracin
ADCON2 Register
U-0

U-0

R/W-0

R/W-0

R/W-0*

R/W*

R/W*

bit 7

R/W*
bit 0

bit 5-3 ACQT2:ACQT0: A/D Acquisition Time Selection bits


111 = 20 TAD
110 = 16 TAD
101 = 12 TAD
100 = 8 TAD
011 = 6 TAD
010 = 4 TAD
001 = 2 TAD

Given:
TACQ = 2.4 s
TAD = 1 us
Then:
ACQT2:0 = 010 = 4.0 s

000 = 0 TAD

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 81

Conversor A/D de 10-bit


Configuracin
ADCON2 Register
R/W-0

U-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

bit 7

R/W-0
bit 0

bit 7

ADFM: Selecciona el resultado del formato del A/D


1 = Justificado a la derecha
ADRESH

ADRESL
b99

b88

b77

b66

b55

b44

b33

b22

b11

b00

0 = Justificado a la izquierda
ADRESH
b99

b88

b77

ADRESL
b66

b55

b44

b33

b22

b11

b00

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 82

Control ADC con CCS


setup_adc(mode)
setup_adc_ports(value)
set_adc_channel(channel)
read_adc(mode)
adc_done()
#device adc=xx (xx=8,10,12 o16 bits)

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 83

Timers

Timer Comparativa
TIMER 0

TIMERS 1 & 3

TIMERS 2 & 4

SIZE OF REGISTER

8-bits or
16-bits

16-bits

8-bits

CLOCK SOURCE
(Internal)

Fosc/4

Fosc/4

Fosc/4

CLOCK SOURCE
(External )

T0CKI pin

T13CKI pin or
Timer 1 oscillator
(T1OSC)

None

CLOCK SCALING
AVAILABLE
(Resolution)

Prescaler 8-bits
(1:21:256)

Prescaler 2-bits
(1:1, 1:2, 1:4, 1:8)

Prescaler
(1:1,1:4,1:16)
Postscaler
(1:11:16)

INTERRUPT EVENT

On overflow
FFh00h

On overflow
FFFFh0000h

TMR REG matches


PR2

CAN WAKE PIC FROM


SLEEP?

NO

YES

NO

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 85

Timer0
Modo compatible con PIC16

8-bit Timer/Counter
Prescaler Programable de 8 bits
Fuente de clock externa o interna
Interrupcin sobre el overflow de FF a 00
FOSC/4

TMR0IF

0
1

T0CKI

T0SE

Programmable
Prescaler

Clock
Sync

TMR0L

T0CS
T0PS2:T0PS0

PSA
8-bit Data Bus

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 86

Timer0
Modo 16-bit

16-bit Timer / Counter


Modo Lectura/Escritura en 16-bit
Interrupcin sobre overflow de FFFF a 0000
Same basic features as compatibility mode
FOSC/4

TMR0IF

0
1

T0CKI

T0SE

Programmable
Prescaler

T0CS
T0PS2:T0PS0

Clock
Sync

High Byte

TMR0L

READ
TMR0L

PSA

WRITE
TMR0L

TMR0H

8-bit Data Bus


2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 87

Timer0 Operation
FOSC/4

TMR0IF

0
1

T0CKI

T0SE

Programmable
Prescaler

Clock
Sync

T0CS
T0PS2:T0PS0

PSA

DATA BUS

T0CON Register
TMR0ON

T08BIT

TMR0L

T0CS

T0SE

PSA

T0PS2:0

T08BIT
1 = 8 BIT
0 = 16 BIT
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 88

Timer0 Operation
FOSC/4

TMR0IF

0
1

T0CKI

T0SE

Programmable
Prescaler

Clock
Sync

READ
TMR0L

T0CS
T0PS2:T0PS0

PSA

T0CON Register
TMR0ON

T08BIT

T0CS

High Byte

TMR0L
WRITE
TMR0L

TMR0H

DATA BUS

T0SE

PSA

T0PS2:0

T08BIT
1 = 8 BIT
0 = 16 BIT
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 89

Timer0 Operation
FOSC/4

TMR0IF

0
1

T0CKI

T0SE

Programmable
Prescaler

Clock
Sync

READ
TMR0L

T0CS
T0PS2:T0PS0

High Byte

PSA

TMR0L
WRITE
TMR0L

TMR0H

T0CON Register
TMR0ON

T08BIT

T0CS

T0SE

PSA

T0PS2:0

TMR0 Clock Source Select


1 = TOCK1, 0 = Fosc/4

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 90

Timer0 Operation
FOSC/4

TMR0IF

0
1

T0CKI

T0SE

Programmable
Prescaler

Clock
Sync

TMR0L

READ
TMR0L

T0CS
T0PS2:T0PS0

High Byte

PSA

WRITE
TMR0L

TMR0H

T0CON Register
TMR0ON

T08BIT

T0CS

T0SE

PSA

T0PS2:0

Source Edge Select


1 = increment TMR0 on rising edge
0 = increment TMR0 on falling edge

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 91

Timer0 Operation
FOSC/4

TMR0IF

0
1

T0CKI

T0SE

Programmable
Prescaler

Clock
Sync

READ
TMR0L

T0CS
T0PS2:T0PS0

High Byte

PSA

TMR0L
WRITE
TMR0L

TMR0H

T0CON Register
TMR0ON

T08BIT

T0CS

T0SE

PSA

T0PS2:0

Prescaler Assignment
1= prescaler NOT assigned
0= prescaler IS assigned
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 92

Timer0 Operation
FOSC/4

TMR0IF

0
1

T0CKI

T0SE

Programmable
Prescaler

Clock
Sync

TMR0L

READ
TMR0L

T0CS
T0PS2:T0PS0

High Byte

PSA

WRITE
TMR0L

TMR0H

PS2

PS1

PS0

TMR0
RATE

1:2

1:4

1:8

1:16

1:32

1:64

1:128

1:256

DATA BUS

T0CON Register
TMR0ON

T08BIT

T0CS

T0SE

PSA

T0PS2:0

Prescaler Rate Select Bits

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 93

Timer0 Operation
FOSC/4

TMR0IF

0
1

T0CKI

T0SE

Programmable
Prescaler

Clock
Sync

READ
TMR0L

T0CS
T0PS2:T0PS0

High Byte

PSA

TMR0L
WRITE
TMR0L

TMR0H

T0CON Register
TMR0ON

T08BIT

T0CS

T0SE

PSA

T0PS2:0

TMR0ON
1 = ON
0 = STOPPED
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 94

Timer1 and Timer3


16-bit Timer / Counter
Timer, Synchronous Counter or Asynchronous
Counter
Can operate from separate external crystal
Two read/write 8-bit registers
1, 2, 4, or 8 Prescaler
Interrupt on overflow from FFFFh to 0000h

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 95

Timer1 and Timer3


Timer 1 Oscillator

T1OSO/
T13CKI

FOSC/4

T1OSI

Prescaler
1, 2, 4, 8

Sync
Detect

Sleep Input

T1OSCEN

T1SYNC

TMR1CS
TMR1ON

T1CKPS1: T1CKPS0

TMR1IF
Clear Timer 1
(CCP Special Event Trigger)

High Byte

TMR1L

READ
TMR1L

RD16
Bit 7

T1RUN

TCKPS1:0 T1OSCE
N

T1SYNC TMR1CS TMR1ON

T1CON Register

WRITE
TMR1L

TMR1H

Bit 0

8-bit Data Bus


2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 96

Timer1 and Timer3


Timer 1 Oscillator

T1OSO/
T13CKI

FOSC/4

T1OSI

Prescaler
1, 2, 4, 8

Sync
Detect

Sleep Input

T1OSCEN

TMR1ON

TMR1IF
TMR1H

T1RUN

TCKPS1:0

TMR1L

Clear Timer 1
(CCP Special Event Trigger)

8-bit Data Bus

T1CON Register
RD16

T1SYNC

TMR1CS
T1CKPS1: T1CKPS0

16-bit Read/Write Mode Enable


1 = Read/Write of Timer
in one operation
0 = Read/Write of Timer
in two 8-bit operations

T1OSCEN

T1SYNC

TMR1CS TMR1ON

Bit 7

Bit 0
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 97

Timer1 and Timer3


Timer 1 Oscillator

T1OSO/
T13CKI

FOSC/4

T1OSI

Prescaler
1, 2, 4, 8

Sync
Detect

Sleep Input

T1OSCEN

16-bit Read/Write Mode Enable


1 = Read/Write of Timer
in one operation
0 = Read/Write of Timer
in two 8-bit operations

T1SYNC

TMR1CS
TMR1ON

T1CKPS1: T1CKPS0

TMR1IF

Clear Timer 1
(CCP Special Event Trigger)
High Byte

TMR1L

READ
TMR1L

WRITE
TMR1L

TMR1H

T1CON Register
RD16

T1RUN

TCKPS1:0

8-bit Data Bus


T1OSCEN

T1SYNC TMR1CS TMR1ON

Bit 7

Bit 0
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 98

Timer1 and Timer3


Timer 1 Oscillator

T1OSO/
T13CKI

FOSC/4

T1OSI

Prescaler
1, 2, 4, 8

Sync
Detect

Sleep Input

T1OSCEN

T1SYNC

TMR1CS
TMR1ON

T1CKPS1: T1CKPS0

TMR1IF

Timer1 Oscillator Enable


1 = T1OSC Enabled
0 = T1OSC off

Clear Timer 1
(CCP Special Event Trigger)

High Byte

TMR1L

READ
TMR1L

WRITE
TMR1L

TMR1H

T1CON Register
8-bit Data Bus
RD16

T1RUN

TCKPS1:0

T1OSCEN

T1SYNC

TMR1CS TMR1ON

Bit 7

Bit 0
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 99

Timer1 and Timer3


Timer 1 Oscillator

T1OSO/
T13CKI

FOSC/4

T1OSI

Prescaler
1, 2, 4, 8

Sync
Detect

Sleep Input

T1OSCEN

Bit 7

TCKPS1:0

High Byte

TMR1L

READ
TMR1L

T1CON Register
T1RUN

TMR1ON

TMR1IF
Clear Timer 1
(CCP Special Event Trigger)

RD16

T1SYNC

TMR1CS
T1CKPS1: T1CKPS0

Timer1 Clock Source


1= External Clock
0 = Fosc/4

T1OSCEN

T1SYNC TMR1CS TMR1ON

WRITE
TMR1L

TMR1H

Bit 0

8-bit Data Bus

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 100

Timer1 and Timer3


Timer 1 Oscillator

T1OSO/
T13CKI

FOSC/4

T1OSI

Prescaler
1, 2, 4, 8

Sync
Detect

Sleep Input

T1OSCEN

T1SYNC

TMR1CS
TMR1ON

T1CKPS1: T1CKPS0

Timer1 Prescale Select


11 = 1:8
10 = 1:4
01 = 1:2
00 = 1:1

TMR1IF
Clear Timer 1
(CCP Special Event Trigger)

High Byte

TMR1L

READ
TMR1L

T1CON Register
RD16
Bit 7

T1RUN TCKPS1:0

WRITE
TMR1L

TMR1H
T1OSCEN

T1SYNC TMR1CS TMR1ON


Bit 0

8-bit Data Bus

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 101

Timer1 and Timer3


Timer 1 Oscillator

T1OSO/
T13CKI

FOSC/4

T1OSI

Prescaler
1, 2, 4, 8

Sync
Detect

Sleep Input

T1OSCEN

TMR1IF
High Byte

TMR1L

READ
TMR1L

T1CON Register
Bit 7

TMR1ON

T1CKPS1: T1CKPS0

Clear Timer 1
(CCP Special Event Trigger)

T1RUN

T1SYNC

TMR1CS

Timer1 System Clock Status


Read Only Bit
1 = Device clock derived from Timer1 OSC
0 = Device clock derived from another source

RD16

TCKPS1:0 T1OSCEN

T1SYNC TMR1CS TMR1ON


Bit 0

2011 Microchip Technology Incorporated. All Rights Reserved.

WRITE
TMR1L

TMR1H

8-bit Data Bus

Slide 102

Timer1 and Timer3


Timer 1 Oscillator

T1OSO/
T13CKI

FOSC/4

T1OSI

Timer1 External Clock


Synchronization
Bit only used when TMR1CS = 1
1 = Synchronize external clock
input
0 = Do not synchronize

T1CON Register
Bit 7

T1RUN

Sync
Detect

TCKPS1:0 T1OSCEN

Sleep Input

T1OSCEN

RD16

Prescaler
1, 2, 4, 8

T1SYNC

TMR1CS
TMR1ON

T1CKPS1: T1CKPS0

TMR1IF
Clear Timer 1
(CCP Special Event Trigger)

High Byte

TMR1L

READ
TMR1L

T1SYNC TMR1CS TMR1ON

WRITE
TMR1L

TMR1H

Bit 0

8-bit Data Bus

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 103

Timer1 and Timer3


Timer 1 Oscillator

T1OSO/
T13CKI
T1OSI

FOSC/4

Prescaler
1, 2, 4, 8

Sync
Detect

Sleep Input

T1OSCEN

Timer On
1 = Enables Timer
0 = Stops Timer

T1SYNC

TMR1CS
TMR1ON

T1CKPS1: T1CKPS0

TMR1IF

Clear Timer 1
(CCP Special Event Trigger)

High Byte

TMR1L

READ
TMR1L

T1CON
Register
RD16
TCKPS1:0
T1RUN
Bit 7

T1OSCEN

T1SYNC TMR1CS TMR1ON

WRITE
TMR1L

TMR1H

Bit 0

8-bit Data Bus

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 104

Timer2
8-bit Timer with prescaler and postscaler
Used as PWM time base
TMR2 is readable & writable
TMR2 resets on match with PR2
Match with PR2 generates interrupt
Used as baud clock for MSSP (SPI )

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 105

Timer2
T2CON Register
R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

R/W-0

T2OUTPS3

T2OUTPS2

T2OUTPS1

T2OUTPS0

TMR2ON

T2CKPS1

T2CKPS0
bit 0

bit 7

00 = 1:1
01 = 1:4
1x = 1:16

0000 = 1:1
0001 = 1:2

TMR2 Postscale Value


Selection Bits
T2OUTPS3:T2OUTPS0

TMR2 Prescale Value


Selection Bits

1:1 to 1:16
Postscaler

1111 = 1:16
TMR2IF

T2CKPS1:T2CKPS0
Reset

FOSC/4

1:1, 1:4, 1:16


Prescaler

TMR2

Timer 2 Output
(To PWM or MSSP)

TMR2/PR2 Match

Comparator

PR2

8-bit Data Bus

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 106

Control Timers con CCS


setup_timer_x(mode)
set_timerx(value).
value=get_timerx.

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 107

PIC18 Interrupts

Interrupcin
Definicin

Interrupcin son llamadas a funciones disparadas por


eventos del Hardware, a dichas funciones no se les puede
pasar parmetros ni tampoco pueden devolver parmetros

PIC18 Tiene 2 vectores: Alta y Baja


Prioridad
Las funciones de interrupciones deben ser
tratadas de foema especial:
ISRs no reciben ni devuelven parmetros
ISRs no son llamadas por el cdigo principal
ISRs no son llamadas por otras funciones
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 109

Lgica de Interrupcin
Modo Legal o compatible con PIC16
TMR0IF

Core Interrupts

TMR0IE
Other Core
Interrupts

TMR1IF
TMR1IE

Wakeup
to CPU
Peripheral
Interrupts

Interrupt
to CPU
Vector to 0x0008

Other
Peripheral
Interrupts

GIE

PEIE

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 110

Lgica de Interrupcin
Modo Prioridad
IP
IE
IF

INT0IF

INT0IE
GIEH

Vector to 0x0008
High Priority
Interrupt to CPU
Wakeup to CPU

IP
IE
IF

Low Priority
Interrupt to CPU
GIEL

2011 Microchip Technology Incorporated. All Rights Reserved.

Vector to 0x0018

Slide 111

PIC18 Fuentes de Interrupcin


Fuentes de Interrupcin
3 o 4 Int. Externas (INT0-INT3)
Edge Triggered
Rising or Falling selected in INTCON2 register

PORTB Interrupcin por cambio (RB4-RB7)


Timer Rollover/Overflow
Cambio en la salida del comparador
Final de Conversin A/D
Eventos en el canal de comunicaciones
Eventos en otros perifricos

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 112

Habilitando las Interrupciones


(1 de 9)

Select Legacy or Priority mode interrupt


operation
Default is no priority levels
PIC16 Compatibility mode
RCON Register

IPEN

SBOREN

---

RI

TO

PD

POR

BOR

IPEN: Interrupt Priority Enable


1 = Enable priority levels on interrupts
0 = Disable priority levels on interrupt

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 113

Habilitando las Interrupciones


(2 de 9)
Set Peripheral Interrupt Priority
Only needed if using Priority Mode
1 = High Priority, 0 = Low Priority
IPR1 Register

PSPIP
PSPIP:
ADIP:
RCIP:
TXIP:

ADIP

RCIP

TXIP

Parallel Slave Interrupt Priority


A/D Converter Interrupt Priority
EUSART Rcv Interrupt Priority
EUSART Tx Interrupt Priority

SSPIP

SSPIP:
CCPIP:
TMR2IP:
TMR1IP:

CCP1IP

TMR2IP

TMR1IP

MSSP Interrupt Priority


CCP1 Interrupt Priority
Timer2 Interrupt Priority
Timer1 Interrupt Priority

IPR2 Register

OSCIP

CMIP

---

EEIP

OSCIP: Oscillator Fail Interrupt Priority


CMIP:
Comparator Interrupt Priority
---Unimplemented Bit
EEIP:
Data EEPROM/Flash Write
Operation Interrupt Priority

BCLIP

BCLIP:
HLVDIP:
TMR3IP:
CCP2IP:

HLVDIP

TMR3IP

CCP2IP

Bus Collision Interrupt Priority


High/Low Voltage Detect Interrupt Priority
Timer3 Interrupt Priority
CCP2 Interrupt Priority

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 114

Habilitando las Interrupciones


(3 de 9)
Ensure Peripheral Interrupt Flags are clear
If set, an interrupt is pending or being processed
1 = Set, 0 = Clear
PIR1 Register

PSPIF
PSPIF:
ADIF:
RCIF:
TXIF:

ADIF

RCIF

TXIF

Parallel Slave Interrupt Flag


A/D Converter Interrupt Flag
EUSART Rcv Interrupt Flag
EUSART Tx Interrupt Flag

SSPIF
SSPIF:
CCPIF:
TMR2IF:
TMR1IF:

CCPIF

TMR2IF

TMR1IF

MSSP Interrupt Flag


CCP1 Interrupt Flag
Timer2 Interrupt Flag
Timer1 Interrupt Flag

PIR2 Register

OSCIF

CMIF

---

EEIF

OSCIF: Oscillator Fail Interrupt Flag


CMIF:
Comparator Interrupt Flag
---Unimplemented Bit
EEIF:
Data EEPROM/Flash Write
Operation Interrupt Flag

BCLIF

BCLIF:
HLVDIF:
TMR3IF:
CCP2IF:

HLVDIF

TMR3IF

CCP2IF

Bus Collision Interrupt Flag


High/Low Voltage Detect Interrupt Flag
Timer3 Interrupt Flag
CCP2 Interrupt Flag

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 115

Habilitando las Interrupciones


(4 de 9)

Set Peripheral Interrupt Enables


1 = Enabled, 0 = Disabled
PIE1 Register

PSPIE
PSPIE:
ADIE:
RCIE:
TXIE:

ADIE

RCIE

TXIE

Parallel Slave Interrupt Enable


A/D Converter Interrupt Enable
EUSART Rcv Interrupt Enable
EUSART Tx Interrupt Enable

SSPIE
SSPIE:
CCPIE:
TMR2IE:
TMR1IE:

CCPIE

TMR2IE

TMR1IE

MSSP Interrupt Enable


CCP1 Interrupt Enable
Timer2 Interrupt Enable
Timer1 Interrupt Enable

PIE2 Register

OSCIE

CMIE

---

EEIE

OSCIE: Oscillator Fail Interrupt Enable


CMIE:
Comparator Interrupt Enable
---Unimplemented Bit
EEIE:
Data EEPROM/Flash Write
Operation Interrupt Enable

BCLIE

BCLIE:
HLVDIE:
TMR3IE:
CCP2IE:

HLVDIE

TMR3IE

CCP2IE

Bus Collision Interrupt Enable


High/Low Voltage Detect Interrupt Enable
Timer3 Interrupt Enable
CCP2 Interrupt Enable

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 116

Habilitando las Interrupciones


(5 de 9)

Set Core Interrupt Priority


INT0 does not have an
IP bit it is always a
high priority interrupt

Only needed if using Priority Mode


1 = High Priority, 0 = Low Priority
INTCON2 Register

RBPU

INTEDG0 INTEDG1 INTEDG2

---

TMR0IP

---

RBIP

TMR0IP: TMR0 Overflow Interrupt Priority


RBIP:
RB Port Change Interrupt Priority
INTCON3 Register

INT2IP
INT2IP:
INT1IP:

INT1IP

---

INT2IE

INT1IE

---

INT2IF

INT1IF

INT2 External Interrupt Priority


INT1 External Interrupt Priority

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 117

Habilitando las Interrupciones


(6 de 9)

Ensure Core Interrupt Flags are Clear


If set, an interrupt is pending or being processed
1 = Set, 0 = Clear
INTCON Register

GIE/GIEH PEIE/GIEL TMR0IE

INT0IE

RBIE

TMR0IF

INT0IF

RBIF

---

INT2IF

INT1IF

TMR0IF: TMR0 Overflow Interrupt Flag


INT0IF: INT0 External Interrupt Flag
RBIF:
RB Port Change Interrupt Flag
INTCON3 Register

INT2IP

INT1IP

--INT2IF:
INT1IF:

INT2IE

INT1IE

INT2 External Interrupt Flag


INT1 External Interrupt Flag

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 118

Habilitando las Interrupciones


(6 de 9)

Set Core Interrupt Enables


1 = Enabled, 0 = Disabled
INTCON Register

GIE/GIEH PEIE/GIEL TMR0IE

INT0IE

RBIE

TMR0IF

INT0IF

RBIF

INT2IF

INT1IF

TMR0IE: TMR0 Overflow Interrupt Enable


INT0IE: INT0 External Interrupt Enable
RBIE:
RB Port Change Interrupt Enable
INTCON3 Register

INT2IP

INT1IP

--INT2IE:
INT1IE:

INT2IE

INT1IE

---

INT2 External Interrupt Enable


INT1 External Interrupt Enable

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 119

Habilitando las Interrupciones


(8 de 9)

Enable Low Priority or Peripheral Interrupts


Still need to enable Global Interrupts when in PIC16 compatibility mode
INTCON Register

GIE/GIEH PEIE/GIEL TMR0IE

INT0IE

RBIE

TMR0IF

INT0IF

RBIF

PEIE/GIEL :
Peripheral Interrupt Enable (PIC16 Compatibility Mode) /
Global Interrupt Enable Low (Priority Mode)
In PIC16 Compatibility Mode (RCON<IPEN> = 0):
1 = Enables all unmasked peripheral interrupts
0 = Disables all peripheral interrupts
In Priority Mode (RCON<IPEN> = 1):
1 = Enables all low priority peripheral interrupts
0 = Disables all low priority peripheral interrupts
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 120

Habilitando las Interrupciones


(9 de 9)

Enable High Priority or Global Interrupts


INTCON Register

GIE/GIEH PEIE/GIEL TMR0IE

INT0IE

RBIE

TMR0IF

INT0IF

RBIF

GIE/GIEH :
Global Interrupt Enable (PIC16 Compatibility Mode) /
Global Interrupt Enable High (Priority Mode)
In PIC16 Compatibility Mode (RCON<IPEN> = 0):
1 = Enables all unmasked interrupts
0 = Disables all interrupts
In Priority Mode (RCON<IPEN> = 1):
1 = Enables all high priority interrupts
0 = Disables all high priority interrupts
2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 121

Control de interrupciones con CCS


Se usa la directiva #INT_XXX para indicar la
fuente de la interrupcion.
XXX=depende del perifrico interruptor

La rutina de interrupcin no puede recibir ni


pasar parmetros, debe ser void
Ejemplo:
#int_rda
void isr_recepcion (void)
{
sentencias
}

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 122

Thank You!

Trademarks
The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KeeLoq, microID, MPLAB, PIC,
PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC and SmartShunt are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other countries.
AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The Embedded
Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the
U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Linear
Active Thermistor, Mindi, MiWi, MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB,
PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart
Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their respective companies.

2011 Microchip Technology Incorporated. All Rights Reserved.

Slide 124

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