Electronic Devices and Circuit Theory

Semiconductor Diodes
Chapter 1

Ch.1 Summary

Diodes
The diode is a 2-terminal device.

A diode ideally conducts

in only one direction.

Ch.1 Summary

Diode Characteristics
Conduction Region

Non-Conduction Region

The voltage across the diode is 0 V

The current is infinite
The forward resistance is defined as
RF = VF / IF
The diode acts like a short

All of the voltage is across the diode

The current is 0 A
The reverse resistance is defined as
RR = VR / IR
The diode acts like open

Ch.1 Summary

Semiconductor Materials
Materials commonly used in the development of
semiconductor devices:

Silicon (Si)
Germanium (Ge)
Gallium Arsenide (GaAs)

Ch.1 Summary

Doping
The electrical characteristics of silicon and germanium are
improved by adding materials in a process called doping.
There are just two types of doped semiconductor materials:

n-type
n-type materials contain
an excess of conduction
band electrons.

p-type
p-type materials contain an
excess of valence band holes.

Ch.1 Summary

p-n Junctions
One end of a silicon or germanium crystal can be
doped as a p-type material and the other end as an
n-type material.

The result is a p-n junction

Ch.1 Summary

p-n Junctions
At the p-n junction, the excess conduction-band electrons
on the n-type side are attracted to the valence-band holes
on the p-type side.
The electrons in the n-type
material migrate across the
junction to the p-type material
(electron flow).
Electron migration results in a
negative charge on the p-type
side of the junction and a
positive charge on the n-type
side of the junction.

The result is the formation of a

depletion region around the
junction.

Ch.1 Summary

Diode Operating Conditions

A diode has three operating conditions:

No bias
Reverse bias
Forward bias

Ch.1 Summary

Diode Operating Conditions

No Bias
No external voltage is applied: VD = 0 V
There is no diode current: ID = 0 A
Only a modest depletion region exists

Ch.1 Summary

Diode Operating Conditions

Reverse Bias
External voltage is applied
across the p-n junction in
the opposite polarity of the
p- and n-type materials.

Ch.1 Summary

Diode Operating Conditions

Reverse Bias
The reverse voltage
causes the depletion
region to widen.
The electrons in the n-type
material are attracted
toward the positive terminal
of the voltage source.
The holes in the p-type material are attracted toward the negative
terminal of the voltage source.

Ch.1 Summary

Diode Operating Conditions

Forward Bias
External voltage is
applied across the p-n
junction in the same
polarity as the p- and ntype materials.

Ch.1 Summary

Diode Operating Conditions

Forward Bias
The forward voltage
causes the depletion
region to narrow.
The electrons and holes
are pushed toward the
p-n junction.
The electrons and holes have sufficient energy to cross the p-n junction.

Ch.1 Summary

Actual Diode Characteristics

Note the regions for no
bias, reverse bias, and
forward bias
conditions.
Carefully note the scale
for each of these
conditions.

Ch.1 Summary

Majority and Minority Carriers

Two currents through a diode:

Majority Carriers
The majority carriers in n-type materials are electrons.
The majority carriers in p-type materials are holes.

Minority Carriers
The minority carriers in n-type materials are holes.
The minority carriers in p-type materials are electrons.

Ch.1 Summary

Zener Region
The Zener region is in the diodes reverse-bias region.
At some point the reverse bias voltage
is so large the diode breaks down and
the reverse current increases
dramatically.
The maximum reverse voltage that
wont take a diode into the zener
region is called the peak inverse
voltage or peak reverse voltage.
The voltage that causes a diode to
enter the zener region of operation is
called the zener voltage (VZ).

Ch.1 Summary

Forward Bias Voltage

The point at which the diode changes from no-bias condition
to forward-bias condition occurs when the electrons and
holes are given sufficient energy to cross the p-n junction.
This energy comes from the external voltage applied across
the diode.
The forward bias voltage required for a:

gallium arsenide diode 1.2 V

silicon diode 0.7 V
diode 0.3 V

germanium

Ch.1 Summary

Temperature Effects
As temperature increases it adds energy to the diode.
It reduces the required forward bias voltage for forwardbias conduction.
It increases the amount of reverse current in the reversebias condition.
It increases maximum reverse bias avalanche voltage.
Germanium diodes are more sensitive to temperature variations
than silicon or gallium arsenide diodes.

Ch.1 Summary

Resistance Levels
Semiconductors react differently to DC and AC currents.
There are three types of resistance:

DC (static) resistance
AC (dynamic) resistance
Average AC resistance

Ch.1 Summary

DC (Static) Resistance
For a specific applied DC
voltage (VD) the diode has
a specific current (ID) and
a specific resistance (RD).

VD
RD
ID

Ch.1 Summary

AC (Dynamic) Resistance
In the forward bias region:

26 mV
rd
rB
ID

The resistance depends on the amount of current (ID) in the diode.

The voltage across the diode is fairly constant (26 mV for 25C).
rB ranges from a typical 0.1 for high power devices to 2 for low
power, general purpose diodes. In some cases rB can be ignored.

In the reverse bias region:

rd

The resistance is effectively infinite. The diode acts like an open.

Ch.1 Summary

Average AC Resistance
rav

Vd

Id

pt. to pt.

AC resistance can be
calculated using the
current and voltage values
for two points on the diode
characteristic curve.

Ch.1 Summary

Diode Equivalent Circuit

Ch.1 Summary

Diode Capacitance
When reverse biased, the depletion layer is very large. The diodes
strong positive and negative polarities create capacitance (C T). The
amount of capacitance depends on the reverse voltage applied.

When forward
biased, storage
capacitance or
diffusion
capacitance (CD)
exists as the diode
voltage increases.

Ch.1 Summary

Reverse Recovery Time (trr)

Reverse recovery time is the time required for a diode to
stop conducting when switched from forward bias to
reverse bias.

Ch.1 Summary

Diode Symbol and Packaging

The anode is abbreviated A

The cathode is abbreviated K

Ch.1 Summary

Curve Tracer
A curve tracer displays
the characteristic curve of
a diode in the test circuit.
This curve can be
compared to the
specifications of the
diode from a data sheet.

Ch.1 Summary

Other Types of Diodes

There are several types of diodes besides the standard
p-n junction diode. Three of the more common are:

Zener diodes
Light-emitting diodes
Diode arrays

Ch.1 Summary

Zener Diode
A Zener diode is one that
is designed to safely
operate in its zener
region; i.e., biased at the
Zener voltage (VZ).
Common zener diode voltage ratings
are between 1.8 V and 200 V

Ch.1 Summary

Light-Emitting Diode (LED)

An LED emits light when it is forward biased,
which can be in the infrared or visible spectrum.

The forward bias voltage is usually

in the range of 2 V to 3 V.

Electronic Devices and Circuit Theory

Boylestad

Diode Applications
Chapter 2

Ch.2 Summary

Load-Line Analysis
The load line plots all
possible combinations of
diode current (ID) and
voltage (VD) for a given
circuit. The maximum ID
equals E/R, and the
maximum VD equals E.
The point where the load line and the characteristic curve intersect is the
Q-point, which identifies ID and VD for a particular diode in a given circuit.

Ch.2 Summary

Series Diode Configurations

Forward Bias
Constants
Silicon Diode: VD = 0.7 V
Germanium Diode: VD = 0.3 V
Analysis (for silicon)
VD = 0.7 V (or VD = E if E < 0.7 V)
V R = E VD
I D = I R = IT = V R / R

Ch.2 Summary

Series Diode Configurations

Reverse Bias
Diodes ideally behave as
open circuits

Analysis
VD = E
VR = 0 V
ID = 0 A

Ch.2 Summary

Parallel Diode Configurations

V 0.7 V
D
V
V
V 0.7 V
D1
D2
o
V 9.3 V
R
E V
10 V .7 V
D
I

28 mA
R
R
.33 k
I

D1

D2

28 mA
2

14 mA

Ch.2 Summary

Half-Wave Rectification
The diode
conducts only
when it is
forward
biased,
therefore only
half of the AC
cycle passes
through the
diode to the
output.
The DC output voltage is 0.318Vm, where Vm = the peak AC voltage.

Ch.2 Summary

PIV (PRV)
Because the diode is only forward biased for one-half of
the AC cycle, it is also reverse biased for one-half cycle.
It is important that the reverse breakdown voltage rating of the
diode be high enough to withstand the peak, reverse-biasing AC
voltage.

PIV (or PRV) > Vm

Where PIV = Peak inverse voltage
PRV = Peak reverse voltage
Vm = Peak AC voltage

Ch.2 Summary

Full-Wave Rectification
The rectification process can be
improved by using a full-wave
rectifier circuit.
Full-wave rectification produces a
greater DC output:

Half-wave: Vdc = 0.318Vm

Full-wave: Vdc = 0.636Vm

Ch.2 Summary

Full-Wave Rectification

Bridge Rectifier
A full-wave rectifier with four
diodes that are connected in a
bridge configuration

VDC = 0.636Vm

Ch.2 Summary

Full-Wave Rectification

Center-Tapped
Transformer Rectifier
Requires two diodes and a
center-tapped transformer

VDC = 0.636Vm

Ch.2 Summary

Summary of Rectifier Circuits

In the center tapped transformer rectifier circuit, the peak AC
voltage is the transformer secondary voltage to the tap.
Rectifier

Ideal VDC

Realistic VDC

Half Wave Rectifier

VDC= 0.318Vm

VDC = 0.318Vm 0.7

Bridge Rectifier

VDC = 0.636Vm

VDC = 0.636Vm 2(0.7 V)

Center-Tapped Transformer
Rectifier

VDC = 0.636Vm

VDC = 0.636Vm 0.7 V

Vm = the peak AC voltage

Ch.2 Summary

Zener Diodes
The Zener is a diode that is
operated in reverse bias at
the Zener Voltage (Vz).
When Vi VZ
The Zener is on
Voltage across the Zener is VZ
Zener current: IZ = IR IRL
The Zener Power: PZ = VZIZ
When Vi < VZ
The Zener is off
The Zener acts as an open circuit

Ch.2 Summary

Zener Resistor Values

If R is too large, the Zener diode cannot conduct
because IZ < IZK. The minimum current is given
by:
I I I
Lmin

The maximum value of

resistance is:

ZK

RLmax

VZ
ILmin

If R is too small, IZ > IZM . The maximum

allowable current for the circuit is given by:
The minimum value of resistance is:

IL max

RL min

RVZ
Vi VZ

VL
V
Z
RL
RL min

Ch.2 Summary

Voltage-Multiplier Circuits
Voltage multiplier circuits use a combination of diodes
and capacitors to step up the output voltage of rectifier
circuits. Three common voltage multipliers are the:

Voltage Doubler
Voltage Tripler
Voltage Quadrupler

Ch.2 Summary

Voltage Doubler

This half-wave voltage doublers output can be calculated

using:

Vout = VC2 = 2Vm

where Vm = peak secondary voltage of the transformer

Ch.2 Summary

Voltage Doubler
Positive Half-Cycle

D1 conducts
D2 is switched off
Capacitor C1 charges to Vm

Negative Half-Cycle

D1 is switched off
D2 conducts
Capacitor C2 charges to Vm

Vout = VC2 = 2Vm

Ch.2 Summary

Voltage Tripler and Quadrupler

Ch.2 Summary

Practical Applications
Rectifier Circuits
Conversions of AC to DC for DC operated circuits
Battery Charging Circuits

Simple Diode Circuits

Protective Circuits against
Overcurrent
Polarity Reversal
Currents caused by an inductive kick in a relay circuit

Zener Circuits
Overvoltage Protection
Setting Reference Voltages

Electronic Devices and Circuit Theory

Boylestad

Bipolar Junction Transistors

Chapter 3

Ch.3 Summary

Transistor Construction
There are two types of
transistors:

pnp

pnp and npn

The terminals are labeled:
E - Emitter
B - Base
C - Collector

npn

Ch.3 Summary

Transistor Operation
With the external sources, VEE and VCC, connected as
shown:
The emitter-base
junction is forward
biased
The base-collector
junction is reverse
biased

Ch.3 Summary

Currents in a Transistor
Emitter current is the sum of the
collector and base currents:
I

I I
C B

The collector current is comprised of

two currents:
I I
I
C C (majority ) CO (minority)

Ch.3 Summary

Common-Base Configuration

The base is common to both input (emitterbase) junction

and output (collectorbase) junction of the transistor.

Ch.3 Summary

Common-Base Amplifier
Input Characteristics
This curve shows the
relationship between
of input current (IE) to
input voltage (VBE) for
three output voltage
(VCB) levels.

Ch.3 Summary

Common-Base Amplifier
Output Characteristics
This graph
demonstrates
the output
current (IC) to
an output
voltage (VCB)
for various
levels of input
current (IE).

Ch.3 Summary

Operating Regions
Active
Operating range of the amplifier.

Cutoff
The amplifier is basically off. There is
voltage, but little current.

Saturation
The amplifier is fully on. There is current,
but little voltage.

Ch.3 Summary

Approximations
Emitter and collector currents:

IC IE
Base-emitter voltage:
VBE 0.7 V (for Silicon)

Ch.3 Summary

Alpha ()
Alpha ( ) is the ratio of IC to IE :
IC
dc
IE

Ideally:

=1

In reality:

falls somewhere between

0.9 and 0.998

Alpha ( ) in the AC mode:

ac

IC
I E

Ch.3 Summary

Transistor Amplifier

Currents and
Voltages:

V
200 mV
IE I i i
10 mA
Ri
20
I I
C
E
I

I 10 mA
i

V I R (10 mA )(5 k ) 50 V
L
L

Voltage Gain:
Av

VL
Vi

50 V
200 mV

250

Ch.3 Summary

Common-Emitter
Configuration
The emitter is common to
both input (base-emitter)
and output (collectoremitter) circuits.
The input is applied to the
base and the output is
taken from the collector.

Ch.3 Summary

Common-Emitter Characteristics

Collector Characteristics

Base Characteristics

Ch.3 Summary

Common-Emitter Amplifier Currents

Ideal Currents
Actual Currents

IE = IC + IB
IC = IE + ICBO

IC = I E
where ICBO = minority
collector current

ICBO is usually so small that it can be ignored, except in high

power transistors and in high temperature environments.
When IB = 0 A the transistor is in
cutoff, but there is some minority
current flowing called ICEO.

ICEO

ICBO
1

I B 0 A

Ch.3 Summary

Beta ()
represents the amplification factor of a transistor.
In DC mode:

In AC mode:

dc

ac

IC
IB

IC
IB

VCE constant

ac is sometimes referred to as hfe, a term used in transistor

modeling calculations

Ch.3 Summary

Beta ()
Determining from a Graph
( 3.2 mA 2.2 mA)
( 30 A 20 A)
1 mA

V 7.5 V
10 A CE
100

AC

2.7 mA
25 A
108

DC

VCE 7 .5 V

Ch.3 Summary

Beta ()
Relationship between amplification factors and :

Relationship Between Currents:

IC I B

IE ( 1)IB

Ch.3 Summary

Common-Collector Configuration
The input is on the
base and the
output is on the
emitter.

Ch.3 Summary

Common-Collector Configuration
The characteristics
are similar to those
of the commonemitter amplifier,
except the vertical
axis is IE.

Ch.3 Summary

Operating Limits
VCE is maximum and IC is
minimum in the cutoff
region.

IC (max) ICEO

IC is maximum and VCE is

minimum in the saturation
region.
VCE (max) VCE ( sat ) VCEO
The transistor operates in the active region between saturation and cutoff.

Ch.3 Summary

Power Dissipation
Common-base:
PCmax VCBIC

Common-emitter:
PCmax VCE IC

Common-collector:
PCmax VCE IE

Ch.3 Summary

Transistor Testing
Curve Tracer

Provides a graph of the characteristic curves.

DMM

Some DMMs measure DC or hFE.

Ohmmeter:

Ch.3 Summary

Transistor Terminal Identification

Electronic Devices and Circuit Theory

Boylestad

DC Biasing - BJTs
Chapter 4

Ch.4 Summary

Biasing
Biasing: Applying DC voltages to a transistor in order
to turn it on so that it can amplify AC signals.

Ch.4 Summary

Operating Point
The DC input
establishes an
operating or
quiescent point
called the Q-point.

Ch.4 Summary

The Three Operating Regions

Active or Linear Region Operation
BaseEmitter junction is forward biased
BaseCollector junction is reverse biased
Cutoff Region Operation
BaseEmitter junction is reverse biased
Saturation Region Operation
BaseEmitter junction is forward biased
BaseCollector junction is forward biased

Ch.4 Summary

DC Biasing Circuits
Fixed-bias circuit
Emitter-stabilized bias circuit
Collector-emitter loop
Voltage divider bias circuit
DC bias with voltage feedback

Ch.4 Summary

Fixed Bias

Ch.4 Summary

The Base-Emitter Loop

From Kirchhoffs voltage
law:
+VCC IBRB VBE = 0

Solving for base current:

VCC VBE
IB
RB

Ch.4 Summary

Collector-Emitter Loop
Collector current:
IC IB

From Kirchhoffs voltage law:

VCE VCC IC RC

Ch.4 Summary

Saturation
When the transistor is operating in saturation, current
through the transistor is at its maximum possible value.
V
ICsat CC
R
C

VCE 0 V

Ch.4 Summary

Load Line Analysis

The load line end points are:

ICsat
IC = VCC / RC
VCE = 0 V

VCEcutoff
VCE = VCC
IC = 0 mA

The Q-point is the operating point where the value of RB sets the
value of IB that controls the values of VCE and IC .

Ch.4 Summary

The Effect of VCC on the Q-Point

Ch.4 Summary

The Effect of RC on the Q-Point

Ch.4 Summary

The Effect of IB on the Q-Point

Ch.4 Summary

Emitter-Stabilized Bias Circuit

Adding a resistor
(RE) to the emitter
circuit stabilizes
the bias circuit.

Ch.4 Summary

Base-Emitter Loop
From Kirchhoffs voltage law:
VCC IE RE VBE IE RE 0

Since IE = ( + 1)IB:
VCC IB RB ( 1)IB RE 0

Solving for IB:

VCC VBE
IB
RB ( 1)RE

Ch.4 Summary

Collector-Emitter Loop
From Kirchhoffs voltage law:
IE RE VCE IC RC VCC 0

Since IE IC:
VCE VCC IC(RC RE )

Also:
VE IE RE
VC VCE VE VCC IC RC
VB VCC I R RB VBE VE

Ch.4 Summary

Improved Biased Stability

Stability refers to a condition in which the currents and
voltages remain fairly constant over a wide range of
temperatures and transistor Beta () values.

Adding RE to the emitter improves

the stability of a transistor.

Ch.4 Summary

Saturation Level

The endpoints can be determined from the load line.

VCEcutoff:

VCE VCC
IC 0 mA

ICsat:

VCE 0 V
VCC
IC
RC RE

Ch.4 Summary

Voltage Divider Bias

This is a very stable bias circuit.
The currents and
voltages are nearly
independent of any
variations in .

Ch.4 Summary

Approximate Analysis
Where IB << I1 and I1 I2 :
VB

R2VCC
R1 R2

Where RE > 10R2:

IE

VE
RE

VE VB VBE

From Kirchhoffs voltage law:

VCE VCC IC RC IE RE

IE IC
VCE V CCIC (RC RE )

Ch.4 Summary

Voltage Divider Bias Analysis

Transistor Saturation Level
I Csat ICmax

V CC

RC RE

Load Line Analysis

Cutoff:
VCE VCC
IC 0 mA

Saturation:
V
CC
I
C R R
C
E

VCE 0 V

Ch.4 Summary

DC Bias With Voltage Feedback

Another way to improve
the stability of a bias
circuit is to add a
feedback path from
collector to base.
In this bias circuit the
Q-point is only slightly
dependent on the
transistor beta, .

Ch.4 Summary

Base-Emitter Loop
From Kirchhoffs voltage law:
VCC IC RC I B RB VBE IE RE 0

Where IB << IC:

I'C IC IB IC

Knowing IC = IB and IE IC, the

loop equation becomes:
VCC B RC IB RB VBE I B RE 0

Solving for IB:

IB

VCC VBE
RB (RC RE )

Ch.4 Summary

Collector-Emitter Loop
Applying Kirchoffs voltage law:
IE + VCE + ICRC VCC = 0

Since IC IC and IC = IB:

IC(RC + RE) + VCE VCC =0

Solving for VCE:

VCE = VCC IC(RC + RE)

Ch.4 Summary

Base-Emitter Bias Analysis

Transistor Saturation Level
I Csat ICmax

V CC

RC RE

Load Line Analysis

Cutoff

Saturation

VCE VCC

V
CC
I
C R R
C
E

IC 0 mA

VCE 0 V

Ch.4 Summary

Transistor Switching Networks

Transistors with only the DC source applied can be
used as electronic switches.

Ch.4 Summary

Switching Circuit Calculations

Saturation current:
ICsat

VCC
RC

To ensure saturation:
IB

ICsat
dc

Emitter-collector
resistance at
saturation and cutoff:

Rsat

VCEsat

ICsat

Rcutoff

VCC

ICEO

Ch.4 Summary

Switching Time
Transistor switching times:

t on t r t d
t off t s t f

Ch.4 Summary

PNP Transistors
The analysis for pnp transistor biasing circuits is
the same as that for npn transistor circuits. The
only difference is that the currents are flowing in
the opposite direction.

Electronic Devices and Circuit Theory

Boylestad

BJT AC Analysis
Chapter 5

Ch.5 Summary

BJT Transistor Modeling

A model is an equivalent circuit that represents
the AC characteristics of the transistor.
A model uses circuit elements that approximate
the behavior of the transistor.
There are two models commonly used in small
signal AC analysis of a transistor:

re model
Hybrid equivalent model

Ch.5 Summary

The re Transistor Model

BJTs are basically current-controlled devices; therefore
the re model uses a diode and a current source to
duplicate the behavior of the transistor.
One disadvantage to this model is its sensitivity to the
DC level. This model is designed for specific circuit
conditions.

Ch.5 Summary

Common-Base Configuration
Input impedance:
re

26 mV
Ie

Zi re

Output impedance:
Z o

Voltage gain:
AV

RL RL

re
re

Current gain:
Ai 1

Ch.5 Summary

Common-Emitter Configuration
The diode re model
can be replaced by
the resistor re.
Ie 1 I b I b

re

26 mV
Ie

Ch.5 Summary

Common-Emitter Configuration
Input impedance:
Z i re

Output impedance:
Zo ro

Voltage gain:
AV

RL
re

Current gain:
Ai ro

Ch.5 Summary

Common-Collector Configuration
Input impedance:
Z i ( 1)re

Output impedance:
Zo re || RE

Voltage gain:
AV

RE
RE re

Current gain:
Ai 1

Ch.5 Summary

The Hybrid Equivalent Model

Hybrid parameters are developed and used for modeling the
transistor. These parameters can be found on a transistors
specification sheet:
hi = input resistance
hr = reverse transfer voltage ratio (Vi/Vo) 0
hf = forward transfer current ratio (Io/Ii)
ho = output conductance

Ch.5 Summary

Simplified General h-Parameter Model

hi = input resistance
hf = forward transfer current ratio (Io/Ii)

Ch.5 Summary

re vs. h-Parameter Model

Common-Emitter
hie re
hfe ac

Common-Base
hib re
hfb 1

Ch.5 Summary

The Hybrid Model

The hybrid pi model is most useful for analysis
of high-frequency transistor applications.
At lower frequencies the hybrid pi model closely
approximate the re parameters, and can be
replaced by them.

Ch.5 Summary

Common-Emitter Fixed-Bias
Configuration
The input is applied to the base
The output is taken from the
collector
High input impedance
Low output impedance
High voltage and current gain
Phase shift between input and
output is 180

Ch.5 Summary

Common-Emitter
Fixed-Bias
Configuration
AC equivalent

re,model

Ch.5 Summary

Common-Emitter
Fixed-Bias
Calculations
Input

Output

Zi RB||| e
Zi re

Zo RC||rO
Zo RC

Av

Voltage gain:

RE 10 re

ro 10 RC

Vo
(R ||r )
C o
Vi
re

Av

RC
re

Current gain:

ro 10 RC

Current gain

Ai

Io
RB ro

I i (ro RC )(RB re )

Ai

ro 10 RC , RB 10 re

Ai AV

Zi
RC

Ch.5 Summary

Common-Emitter Voltage-Divider Bias

re model requires you to
determine , re, and ro.

Ch.5 Summary

Common-Emitter
Voltage-Divider Bias
Calculations
Input impedance
R R1 || R2
Zi R || re

Voltage gain
Av

Vo RC || ro

Vi
re

Av

Vo
R
C
Vi
re

ro 10RC

Output impedance
Zo RC || ro
Zo RC

ro 10RC

Current gain
Io
R ro

I i (ro RC )(R re )
I
R
Ai o
r 10R
I i R re o C
Ai

Ai

Io
ro 10RC , R10 re
Ii

Current gain from Av

Ai Av

Zi
RC

Ch.5 Summary

Common-Emitter Emitter-Bias
Configuration

Ch.5 Summary

Impedance Calculations
Input impedance:
Zi RB || Zb
Zb re ( 1)RE
Zb (re RE )
Zb RE

Output impedance:
Zo RC

Ch.5 Summary

Gain Calculations
Voltage gain:
Av

Vo
R
C
Vi
Zb

Av

Vo
RC

Vi
re RE

Av

Vo
R
C
Vi
RE

Z b (re RE )

Z b RE

Current gain:
Ai

Io
RB

I i RB Z b

Current gain from Av:

Ai Av

Zi
RC

Ch.5 Summary

Emitter-Follower Configuration

This is also known as the common-collector configuration.

The input is applied to the base and the output is taken from the emitter.
There is no phase shift between input and output.

Ch.5 Summary

Impedance
Calculations
Input impedance:
Z i RB ||Z b
Z b re ( 1)RE
Z b (re RE )
Z b RE

Output impedance:

Zo RE||re
Zo re

RE re

Ch.5 Summary

Gain Calculations
Voltage gain:
Av

Vo
RE

Vi RE re

Av

Vo
1
Vi

RE re , RE re RE

Current gain:
Ai

RB
RB Z b

Current gain from voltage gain:

Ai Av

Zi
RE

Ch.5 Summary

Common-Base Configuration
The input is applied to the emitter
The output is taken from the
collector
Low input impedance.
High output impedance
Current gain less than unity
Very high voltage gain
No phase shift between input
and output

Ch.5 Summary

Calculations
Input impedance:
Zi RE || re

Output impedance:
Zo RC

Voltage gain:
Av

Vo RC RC

Vi
re
re

Current gain:
Ai

Io
1
Ii

Ch.5 Summary

Common-Emitter Collector Feedback

Configuration

A variation of the common-emitter fixed-bias configuration

Input is applied to the base
Output is taken from the collector
There is a 180 phase shift between the input and output

Ch.5 Summary

Calculations
Input impedance:
Output impedance:
Voltage gain:

Av

Zi

Zo RC || RF

Vo
R
C
Vi
re

Current gain:
Ai

Io
RF

Ii
RF RC

Ai

Io
R
F
Ii
RC

re
1 RC

RF

Ch.5 Summary

Collector DC Feedback
Configuration
This is a variation of the commonemitter, fixed-bias configuration
The input is applied to the
base
The output is taken from
the collector
There is a 180 phase shift
between input and output

Ch.5 Summary

Calculations
Input impedance:
Zi

re
1 RC

RF

Output impedance:
Zo RC||RF

Voltage gain:
Av

Vo
R
C
Vi
re

Current gain:

Ai

Io
RF

Ii
RF RC

Ai

Io
R
F
Ii
RC

Ch.5 Summary

Two-Port Systems Approach

With Vi set to 0 V:
ZTh Zo Ro

The voltage across

the open terminals is:
ETh AvNLVi

where AvNL is the noload voltage gain

Ch.5 Summary

Effect of Load Impedance on Gain

This model can be applied
to any current- or voltagecontrolled amplifier.
Adding a load reduces the
gain of the amplifier:

V
RL
Av o
AvNL
Vi RL Ro

Zi
Ai Av
RL

Ch.5 Summary

Effect of Source Impedance on Gain

The amplitude of the
applied signal that
reaches the input of
the amplifier is:
Vi

RiVs
Ri Rs

The internal resistance of the signal source reduces the overall

gain:
Avs

Vo
Ri

AvNL
Vs Ri Rs

Ch.5 Summary

Combined Effects of RS and RL on

Voltage Gain
Effects of RL:
Av

Vo RL AvNL

Vi RL Ro

Ai Av

Ri
RL

Avs

Effects of RL and RS:

Vo
Ri
RL

AvNL
Vs Ri Rs RL Ro

Ais Avs

Rs Ri
RL

Ch.5 Summary

Cascaded Systems
The output of one amplifier is the input to the next
amplifier
The overall voltage gain is determined by the product of
gains of the individual stages
The DC bias circuits are isolated from each other by the
coupling capacitors
The DC calculations are independent of the cascading
The AC calculations for gain and impedance are
interdependent

Ch.5 Summary

R-C Coupled BJT Amplifiers

Voltage gain:
Av 1

RC || R1 || R2 || Re
re

Av 2

RC
re

Av Av 1Av 2

Input impedance,
first stage:
Zi R1 || R2 || Re

Output impedance,
second stage:

Zo RC

Ch.5 Summary

Cascode Connection
This example is a CECB
combination. This arrangement
provides high input impedance
but a low voltage gain.
The low voltage gain of the
input stage reduces the Miller
input capacitance, making this
combination suitable for highfrequency applications.

Ch.5 Summary

Darlington Connection
The Darlington circuit provides
very high current gain, equal to the
product of the individual current
gains:

D = 1 2

The practical significance is that

the circuit provides a very high
input impedance.

Ch.5 Summary

DC Bias of Darlington Circuits

Base current:
IB

VCC VBE
R B D RE

Emitter current:
IE (D 1)IB DIB

Emitter voltage:
VE IE RE

Base voltage:
VB VE VBE

Ch.5 Summary

Feedback Pair
This is a two-transistor circuit that operates like a Darlington
pair, but it is not a Darlington pair.
It has similar characteristics:
High current gain
Voltage gain near unity
Low output impedance
High input impedance
The difference is that a Darlington uses a pair of like
transistors, whereas the feedback-pair configuration uses
complementary transistors.

Ch.5 Summary

Current Mirror Circuits

Current mirror
circuits provide
constant current in
integrated circuits.

Ch.5 Summary

Current Source Circuits

Constant-current sources can be built using FETs, BJTs, and
combinations of these devices.

I IE

VZ VBE
RE

IE IC

Ch.5 Summary

Current Source Circuits

VGS = 0V
ID = IDSS = 10 mA

Ch.5 Summary

Fixed-Bias
Input impedance:
Zi RB || hie

Output impedance:
Zo RC || 1/ hoe

Voltage gain:
Av

Vo
h R || 1/ ho e
fe C
Vi
hie

Current gain:

Ai

Io
hfe
Ii

Ch.5 Summary

Voltage-Divider Configuration
Input impedance:
Z i R || hie

Output impedance:
Zo RC

Voltage gain:
gain
Av

Current gain:

hfe RC || 1/hoe
hie

Ai

hfe R
R hie

Ch.5 Summary

Emitter-Follower Configuration
Input impedance:
Zb hfe RE
Zi Ro || Zb

Z b h fe R E
Z i R o || Z b

Output impedance:
Zo RE ||

hie
hfe

Voltage gain:
Av

Vo
RE

Vi RE hie / hfe

Ai

Current gain:

hfe RB
RB Z b

Ai Av

Zi
RE

Ch.5 Summary

Common-Base Configuration
Input impedance:
Zi RE || hib

Output impedance:
Zo RC

Voltage gain:
Av

Vo
h R
fb C
Vi
hib

Current gain:
Ai

Io
hfb 1
Ii

Electronic Devices and Circuit Theory

Boylestad

Field-Effect Transistors
Chapter 6

Ch.6 Summary

FETs vs. BJTs

Similarities:

Amplifiers
Switching devices
Impedance matching circuits

Differences:

FETs are voltage controlled devices. BJTs are

current controlled devices.
FETs have higher input impedance. BJTs have
higher gain.
FETs are less sensitive to temperature variations
and are better suited for integrated circuits
FETs are generally more static sensitive than
BJTs.

Ch.6 Summary

FET Types
JFET: Junction FET
MOSFET: MetalOxideSemiconductor FET
D-MOSFET: Depletion MOSFET
E-MOSFET: Enhancement MOSFET

Ch.6 Summary

JFET Construction
There are two types of JFETs:
n-channel
p-channel
The n-channel is the more widely used
of the two.

JFETs have three terminals:

The Drain (D) and Source (S)
are connected to the n-channel

The Gate (G) is connected to the p-type material

Ch.6 Summary

JFET Operation: The Basic Idea

JFET operation can be compared to that of a water spigot.
The source is the accumulation of
electrons at the negative pole of the
drain-source voltage.
The drain is the electron deficiency
(or holes) at the positive pole of the
applied voltage.
The gate controls the width of the nchannel and, therefore, the flow of
charges from source to drain.

Ch.6 Summary

JFET Operating Characteristics

There are three basic operating conditions for a JFET:
VGS = 0 V, VDS increasing to some positive value
VGS < 0 V, VDS at some positive value
Voltage-controlled resistor

Ch.6 Summary

JFET Characteristics: VGS=0V

Three things happen when VGS = 0 V and VDS increases
from 0 V to a more positive voltage:
The size of the depletion region between
p- type gate and n-channel increases.
Increasing the size of the depletion
region decreases the width of the nchannel, which increases its resistance.
Even though the n-channel resistance is
increasing, the current from source to
drain (ID) through the n-channel is
increasing because VDS is increasing.

Ch.6 Summary

JFET Characteristics: Pinch Off

If VGS = 0 V and VDS continually
increases to a more positive voltage, a
point is reached where the depletion
region gets so large that it pinches off
the channel.
This suggests that the current in
channel (ID) drops to 0 A, but it does
not: As VDS increases, so does ID.
However, once pinch off occurs,
further increases in VDS do not
cause ID to increase.

Ch.6 Summary

JFET Characteristics: Saturation

At the pinch-off point:
Any further increase in VDS
does not produce any increase
in ID. VDS at pinch-off is denoted
as Vp
ID is at saturation or maximum,
and is referred to as IDSS.

Ch.6 Summary

JFET Operating Characteristics

As VGS becomes more
negative, the depletion
region increases.

Ch.6 Summary

JFET Operating Characteristics

As VGS becomes more negative:
The JFET experiences
pinch-off at a lower voltage
(VP).
ID decreases (ID < IDSS)
even when VDS increases
ID eventually drops to 0 A.
The value of VGS that causes
this to occur is designated

VGS(off).
Note that at high levels of VDS the JFET reaches a breakdown situation. ID
increases uncontrollably if VDS > VDSmax, and the JFET is likely destroyed.

Ch.6 Summary

Voltage-Controlled Resistor
The region to the left of the
pinch-off point is called the

ohmic region.
The JFET can be used as a
variable resistor, where VGS
controls the drain-source
resistance (rd).
rd

ro
V
1 GS
VP

As VGS becomes more negative, the resistance (rd)

increases.

Ch.6 Summary

P-Channel JFETs

The p-channel JFET

behaves the same as the
n-channel JFET. The only
differences are that the
voltage polarities and
current directions are
reversed.

Ch.6 Summary

P-Channel JFET Characteristics

As VGS becomes more positive:
The JFET experiences pinch-off
at a lower voltage (VP).
The depletion region increases,
and ID decreases (ID < IDSS)
ID eventually drops to 0 A
(when VGS = VGSoff)
Also note that at high levels of VDS the JFET reaches a breakdown
situation: ID increases uncontrollably if VDS > VDSmax.

Ch.6 Summary

N-Channel JFET Symbol

Ch.6 Summary

JFET Transfer Characteristics

JFET input-to-output transfer characteristics are not
as straightforward as they are for a BJT.
BJT: indicates the relationship between IB (input) and IC
(output).
JFET: The relationship of VGS (input) and ID (output) is a little
more complicated:

ID IDSS 1VVGS

Ch.6 Summary

JFET Transfer Curve

This graph shows

the value of ID for
a given value of
VGS.

Ch.6 Summary

Plotting the JFET Transfer Curve

Using IDSS and Vp (VGS(off)) values found in a specification sheet, the
transfer curve can be plotted according to these three steps:
1. Solving for VGS = 0 V: ID = IDSS
2. Solving for VGS = VGS(off):

ID = 0 A

ID I

3. Solving for VGS = 0 V to VGS(off): 0 A < ID < IDSS

1VGS
DSS
VP

Ch.6 Summary

JFET Specification Sheet

Electrical
Characteristics

Ch.6 Summary

JFET Specification Sheet

Maximum Ratings

Ch.6 Summary

Case and Terminal Identification

Ch.6 Summary

Testing JFETs
Curve Tracer
A curve tracer displays the ID versus VDS graph for
various levels of VGS.

Specialized FET Testers

These testers show IDSS for the JFET under test.

Ch.6 Summary

MOSFETs
MOSFETs have characteristics similar to those of
JFETs and additional characteristics that make then
very useful.
There are two types of MOSFETs:
Depletion-Type
Enhancement-Type

Ch.6 Summary

Depletion-Type MOSFET Construction

The Drain (D) and Source (S)
connect to the to n-type regions.
These n-typed regions are
connected via an n-channel. This
n-channel is connected to the
Gate (G) via a thin insulating
layer of silicon dioxide (SiO2).
The n-type material lies on a ptype substrate that may have an
additional terminal connection
called the Substrate (SS).

Ch.6 Summary

Basic MOSFET Operation

A depletion-type MOSFET can operate in two modes:

Depletion mode
Enhancement mode

Ch.6 Summary

Depletion Mode Operation (D-MOSFET)

The characteristics are
similar to a JFET.
When VGS = 0 V, ID = IDSS
When VGS < 0 V, ID < IDSS
The formula used to plot the
transfer curve for a JFET applies to
a D-MOSFET as well:

ID I

1VGS
DSS
VP

Ch.6 Summary

Enhancement Mode Operation

(D-MOSFET)
VGS > 0 V, ID increases
above IDSS (ID > IDSS)
The formula used to
plot the transfer curve
still applies:

ID I

1VGS
DSS
VP

Note that VGS is now positive

Ch.6 Summary

p-Channel D-Type MOSFET

Ch.6 Summary

D-Type MOSFET Symbols

Ch.6 Summary

E-Type MOSFET Construction

The Drain (D) and Source (S) connect to the to n-type regions.
These n-type regions are connected via an n-channel
The Gate (G) connects to the p-type
substrate via a thin insulating layer of
silicon dioxide (SiO2)
There is no channel
The n-type material lies on a p-type
substrate that may have an additional
terminal connection called the
Substrate (SS)

Ch.6 Summary

E-Type MOSFET Operation

The enhancement-type MOSFET (E-MOSFET) operates only
in the enhancement mode.
VGS is always positive
As VGS increases, ID
increases
As VGS is kept constant
and VDS is increased,
then ID saturates (IDSS)
and the saturation level
(VDSsat) is reached

Ch.6 Summary

E-Type MOSFET Transfer Curve

To determine ID given VGS:
ID k (VGS VT )2
where:
VT = the E-MOSFET
threshold voltage
k, a constant, can be
determined by using
values at a specific point
and the formula:
k

VDSsat can be calculated using:

ID(ON)

(VGS(ON) VT)

VDSsat VGS VT

Ch.6 Summary

p-Channel E-Type MOSFETs

The p-channel enhancement-type MOSFET is similar

to its n-channel counterpart, except that the voltage
polarities and current directions are reversed.

Ch.6 Summary

MOSFET Symbols

Ch.6 Summary

Handling MOSFETs
MOSFETs are very sensitive to static electricity.
Because of the very thin SiO2 layer between the external terminals
and the layers of the device, any small electrical discharge can
create an unwanted conduction.

Protection
Always transport in a static sensitive bag
Always wear a static strap when handling MOSFETS
Apply voltage limiting devices between the gate and source,
such as back-to-back Zeners to limit any transient voltage.

Ch.6 Summary

VMOS Devices
VMOS (vertical MOSFET) is a component structure that
provides greater
surface area.
Advantages
VMOS devices handle
higher currents by
providing more surface
area to dissipate the heat.
VMOS devices also have
faster switching times.

Ch.6 Summary

CMOS Devices
CMOS (complementary MOSFET) uses a p-channel and
n-channel MOSFET; often on the same substrate as
shown here.
Advantages
Useful in logic circuit designs
Higher input impedance
Faster switching speeds
Lower operating power levels

Ch.6 Summary

Summary Table

Electronic Devices and Circuit Theory

Boylestad

FET Biasing
Chapter 7

Ch.7 Summary

Common FET Biasing Circuits

JFET Biasing Circuits
Fixed-Bias
Self-Bias
Voltage-Divider Bias

D-Type MOSFET Biasing Circuits

Self-Bias
Voltage-Divider Bias

E-Type MOSFET Biasing Circuits

Feedback Configuration
Voltage-Divider Bias

Ch.7 Summary

Basic Current Relationships

For all FETs:
IG 0 A

I D IS

For JFETS and D-Type MOSFETs:

V
ID IDSS 1 GS
VP

For E-Type MOSFETs:

ID k (VGS VT )2

Ch.7 Summary

Fixed-Bias Configuration

VDS VDD ID RD
VS 0 V
VC VDS
V VGS
VGS VGG

Ch.7 Summary

Self-Bias Configuration

Ch.7 Summary

Self-Bias Calculations
VGS ID RS
1. Select a value of ID < IDSS and use the component value of RS to calculate
VGS. Plot the point identified by ID and VGS and draw a line from the origin of
the axis to this point.
2. Plot the transfer curve using IDSS and VP
(VP = |VGSoff| on spec sheets) and a few
points such as VGS = VP / 4 and VGS = VP / 2
etc.
The Q-point is located where the first
line intersects the transfer curve. Using
the value of ID at the Q-point (IDQ):

VDS VDD ID (RS RD )

VS ID RS

VD VDS VS VDD VRD

Ch.7 Summary

Voltage-Divider Bias

IG = 0 A
ID responds to changes
in VGS.

Ch.7 Summary

Voltage-Divider Bias Calculations

VG is equal to the voltage across
divider resistor R2:
VG

R2VDD
R1 R2

Using Kirchhoffs Law:

VGS VG ID RS

The Q-point is established by plotting a line that intersects the transfer

curve.

Ch.7 Summary

Voltage-Divider Q-Point
Plot the line that is defined
by these two points:
VGS = VG, ID = 0 A
VGS = 0 V, ID = VG / RS

Plot the transfer curve by

plotting IDSS, VP and the
calculated values of ID
The Q-point is located where the line intersects the transfer
curve

Ch.7 Summary

Voltage-Divider Bias Calculations

Using the value of ID at the Q-point, solve for the other
values in the voltage-divider bias circuit:
VDS VDD ID (RD RS )
VD VDD ID RD
VS ID RS

Ch.7 Summary

D-Type MOSFET Bias Circuits

Depletion-type MOSFET
bias circuits are similar
to those used to bias
JFETs. The only
difference is that D-type
MOSFETs can operate
with positive values of
VGS and with ID values
that exceed IDSS.

Ch.7 Summary

Self-Bias Q-Point (D-MOSFET)

Plot the line that is defined by these
two points:
VGS = VG, ID = 0 A
ID = VG /RS, VGS = 0 V
Plot the transfer curve using IDSS, VP
and calculated values of ID.
The Q-point is located where the line
intersects the transfer curve. Use the
value of ID at the Q-point to solve for
the other circuit values.
These are the same steps used to analyze JFET self-bias circuits.

Ch.7 Summary

Voltage-Divider Bias (D-MOSFET)

Plot the line that is defined by these two
points:
VGS = VG, ID = 0 A
ID = VG/RS, VGS = 0 V
Plot the transfer curve using IDSS, VP and
calculated values of ID.
The Q-point is located where the line
intersects the transfer curve. Use the
value of ID at the Q-point to solve for the
other variables in the circuit.
These are the same steps used to analyze JFET voltage-divider bias circuits.

Ch.7 Summary

E-Type MOSFET Bias Circuits

The transfer curve for

the E-MOSFET is
very different from
that of a simple JFET
or D-MOSFET.

Ch.7 Summary

Feedback Bias Circuit (E-MOSFET)

IG 0 A
VRG 0 V
VDS VGS
VGS VDD ID RD

Ch.7 Summary

Feedback Bias Q-Point (E-MOSFET)

Plot the line that is defined
by these two points:
VGS = VDD, ID = 0 A
ID = VDD / RD , VGS = 0 V
Using these values from the
spec sheet, plot the transfer
curve:
VGSTh , ID = 0 A
VGS(on), ID(on)
The Q-point is located where
the line and the transfer
curve intersect

Using the value of ID at the Q-point,

solve for the other variables in the
circuit

Ch.7 Summary

Voltage-Divider Biasing
Plot the line and the transfer
curve to find the Q-point using
these equations:

R2VDD
R1 R2
VG ID RS

VG
VGS

VDS VDD ID (RS RD )

Ch.7 Summary

Voltage-Divider Bias Q-Point

(E-MOSFET)

Plot the line using

VGS = VG , ID = 0 A
ID = VG / RS , VGS = 0 V
Using these values from the spec sheet, plot the transfer curve:
VGSTh, ID = 0 A
VGS(on) , ID(on)
The point where the line and the transfer curve intersect is the Q-point.
Using the value of ID at the Q-point, solve for the other circuit values.

Ch.7 Summary

p-Channel FETs
For p-channel FETs the same calculations and graphs
are used, except that the voltage polarities and current
directions are reversed.
The graphs are mirror images of the n-channel graphs.

Ch.7 Summary

Applications
Voltage-controlled resistor
JFET voltmeter
Timer network
Fiber optic circuitry
MOSFET relay driver

Electronic Devices and Circuit Theory

Boylestad

FET Amplifiers
Chapter 8

Ch.8 Summary

Introduction
FETs provide:
Excellent voltage gain
High input impedance
Low-power consumption
Good frequency response

Ch.8 Summary

FET Small-Signal Model

Transconductance: The ratio of a change in ID to
the corresponding change in VGS
Transconductance is denoted gm and given by:

ID
gm
V GS

Ch.8 Summary

Geographical Determination of gm

Ch.8 Summary

Mathematical Definitions of gm
gm

ID
VGS

2I
g m DSS
VP

VGS
1

V
P

For VGS = 0 V

g m0

2I DSS
VP

VGS
ID
g m g m0 1

g
m0

V
IDSS
P

Ch.8 Summary

FET Impedence
Input impedance:
Zi

Output Impedance:
1
Zo rd
y os

where

rd

VDS
ID

VGS constant

yos= admittance parameter listed on FET spec sheets

Ch.8 Summary

FET AC Equivalent Circuit

Ch.8 Summary

Common-Source (CS) Fixed-Bias

The input is applied to the gate and
the output is taken from the drain
There is a 180 phase shift between
the circuit input and output

Ch.8 Summary

Calculations
Input impedance:
Z i RG

Output impedance:
Zo RD||rd

Z o RD

rd 10 RD

Voltage gain:
Av
Av

Vo
g m (rd ||RD )
Vi

Vo
g m RD
Vi

rd 10 RD

Ch.8 Summary

Common-Source (CS) Self-Bias

This is a common-source amplifier
configuration, so the input is applied
to the gate and the output is taken
from the drain.

There is a 180 phase shift

between input and output.

Ch.8 Summary

Calculations
Input impedance:
Zi RG

Output impedance:
Zo rd ||RD
Zo RD

rd 10 RD

Voltage gain:
Av g m ( rd ||RD )

Av g m RD

rd 10 RD

Ch.8 Summary

Common-Source (CS) Self-Bias

Removing Cs affects
the gain of the circuit.

Ch.8 Summary

Calculations
Input impedance:
Zi RG

Output impedance:
Z o RD

rd 10 RD

Voltage gain:
Vo
g m RD

R RS
Vi
1 g m RS D
rd
V
g R
Av o m D rd 10( RD RS )
Vi
1 g m RS
Av

Ch.8 Summary

Common-Source (CS)
Voltage-Divider Bias
This is a common-source
amplifier configuration, so the
input is applied to the gate and
the output is taken from the
drain.

Ch.8 Summary

Impedances
Input impedance:
Zi R1 ||R2

Output impedance:
Zo rd ||RD

Z o RD

rd 10 RD

Voltage gain:
Av g m (rd ||RD )
Av g m RD

rd 10 RD

Ch.8 Summary

Source Follower (Common-Drain)

In a common-drain amplifier
configuration, the input is applied
to the gate, but the output is taken
from the source.
There is no phase shift between
input and output.

Ch.8 Summary

Impedances
Input impedance:
Z i RG

Output impedance:
Zo rd ||RS ||
Zo RS ||

1
gm

1
gm

rd 10 RS

Voltage gain:
Av

Vo
g m (rd ||RS )

Vi 1 g m ( rd ||RS )

Av

Vo
g m RS

Vi 1 g m RS

rd 10

Ch.8 Summary

Common-Gate (CG) Circuit

The input is applied to the
source and the output is
taken from the drain.

There is no phase shift

between input and output.

Ch.8 Summary

Calculations
Input impedance:
rd RD

g
r
m d

1
Z i RS ||
r 10 RD
gm d
Zi RS ||

Output impedance:
Zo RD ||rd
Z o RD

rd 10

Voltage gain:

RD
g m RD r
V
d
Av o
Vi

RD
1

rd

Av g m RD

rd 10 RD

Ch.8 Summary

D-Type MOSFET AC Equivalent

Ch.8 Summary

E-Type MOSFET AC Equivalent

gm and rd can be
found in the
specification sheet
for the FET.

Ch.8 Summary

Common-Source Drain-Feedback
There is a 180 phase shift
between input and output.

Ch.8 Summary

Calculations
Input impedance:
Zi
Zi

RF rd ||RD
1 g m (rd ||RD )

RF
1 g m RD

RF rd ||RD ,rd 10 RD

Output impedance:
Zo RF ||rd ||R D
Z o RD

RF rd ||RD ,rd 10 RD

Voltage gain:

Av g m (RF ||rd ||RD ) Av g m RD

RF rd ||RD, rd 10 RD

Ch.8 Summary

Common-Source Voltage-Divider Bias

The input is applied to the gate and
the output is taken from the drain.
There is a 180 voltage phase
shift between input and output.

Ch.8 Summary

Calculations
Input impedance:
Z i R 1||R2

Output impedance:
Zo rd ||RD
Z o RD

rd 10

Voltage gain:

Av g m (rd ||RD )

Av g m RD

rd 10 RD

Ch.8 Summary

Summary Table

Ch.8 Summary

Summary Table

Ch.8 Summary

Summary Table

Ch.8 Summary

Practical Applications
Three-Channel Audio Mixer
Silent Switching
Phase Shift Networks
Motion Detection System