CORE I7

PREPARED BY:
JONATHAN SIAZON
CARL ANGELO VERDADERO
JONATHAN VIDAL
 CORE I7

In November 2008, Intel released their most recent family of

processors, the Core i7 line, codenamed Nehalem. With the i7 came
several innovations in the field of consumer processors.
Intel Core i7 is a name that the company Intel uses for the computer
processors it makes for desktop and laptop computers.
Intel uses this name for the fastest processors that they think will be
used to build computers for consumers instead of business people.
Intel started to use this name in 2008. Before 2008, Intel used the
name "Core 2" for this kind of processor.
 There are different types of Core i7 processor. The name does not
name a type. Instead, it is the name for all of the fast processors that
Intel thinks should be sold to consumers.
Intel uses two other "Core i-" names for its processors for consumers:
"Core i5" and "Core i3.
The "Core i5" processors are mostly as fast as i7 processors, but lack
the Hyper Threading technology, which create a virtual processor
core, for every physical core. Intel uses the "Core i3" name for
processors that only have 2 physical cores, unlike the i5 and i7 which
have 4. "Core i3" can do most simple things for most people.
 The most significant difference brought with the i7 is the elimination of
the north bridge or memory controller hub (MCH).
To accomplish this, Intel developed onboard memory and PCI-
e controllers.
Basically, the purpose of a memory controller is to perform DRAM
refreshing as well as reading and writing to memory, while the PCI-e
controller interfaces with the GPU.
Without exception, going all the way back in Intels history, the
memory and graphics controllers have been left up to the
motherboard manufacturer to implement.
With this change, memory and graphics latency
have been both reduced and standardized, with the only cost being
that the current i7 family is only compatible with DDR3 memory.
 TWO DIAGRAMS, THE LEFT BEING THE OLDER
ARCHITECTURE TYPE, AND THE RIGHT BEING THE
NEWER I7.
 This evolution was groundbreaking not just for Intel
but for the entire processing market; though other
manufacturers had implemented the memory controller
onboard in the past, none had included the graphics
controller onboard as well. With this change it seems the
next step would be to integrate even more components onto
the processor die, which Intel plans to do with their next
processor line by including a GPU onboard the CPU
die starting with the Arrandale family.
 Another significant difference between i7 and the previous models is
the number of cores on the die.
Where both the Core and Core 2 series offered single and dual core
setups, with the latter offering quad core only on their high-end
models, i7 was introduced with four cores on all the difference
performance levels.
What this means is that there isnt such a vast difference in
performance between the different versions of the i7, including those
destined for mobile devices, which is a good thing for the consumer.
This was intended by Intel, as in the past its been difficult for those
who arent totally computer savvy to understand what they are getting.
 The next big difference implemented in the i7 line is the Shared L3
Cache. In previous Intel quad-core implementations, the processor
cores would each get their own L1 cache (which is still the case), then
split off into pairs to share two L2 caches, but it ended there.
This was sufficient as long as the paired cores only passed data to
one another, but if cores 1 or 2 needed to pass data to cores 3 or 4,
the bits had to be sent out to the front side bus and then back to the
other pair. With the i7, a third cache was implemented which is shared
between all of the cores. With CPU intensive multi-core code, this new
cache can allow fairly significant performance increases.
ACTUAL DIE DIAGRAM OF THE
NEW I7
 Here one can see all of the components covered thus far, with the four
cores in the middle. Overall, the mainstream i7 processor boasts a
whopping 731 million transistors, up from 291 million in the Core 2
Duo. All this new hardware may lead one to wonder how they fit it all
onto the same processor die, and the answer is, really they didnt.
With both the later Core 2 and the early i7 architectures using the
same 45nm manufacturing technology, the only way to fit all the new
components onto one die was to make the die physically larger.
The changes made with the i7 dont just stop there though. In early
2003, Intel introduced a method of dual-core emulation with just one
processor core for their Pentium 4 series, which they called
Hyper-threading.
 This provided a significant performance increase with minimal added
cost (15-20% speed for 5% die area) and was a smashing success.
With the introduction of multi-core processors, this technology was
abandoned because there actually were two cores, and it was
deemed unnecessary. With the higher end i7 processors, Hyper-
threading is back. Though the performance increase isnt quite as
phenomenal, the difference from emulating eight
cores for parallel CPU intensive tasks is non-trivial. There are also
more budget-friendly models that exclude Hyper-threading, but they
are clearly separated from the i7 and fall under the i5 nomenclature.
 WHAT'S THE DIFFERENCE
BETWEEN INTEL CORE I3, I5 AND
I7?
Core i7s are better than Core i5s, which better than Core i3s. The main
reason is performance. In general, Core i3 chips are found in cheaper or
budget PCs and laptops, while the mainstream (or mid-range) systems tend
to have i5. Core i7 CPUs are typically reserved for - and found in - high-end,
expensive laptops and PCs.
Right now, Intel is releasign the sixth-generation Core processors - known
as Skylake - and in general it's best to have a newer-generation processor.
And within that generation, the best you can afford, ideally a Core i7.
 Turbo Boost
Core i3 processors don't have Turbo Boost, but i5 and i7s do. It means that Core
i3 chips tend to have quite high 'base' clock speeds, but if you're ever concerned
about power consumption, the specification to look for is TDP: thermal design
power, which is measured in watts.
Cache size
Core i3 (Skylake) chips have 3- or 4MB, while i5s have 6MB and the Core i7s
have 8MB.
Hyper-Threading
A Core i3 with Hyper-Threading can process two threads per core which means
a total of four threads can run simultaneously. The current Core i5 range doesn't
have Hyper-Threading so can also only process four cores. i7 processors do
have it, so can process eight threads at once. Combine that with 8MB of cache
and Turbo Boost Technology, and you can see why it's good to choose a Core i7
over an i5 or i3.
TOP EIGHT FEATURES OF THE INTEL CORE
I7 PROCESSORS FOR TEST,
MEASUREMENT, AND CONTROL
The Intel Penryn mircoarchitecture, which included the Core 2 family
of processors, was the first mainstream Intel microarchitecture based
on the 45nm fabrication process. This allowed Intel to create higher-
performance processors that consumed similar or less power than
previous-generation processors.
The Intel Nehalem microarchitecture that encompasses the Core i7
class of processors uses a 45nm fabrication process for different
processors in the Core i7 family. Besides using the power
consumption benefits of 45nm, Intel made some dramatic changes in
the Nehalem microarchitecture to offer new features and capabilities
in the Core i7 family of processors. This white paper explores the
details on some key features and their impact on test, measurement,
and control applications.
 NEW PLATFORM ARCHITECTURE

These block diagrams represent the higher-level architectural differences between the
previous generation of Intel microarchitectures and the new Nehalem
microarchitecture for single-processor systems.
 As shown in Figure , the previous Intel microarchitectures for a single processor
system included three discrete components: a CPU; a Graphics and Memory
Controller Hub (GMCH), also known as the northbridge; and an I/O Controller Hub
(ICH), also known as the southbridge. The GMCH and ICH combined are referred
to as the chipset.
In the older Penryn architecture, the front-side bus (FSB) was the interface for
exchanging data between the CPU and the northbridge. If the CPU had to read or
write data into system memory or over the PCI Express bus, then the data had to
traverse over the external FSB. In the new Nehalem microarchitecture, Intel
moved the memory controller and PCI Express controller from the northbridge
onto the CPU die, reducing the number of external databus that the data had to
traverse. These changes help increase data-throughput and reduce the latency for
memory and PCI Express data transactions. These improvements make the Core
i7 family of processors ideal for test and measurement applications such as high-
speed design validation and high-speed data record and playback.
HIGHER-PERFORMANCE MULTIPROCESSOR
SYSTEMS WITH QPI
Not only was the memory controller moved to the CPU for Nehalem
processors, Intel also introduced a distributed shared memory
architecture using Intel QuickPath Interconnect (QPI). QPI is the new
point-to-point interconnect for connecting a CPU to either a chipset or
another CPU. It provides up to 25.6 GB/s of total bidirectional data
throughput per link.
Intels decision to move the memory controller in the CPU and
introduce the new QPI databus has had an impact for single-
processor systems. However, this impact is much more significant for
multiprocessor systems. Figure 2 illustrates the typical block diagrams
of multiprocessor systems based on the previous generation and the
Nehalem microarchitecture.
These block diagrams represent the higher-level architectural
differences between the previous generation of Intel
microarchitectures and the new Nehalem microarchitecture for
multiprocessor systems.
 CPU PERFORMANCE BOOST VIA INTEL TURBO
BOOST TECHNOLOGY
About five years ago, Intel and AMD introduced multicore CPUs. Since then a
lot of applications and development environments have been upgraded to
take advantage of multiple processing elements in a system. However,
because of the software investment required to re-architect applications, there
are still a significant number of applications that are single threaded. Before
the advent of multicore CPUs, these applications saw performance gains by
executing on new CPUs that simply offered higher clock frequencies. With
multicore CPUs, this trend was broken as newer CPUs offered more discrete
processing cores rather than higher clock frequencies.
 To provide a performance boost for lightly threaded
applications and to also optimize the processor power
consumption, Intel introduced a new feature called Intel Turbo
Boost. Intel Turbo Boost is an innovative feature that
automatically allows active processor cores to run faster than
the base operating frequency when certain conditions are met.
Intel Turbo Boost is activated when the OS requests the
highest processor performance state. The maximum
frequency of the specific processing core on the Core i7
processor is dependent on the number of active cores, and
the amount of time the processor spends in the Turbo Boost
state depends on the workload and operating environment.
 IMPROVED CACHE LATENCY WITH
SMART L3 CACHE
Cache is a block of high-speed memory for temporary data storage located
on the same silicon die as the CPU. If a single processing core, in a
multicore CPU, requires specific data while executing an instruction set, it
first searches for the data in its local caches (L1 and L2). If the data is not
available, also known as a cache-miss, it then accesses the larger L3 cache.
In an exclusive L3 cache, if that attempt is unsuccessful, then the core
performs cache snooping searches the local caches of other cores to
check whether they have data that it needs. If this attempt also results in a
cache-miss, it then accesses the slower system RAM for that information.
The latency of reading and writing from the cache is much lower than that
from the system RAM, therefore a smarter and larger cache greatly helps in
improving processor performance.
 The Core i7 family of processors features an inclusive shared L3
cache that can be up to 12 MB in size. Figure 4 shows the different
types of caches and their layout for the Core i7-820QM quad-core
processor used in the NI PXIe-8133 embedded controller. The
NI PXIe-8133 embedded controller features four cores, where each
core has 32 kilobytes for instructions and 32 kilobytes for data of L1
cache, 256 kilobytes per core of L2 cache, along with 8 megabytes of
shared L3 cache. The L3 cache is shared across all cores and its
inclusive nature helps increase performance and reduces latency by
reducing cache snooping traffic to the processor cores. An inclusive
shared L3 cache guarantees that if there is a cache-miss, then the
data is outside the processor and not available in the local caches of
other cores, which eliminates unnecessary cache snooping.
 OPTIMIZED MULTITHREADED
PERFORMANCE THROUGH HYPER-
Intel introduced
THREADING
Hyper-Threading Technology on its processors in 2002.
Hyper-threading exposes a single physical processing core as two logical
cores to allow them to share resources between execution threads and
therefore increase the system efficiency (see Figure 5). Because of the lack
of OSs that could clearly differentiate between logical and physical
processing cores, Intel removed this feature when it introduced multicore
CPUs. With the release of OSs such as Windows Vista and Windows 7,
which are fully aware of the differences between logical and physical core,
Intel brought back the hyper-threading feature in the Core i7 family of
processors.
Hyper-Threading Technology benefits from larger caches and increased
memory bandwidth of the Core i7 processors, delivering greater throughput
and responsiveness for multithreaded applications.
 HIGHER DATA-THROUGHPUT VIA PCI
EXPRESS 2.0 AND DDR3 MEMORY
INTERFACE
To support the need of modern applications to move data at a faster rate, the
Core i7 processors offer increased throughput for the external databus and its
memory channels.
The new processors feature the PCI Express 2.0 databus, which doubles the
data throughput from PCI Express 1.0 while maintaining full hardware and
software compatibility with PCI Express 1.0. A x16 PCI Express 2.0 link has a
maximum throughput of 8 GB/s/direction.
To allow data from the PCI Express 2.0 databus to be stored in system RAM,
the Core i7 processors feature multiple DDR3 1333 MHz memory channels. A
system with two channels of DDR3 1333 MHz RAM had a theoretical memory
bandwidth of 21.3 GB/s. This throughput matches well with the theoretical
maximum throughput of a x16 PCI Express 2.0 link. The
NI PXIe-8133 embedded controller uses both of these features to allow users
 IMPROVED VIRTUALIZATION
PERFORMANCE
Virtualization is a technology that enables running multiple OSs side-
by-side on the same processing hardware. In the test, measurement,
and control space, engineers and scientists have used this technology
to consolidate discrete computing nodes into a single system. With the
Nehalem mircoarchitecture, Intel has added new features such as
hardware-assisted page-table management and directed I/O in the
Core i7 processors and its chipsets that allow software to further
improve their performance in virtualized environments.
These improvements coupled with increases in memory bandwidth
and processing performance allow engineers and scientists to build
more capable and complex virtualized systems for test, measurement,
and control.
 REMOTE MANAGEMENT OF NETWORKED SYSTEMS
WITH INTEL ACTIVE MANAGEMENT TECHNOLOGY (AMT)

AMT provides system administrators the ability to remotely

monitor, maintain, and update systems. Intel AMT is part of
the Intel Management Engine, which is built into the chipset
of a Nehalem-based system. This feature allows
administrators to boot systems from a remote media, track
hardware and software assets, and perform remote
troubleshooting and recovery.