Describing Logic Circuits

MOKHTAR NIBOUCHE
MOKHTAR.NIBOUCHE@UWE.AC.UK
ROOM 2N36
DEPARTMENT OF ENGINEERING DESIGN AND MATHEMATICS
FACULTY OF ENVIRONMENT AND TECHNOLOGY
UNIVERSITY OF THE WEST OF ENGLAND
 Learning Outcomes
2

At the end of this lecture you should be able to:

Understand basic concepts of Boolean algebra.
Use several approaches to describe the behaviour
of a logic circuit.
 Building Blocks
3

The AND GATE The OR GATE The NOT GATE

INVERTER
X X
Z Z X Z
Y Y

Z X.Y Z XY Z X X'

X Y Z X Y Z X Z
0 0 0 0 0 0 0 1
0 1 1 0 1 0 1 0
1 0 1 1 0 0
1 1 1 1 1 1
 Boolean Algebra
4

Named after the English Mathematician George

Boole (1815 1864).
Introduced to symbolically formalise Aristotle's
system of logic.
Similar - from a naming perspective - to the
ordinary algebra that deals with real numbers.
Differs in a major way from ordinary algebra as
Boolean constants and variables can only have
two possible values 0 and 1.
Is a mean for expressing the relationship between
inputs and outputs logic circuit .
 Boolean Expression
5

A logic circuit, no matter how complex, can be

completely described using three basic building blocks.
The Boolean expression describing the logic circuit is
derived by considering each individual output of the
building blocks.

AX B XY
X
Y
W XY YZ

Z C YZ

W XY YZ is called the Boolean expression of the logic

circuit.
 Boolean Expression - Examples
6

X X.Y
Y W1 = X.Y + Z
Z
(a)

X X+Y
Y W2 = (X+Y).Z
Z
(b)

XY (X Y).Z (X Y).Z U (X Y).Z

X
Y W (U (X Y).Z ) V
Z
U
V
 Implementing Logic Circuits
from Boolean Expression
7

Derive the logic circuits that corresponds to the

Boolean expression W XZ YZ XYZ
The logic circuit needs two 2-inputs AND gates, one 3-
inputs AND gate, two INVERTER gates and one 3-inputs
OR gate.
X XZ

W XZ YZ X YZ
Y YZ
Z

X YZ
 Boolean Rules
8

Boolean rules are very useful for simplifying Boolean

expressions and thus logic circuits.
To do that, lets consider a logic (Boolean) variable X.
It is clear that X takes only two possible values (0 or 1).

For the AND GATE For the OR GATE

1. X.0 0 1. X0 X

2. X.1 X 2. X 1 1

3. X.X X 3. XX X

4. X.X 0 4. XX 1
 DeMorgans Rules
9

DeMorgan's rules relate pairs of dual Boolean

variables in a systematic manner expressed in
terms of negation (very useful when simplifying
Boolean expressions).
X.Y X Y
X AND Y X OR Y
X
X Z
Z
Y Y

X Y X.Y
X
X
Y
Z
Y
Z X OR Y X AND Y
 Truth Table
10

A truth table is another means of describing a

logic circuits output in response to a change in
the logic levels at the input. This is done for all
possible combinations of the input.

X.Y X Y Z X.Y X+Y W1 W2

X
Y W1 = X.Y + Z 0 0 0 0 0 0 0
Z
0 0 1 0 0 1 0
(a) 0 1 0 0 1 0 0
0 1 1 0 1 1 1
X X+Y 1 0 0 0 1 0 0
Y W2 = (X+Y).Z 1 0 1 0 1 1 1
Z
1 1 0 1 1 1 0
(b) 1 1 1 1 1 1 1
 Hardware Description Languages
11

A Hardware Description Language (HDL) (such as VHDL

or verilog) is means of describing the behaviour of a
logic circuit. HDLs play almost the same role as
programming languages such C, C++, Python etc..
VHDL will be adopted for this module.
VHDL stands for VHSIC (Very High Speed Integrated
Circuits) Hardware Description Language.
A VHDL file is basically built using an entity and at least
one architecture.
The entity defines the interface to the external world of a
logic circuit (inputs and outputs).
The architecture defines a description of the internal
behaviour of this circuit.
 Hardware Description Languages
12

VHDL code for a 2-inputs AND basic gate.

X LIBRARY ieee,
Z
Y
USE ieee.std_logic_1164.all;

ENTITY and2 IS
Z X.Y PORT (X, Y: IN std_logic;
Z : OUT std_logic);
X Y Z END and2;
0 0 0 ARCHITECTURE behaviour OF and2 IS
0 1 1
BEGIN
1 0 1
1 1 1 Z <= X AND Y;
END behaviour;
 Logic Circuit Design
13

The control mechanism of an interlocking lift

door in a block of flats ensures that on request
the lift door will open (D = 1) if:

The request button has been depressed (B = 1)

AND a sensor indicates that the lift is not moving
(S = 0)
AND the request direction of the lift (R) is the
same as the current direction of the lift (C)
(down = 0, up = 1).
 Logic Circuit Design Truth Table
14

To get the lift door to open (D=1)

B S R C D Condition 1: The request button B is
0 0 0 0 0
0 0 0 1 0
depressed (B = 1)
0 0 1 0 0
0 0 1 1 0 Condition 2: AND the lift is not
0 1 0 0 0
0 1 0 1 0 moving (S = 0)
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1 Condition 3: AND the request
1 0 0 1 0
1 0 1 0 0
direction of the lift (R) is the same
1 0 1 1 1 as the current direction (C).
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 0
 Logic Circuit Design Boolean Expression
15

To derive the Boolean expression:

B S R C D 1. Consider only the cases where
0 0 0 0 0 D = 1 (i.e. the lifts door is open).
0 0 0 1 0
0 0 1 0 0 2. invert all the input variables that
0 0 1 1 0
0 1 0 0 0 have a state of 0 and then AND
0 1 0 1 0
0 1 1 0 0
them with the remaining input
0
1
1
0
1
0
1
0
0
1
variables - if any.
1 0 0 1 0
1 0 1 0 0
In this example, we have only two
1
1
0
1
1
0
1
0
1
0
entries (1000 and 1011), which lead
1 1 0 1 0 to:
1 1 1 0 0
1 1 1 1 0 B. S. R.C and B. S.R.C
 Logic Circuit Design Boolean Expression
16

To derive the Boolean expression:

B S R C D 3. OR all the entries to find D
0
0
0
0
0
0
0
1
0
0
D B. S. R.C B. S.R.C
0 0 1 0 0
0 0 1 1 0 Which could be written after a
0 1 0 0 0
0 1 0 1 0 quick simplification as:
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1 D B. S .(R C)
1 0 0 1 0
1 0 1 0 0
1 0 1 1 1 Note: you dont need to worry for
1 1 0 0 0
1 1 0 1 0 the simplification at the moment.
1 1 1 0 0
1 1 1 1 0
 Logic Circuit Design Boolean Expression
17

To derive the digital circuit, convert all the logic

B S R C D operations into logic gates.
0
0
0
0
0
0
0
1
0
0
The Boolean expression:
0 0 1 0 0
0 0 1 1 0
0 1 0 0 0 D B. S .(R C)
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0 Becomes:
1 0 0 0 1
1 0 0 1 0
1 0 1 0 0 D B AND NOT S AND NOT (R XOR C)
1 0 1 1 1
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 0
 Logic Circuit Design Boolean Expression
18

The digital circuit will require:

B S R C D two 2-inputs AND gates, one
0 0 0 0 0 NOT gate and one 2-inputs
0 0 0 1 0
0 0 1 0 0 NXOR gate.
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0 BS
B
0 1 1 0 0
S D B.S .(R C)
0 1 1 1 0
1 0 0 0 1
1 0 0 1 0
1 0 1 0 0 R
1 0 1 1 1 C RC
1 1 0 0 0
1 1 0 1 0
1 1 1 0 0
1 1 1 1 0
 Logic Circuit Hardware Description Language
19

The VHDL code to describe the circuit is

LIBRARY ieee,
B S R C D USE ieee.std_logic_1164.all;
0 0 0 0 0
0 0 0 1 0
ENTITY lift IS
0 0 1 0 0 PORT (B, S, R, C : IN STD_LOGIC;
0 0 1 1 0
0 1 0 0 0 D : OUT STD_LOGIC);
0 1 0 1 0 END lift;
0 1 1 0 0
0 1 1 1 0
ARCHITECTURE behaviour OF lift IS
1 0 0 0 1 signal A, E: STD_LOGIC;
1 0 0 1 0
1 0 1 0 0 BEGIN
1 0 1 1 1 A <= B AND NOT S;
1 1 0 0 0
1 1 0 1 0 E <= NOT (R XOR C);
1 1 1 0 0 D <= A AND E;
1 1 1 1 0
END behaviour;
 Summary
20
Through the design example, a variety of
description approaches have been used:
Logical statements;
A Truth table;
A Boolean expression ;
Logic gates;
A VHDL code.
The other method not included in the lecture:
Timing diagrams (waveforms);
 Examples
21
1. Determine the Boolean expression of the logic
circuit below and then derive its truth table.
X
Y
W
Z

2. Using truth tables, prove that DeMorgans

Rules are correct.
3. Check that X Y X.Y X Y ?
 Examples
22
1. The Boolean expression of the logic circuit is:

W X .Y Y.Z

X
Y
W
Z
 Examples
23

The Truth table is:

X Y Z X XY YZ XY YZ
0 0 0 1 0 0 0
0 0 1 1 0 0 0
0 1 0 1 1 0 1
0 1 1 1 1 0 1
1 0 0 0 0 0 0
1 0 1 0 0 1 1
1 1 0 0 0 0 0
1 1 1 0 0 1 1

W X .Y Y.Z
 Examples
24
2. DeMorgans rules:
X Y X Y XY X.Y X.Y X Y
0 0 1 1 1 1
0 1 1 0 1 1 X
X
1 0 0 1 1 1 Y
Z
Y
Z

1 1 0 0 0 0

X Y X Y X.Y XY
X Y X.Y
0 0 1 1 1 1
0 1 1 0 0 0
X
X
1 0 0 1 0 0 Y
Z
Y
Z

1 1 0 0 0 0
 Examples
25

3. X . Y X.Y X Y ?

X Y X Y X.Y X.Y X.Y X.Y X Y XY

0 0 1 1 1 0 1 0 1
0 1 1 0 0 0 0 1 0
1 0 0 1 0 0 0 1 0
1 1 0 0 0 1 1 0 1