VHDL CODE FOR ADC0804, 4-BIT

MAGNITUDE COMPARATOR AND

PARITY GENERATOR

Presented by:- APARNA

Department of Electronics Engineering
(VLSI & ES)
 TOPICS
 ADC0804
 ADC
 FEATURES
 PIN DIAGRAM & DISCRIPTION
 ADC0804 INTERFACE SCHEMATIC & TIMING DIAGRAM
 VHDL CODE & SIMULATION RESULT

 PARITY GENERATOR
 INTRODUCTION
 VHDL CODE & SIMULATION RESULT

 4-BIT MAGNITUDE COMPARATOR

 INTRODUCTION
 VHDL CODE & SIMULATION RESULT
 ADC
 Analog-to-digital converter (ADC) is a device which can
convert analogue voltage to digital numbers so that
microcontrollers and microprocessors can handle and process
the data.
 ADC are the most widely used devices for data acquisition.
 ADC has n-bit resolution, where n can be 8, 12, 16 or even 24
bits.
 The higher-resolution ADC provides a smaller step size.
 Step size is the smallest change that can be recognized by ADC
Vcc
Step Size  n
2 1
 Vcc is the reference voltage of ADC with n-bit resolution.
 Table : Resolution versus Step Size for ADC (if Vcc = 5V)
ADC0804 IC
 ADC0804
Features
 Single channel ,8-bit parallel ADC module
 Easy to interface with all
Microprocessors or works
Stand alone.
 Differential analog voltage inputs. 0V to 5V analog input
voltage range with single 5V supply.
 On chip Clock available.
 Digital output various from 0 to 255.
 When Vref = 5V, for every 19.60mV of analog value there will
be rise of one bit on digital side (Step size)
 Available in 20-pin PDIP, SOIC packages.
 A common, low-cost ADC, compatible with a wide range of
microprocessors. There are many faster ADCs available with
more resolution, this device is ideal for applications that do
not require a high degree of accuracy.
 ADC0804 requires up to 100 µs to convert an analog input
voltage into a digital output code.
ADC0804 PIN DIAGRAM
 PIN DESCRIPTION
Pin No Function Name
Activates ADC; Active low ; used if more than 1 ADC module is used.
1 Chip select
By default grounded
Input pin; High to low pulse brings the data from internal registers to
2 Read
the output pins after conversion
3 Input pin; Low to high pulse is given to start the conversion Write
4 Clock Input pin; to give external clock. Clock IN
5 Output pin; Goes low when conversion is complete Interrupt
6 Analog non-inverting input Vin(+)
7 Analog inverting Input; normally ground Vin(-)
8 Ground(0V) Analog Ground
9 Input pin; sets the reference voltage for analog input Vref/2
10 Ground(0V) Digital Ground
11 D7
12 D6
13 D5
14 D4
8 bit digital output pins
15 D3
16 D2
17 D1
18 D0
19 Used with Clock IN pin when internal clock source is used Clock R
20 Supply voltage; 5V Vcc
TIMING DIAGRAM FOR ADC0804
 ADC0804 INTERFACE

RD/OE

WR/SC

ADC0804 INTR/EOC FPGA

ADC OUTPUT
(LED)
Analog ADC 8-BIT OUTPUT
input
CLK
VHDL CODE FOR ADC0804
SIMULATION RESULT
 PARITY GENERATOR
 A Parity Generator is a Combinational Logic Circuit that
Generates the Parity bit in the Transmitter.
 A Parity bit is used for the Purpose of Detecting Errors during
Transmissions of binary Information.
 It is an Extra bit Included with a binary Message to Make the
Number of 1’s either Odd or Even.
Two Types of Parity

 In Even Parity, the added Parity bit will Make the Total
Number of 1’s an Even Amount.
 In Odd Parity, the added Parity bit will Make the Total
Number of 1’s an Odd Amount.
PARITY GENERATOR TRUTH TABLE
VHDL CODE FOR ODD PARITY
SIMULATION RESULT
4-BIT MAGNITUDE COMPARATOR
 Compare two multi-bit binary numbers
 The comparison of two numbers
outputs: A>B, A=B, A<B
 LOGIC USED IN VHDL CODE
in_1=_ _ _ _
in_2=_ _ _ _
‘0’ -> unsigned bit vector
Comp_type
‘1’-> signed bit vector

in_1= 0 _ _ _ in_1= 1 _ _ _
in_2= 0 _ _ _ in_2= 1 _ _ _

in_1= 1 _ _ _ in_1= 0 _ _ _
in_2= 0 _ _ _ in_2= 1 _ _ _
VHDL CODE FOR COMPARATOR
SIMULATION RESULT
THANK YOU