LEC-8

OP AMPS II: DEPARTURES FROM IDEAL

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 Do the Golden Rules Apply?
Vop-amp

• Yes…’sort of’. Applies for + inputs only.

• + inputs take op amp positive and diode conducts…circuit behaves like a follower… Vout = Vin
• Feedback fails for – inputs…op amp snaps down to – saturation (-VCC).
• Vout tied to gnd thru R but direct output of op amp (Vop-amp) → - VCC, reverse-biasing diode.
• Notice…the active rectifier ‘hides the 0.6 V diode drop’ from output…unlike the passive rectifier.
 Output Glitch
(a) (b) • In Fig (a) when input is (-) output is clamped to gnd, but
when input crosses over to (+) a glitch occurs before
output can follow input.
• Fig (b) shows why… on (-) input, the output is driven
heavily into (-) saturation. Op amp has to (i) come out of
saturation, then (ii) ‘slew’ up to catch up with (+) input.
(d)
(c)

• Improve glitch by a factor of 10…use 2nd diode to insure that one or the other always conducts (Fig (c)).
• For (-) inputs, op amp output goes (+) 1 diode drop and Vout clamped to gnd (Fig (d).
• For (+) inputs, op amp out goes (-) 1 diode below Vout and Vout = - Vin. Op amp is a G = -1 inverter.
• Op amp never swings into saturation.
LF411 Op Amp
• Simplified schematic of LF411
• JFET differential input stage (Q1 – Q2).
• Current mirror active load (Q3 – Q4).
• Npn buffer (Q5).
• Push-pull output stage (Q7 – Q8).
• Why CC?
• Why 2 diodes?
• Why R5 & R6?

• Why isn’t this op amp ideal?

 1. Slew Rate
• Slew rate: rate of change in V/μs
of Vout in response to step input.
• Op amps have ‘compensating’ capacitors in their
‘innards’ to prevent oscillation. Essentially,
compensation keeps the output phase shift < 1800
for loop gains > 1. Compensation reduces slew rate.

• Within the chip, and particularly within the output

driver, low current levels limit the rate at which
output can change, i.e., slows the slew rate.

• If op amp is ‘pushed faster’ than its slew rate limit, signals will become distorted.
• For example, a sine wave with a frequency of f Hertz and peak voltage V volts requires an
operational amplifier with a slew rate of 2 π f V volts per second.
• This is required to ensure the maximum slew rate requirement which occurs at the zero
crossing point can be met.
• As can be seen in the figure, in the limit, the op amp slewing distortion will result in the
creation of a triangular waveform. If the frequency is increased the op amp will be even less
able to keep up and therefore the amplitude of the output waveform will decrease.
 2. Input Offset Voltage (VOS)
(b) (d)
(a)

(c)

• Op amp inputs are not perfectly balanced. It’s as though the

input stage has a battery in series with one of the inputs as
schematized in Figure (a). The problem is worse with FET’s!
• Figure (b) shows what happens if you ground the two inputs
(or connect them to the same voltage other than 0). The op
amp will saturate…

• Figure (c) shows how you ‘null’ the output…connect –VOS across the two inputs.
• Typical VOS’s ~ 1 mV but can be as small as ~ 1 μV.
• Figure (d) shows the LF411. You ‘null’ the output by attaching a 10K pot across pins 1 and 5 with
the ‘wiper’ connected to VEE. Essentially, you are taking the action depicted in Figure (c).
 More Departures from Ideal Behavior
3. Input Bias Current (IB): Op amps source (or sink) small input current. (IB = ½ (Iin+ + Iin-) with inputs
tied together.) Typically (i) 10’s of nA for BJT, (ii) 10’s of pA for JFET and fractions of pA down to
fA for MOSFET’s.
• The bias current flows through the resistive paths leading into
each input.
• Suppose the input is grounded…what’s Vout?
• The resistance in the + and – input paths differ by a factor of
1000 and the ~ equal bias currents will cause a 1000-fold voltage
difference between the 2 inputs.
• IBIAS for the 741 is about 100 nA, but could go as high as 500 nA.
• Worst case; ΔVin ~ 5 mV. The amplifier has a gain of 1000.
Therefore, Vout ~ 5V!
High gain non-inverting amplifier
designed to magnify how IBIAS • Solutions?
current can cause output error.
 IBIAS Solutions
1. Use a capacitor to 3. Balance the input resistive paths
roll off DC gain to 1

2. Keep resistances
small…but not too
small…say, 1 – 100K

4. Use op amp with

JFET inputs
 More Departures from Ideal Behavior
4. Input Offset Current (IOFFSET): Difference of currents between two inputs ~ 1/2 to 1/10 of IB.
5. Input Impedance (Zin): Small signal differential input impedance (looking into 1 input with the other
grounded). (i) JFET input LF411, Zin ~ 1012 Ω. (ii) BJT’s Zin ~ 100’s of MΩ, (iii) MOSFET’s Zin ~ 1015 Ω.
6. Output Impedance (Zout): Intrinsic output impedance WITHOUT FEEDBACK. Zout for LF411 ~ 40Ω. For
some op amps, Zout ~ 1000’s of Ω…but negative feedback lowers Zout for voltage amplifiers or raises
it for current sources.
7. For low load resistance, internal current limits keep op amps from swinging large output voltages
(eg, LF411 Fig (a)). Even ‘lightly’ loaded, they cannot swing output voltage closer than a few volts
from either supply rail, (Fig (b): (i) Output stage is a push-pull follower…swings no closer to rail than
a diode drop and usually less close because of drive circuit limitations; (ii) Short circuit protection
resistors R5 and R6 cause an internal voltage drop; (iii) Small impedance loads limit swing.
(a) (b)
 Voltage Gain, Band Width and Phase Shift
• Fast op amps do exist but they are
power hungry and have high bias
currents.
• Don’t use them if you don’t need
them!
• For really fast circuitry, you might
have to build your own out of BJT’s!
• Remember CC in 2nd stage (buffer) of LF411? It
compensates for high gain amplifier’s tendency to
oscillate.
• It does this by causing the op amp open-loop gain (and
closed-loop gain) to “roll off” at – 6dB / octave. Op Amp
behaves as though driving a simple RC low pass filter.
• The IC’s very high gain AOL (~ 105 – 106) (100 – 120 dB),
so necessary for feedback to work, evaporates with
increasing f. It’s gone at ~ a few MHz! AOL → 1 @ fT.
• fT for LF411 = 4 MHz. It fails to work if pushed beyond!
What does the 6dB / octave do?
• Produces 900 phase shift lag at flat part of bode plot
increasing to ~ 1600 as AOL → 1. If AOL > 1 when phase
shift hit 1800…circuit would oscillate. (Why?)
• Notice that application of feedback increases bandwidth.
• Also notice that fT = GBW (gain-bandwidth product)…a
constant regardless of the value of the feedback!
 Input Impedance of Inverting Amplifier
• Think of the inverting amplifier (IA) (Fig B) as a combination of an
I1 I2 input resistor R1 driven by a voltage source to make a current source,
which drives a transresistance amplifier (TA) (Fig A).
Ii
• Input impedance of (IA) = R1 + Zin (TA)

• Calculate Zin (TA)

Transresistance Amplifier (TA) • I1 = Ii + I2 = [V - / Ri) + (V - - V0) / R2 ] (Ri = Input Impedance of op amp)

Inverting Amplifier (IA)
• But V0 = - A V -
• I1 = V – [1 / Ri + (1 + A) / R2 ]
• I1 / V – = 1 / Zin = [1 / Ri + (1 + A) / R2 ]
• 1/ Ri ~ 0
• 1 / Zin ~ (1 + A) / R2
• Zin(TA) = R2 / (1 + A) (Fig A)
• Here’s where deviations from ideal come in…A decreases with
increasing frequency, so Zin increases. But current inputs like low Zin.
At f = fT … A = 1 and Zin = R2 / 2. This could be as high as 10’s of kΩ.
• Note that for IA, Zin(IA) = R1 + R2 / (1 + A) ~ R1 where A ~ ∞

• Exercise: Calculate Zout for IA and TA

 Gain of Inverting Amplifier
• G = Vout / Vin
• How much voltage Vf is fed back to input?
• Vf = (V0 – Vin ) R1 / (R1 + R2) = β (V0 – Vin )
• β = R1 / (R1 + R2)
A • V – = Vin + Vf = Vin + β (V0 – Vin )
• V0 = - A V –
• V – = Vin + β (- A V – – Vin )
• V – (1 + β A) = Vin (1 – β A)
• G = Vout / Vin = - A V – / [V – (1 + β A) / (1 – β)]
• G = - A (1 – β) / (1 + β A)

• When A → ∞, G → (β – 1) / β = 1 – 1 / β = [1 - (R1 + R2) / R1] = - R2 / R1

• When A → 1, G → 0!
 AC Amplifier

• Suppose signal source is AC-coupled.

• Remember IBIAS…you must provide a return to ground, i.e.,
the 100k R1 in Fig A. The components used give G = 10
and f3dB = 16 Hz.

• Suppose only AC signals are being amplified. If amp has a large

voltage gain, as previously stated for this AC amp (Fig B), good idea
to “roll off” gain to 1 at DC as in Fig B. Again, G = 10 and f3dB = 17 Hz.

• Note large capacitor required to get a low f3dB . There are ways around
this … such as raising R1 and R2, but if too large, could use a “T”
network for R2 (to be covered later).
 Logarithmic Amplifier
(a)
• Calculate V0 (Fig (a))
I • I = Vin / R
• I = I0 exp (- V0 / VT*)

• Solving for V0 …
I • V0 = - VT* ln (I / I0)
• V0 = - VT* ln (Vin / I0 R) = - VT* ln (Vin) + VT* ln (I0 R)
• V0 = a ln (Vin) + b

• Problems:
• What happens if Vin < 0?
• Diode is reverse biased and op amp saturates … Vout → +VCC. (b)
• VT* and I0 are temperature dependent so compensation is
needed
• Inputs above are not balanced so IBIAS might throw amp into
saturation.
• The diode has limited dynamic range, maybe 60 – 70 dB. If a
diode-connected transistor is used (Fig (b), dynamic range
can be extended to ~120 dB.
 Op Amp Integrator
(a)
I • Op Amps make nearly perfect integrators…

• I = Vin / R = - C ( dVout / dt )
I 1
Vout  t     Vin  t  dt  const
RC
• Example #1
• R = 1M, C = 0.1 μF, Vin = 1V
• ΔVout = - Vin Δt / (RC) = - (10V/s) Δt
(b) Vin
• Example #2
• R = 1M, C = 1 nF, Vin = Figure (b) waveform
• “Perfect” integrator… but…
Vout
• What happens if Vin = 0? (There’s no DC
feedback…what is DC gain?)
10 ms/div
• What will be effect of IBIAS and VOS ?
• How ‘reset’ C?
Op Amp Integrator – continued
Discrete JFET n-channel switch

IC CMOS analog switch

IC CMOS analog switch on input

for integrate…then hold

Resistor restores DC feedback to produce stable

biasing…but rolls off integrator action at f < 1 / (RfC)
 Op Amp Integrator – continued
• Integrator Errors depend on Vin thru resistor…or Iin.
• 1st … Iin input. IB adds (or subtracts) from Iin. If Iin = 0, integrator still
ramps at rate dVout/dt = IB / C.
• VOS merely offsets Vout by VOS without ramping (there is no current
flow). Thus, when C is reset by switch… Vout → VOS
• Example:
• C = 0.1 μF, R = 1M…if I = 1 μA, dVout/dt = - 10 V/s. If we use OP27E
(BJT op amp), IB = ± 40 nA and dVout/dt = IB / C = ±0.4 V/s! Clearly,
CMOS LMC 6042A a better choice…max IB = 4 pA, but typical 2 fA!

• 2nd … Vin thru R. VOS produces a “bias current” I = VOS / R, in

addition to IB, causing C to ramp! Choice not so clear. LMC6042A
produces I = 3 nA…1000 larger than its worst case IB !
• Basically, minimize IError = IB + VOS / R. OP97E a good choice.
• Max IB = 0.1 nA and VOS = 25 μV. Worst case = 0.125 nA…25 times
better than LMC6042A and 320 times better than OP27E.

• You can reduce VOS / R by increasing R if you have op amp with

excellent IB (LMC6042A) but only modest VOS.
• If ‘drift’ still too large, put large Rf across C, but rolls off integrator action at 1 / (Rf C).
 Op Amp Integrator – continued
(a) • Prevent saturation…large feedback resistor Rf. It bleeds off small I which undoes
effect of Ierror. For Rf ~ 100 Rin, ‘bleeds off’ only 1% of Iin.
• Limits DC gain…about -100 here. DC input voltage error of ±1 mV leads to output error
±100 mV.
• ‘Bleed off’ current grow as Vout grows relative to Vin.
• At f > 1 / (2πRf C), XC < Rf and Rf’s effect is less significant.
(b) ±300 mV
• “T” network consisting of small R’s can generate same
effect as single large R (Fig (b)). ±10 mV
• Only ~1/100 of Vout is fed back, generating same DC
feedback as a single Rf =10M … 100 times greater than
100 K feedback resistor in T.
• Good news: (i) smaller IBIAS errors; (ii) reduces effects of stray capacitance (c)
in feedback path (not important here but is important in circuits with no
feedback C);
• But…bad news: (iii) it amplifies VOS, which produces an effective bias
current through T.

• Rf or T will distort integration when Vout gets large compared to Vin (Fig (c)).
• Fig (d) shows compromised integrator nothing but x100 DC amplifier after
awhile.
(d)
 Op Amp Differentiator
I
• I = C dVin / dt = -Vout / R
I • Vout = - RC dVin / dt

• Differentiators are bias stable

• But they suffer noise and
Impractical Differentiator instabilities at high f.
• Solution: Slow them
down…add some
‘integration, R1 and C2, so
gain rolls off at high f.

Practical Differentiator

• Large R1 C2 produces stability at expense of differentiator bandwidth.

• Start with R1 = 0.5 (R2 / (C1 fT)) ½ and C2 ~ R1 C1 / R2
• At high f >> 1/(2π R1 C2 ) circuit is an integrator.
 Op Amp Differentiator – continued
• Figure (a)
• Remember the passive RC differentiator…it
works…as long as Tr << RC. Thus, C doesn’t
have time to charge.
(a)

(b) • Figure (b)

• The input is a square wave.
• Simple differentiator marginally stable…it
‘shivers’ in response to the fast step part of the
square wave.
• The practical differentiator works nicely and
the output voltage doesn’t have to be small as
above, but very high f response has to be given
up.