Organizing Engineering

Research Papers (5)

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Geographic-based information is increasingly used in daily living. There is
always the need to know, Where am I going to? and, How do I get there? in cases
such as visiting a friend, going somewhere for business, sightseeing, making holiday
plans, and so on. The required geographic information may be as simple as an address,
or as complex as the complete path and estimation of time. Many kinds of geographical
information are needed for various purposes. Additionally, many convenient applications
that provide such information on PDAs are available in the market today, with an
increasing number of consumers using these applications.
However, the passive mode of accessing information fails to transmit
effectively geographic-based information to PDA users.
For instance, although users cannot use the system all of the time,
critical geographic-related information may appear when users are busy on other tasks.
In some cases, they must be informed immediately. If they have answers on time, they
may save time, resolve an emergency, or even avoid an accident. Unfortunately, no
system can actively page users.
The inability of PDA users to receive updated information in a timely
manner will limit PDA use to within a narrow range. Such a limitation may discourage
PDA use. Most people will not buy such an expensive notepad when they dont think its
functions are useful. Only the evidently useful and convenient functions may change
peoples life styles and become essential. The conventional GIS systems in PDAs are not
so advantageous as to be killer applications.
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Based on the above, we should design a GIS-based architecture that supports
an automatic reporting service through handheld mobile devices.
To do so, the coordinates of a PDA user can be obtained using a GPS
module. These coordinates can then be transmitted to the back-end server through a
wireless network and used as the filter to query the database. Next, query results can be
sent back to the PDA, triggering an event to inform the PDA user.
As anticipated, the GIS-based architecture can automatically page PDA
users through a wireless network when desired local information becomes available.
Using the global positioning system (GPS) feature, the system will periodically send the
position of the use to the server. The server will then check for any local news about
disasters or roadblocks, and for advertisements. The results will be sent back to the
users machine and an event triggered to remind the user. The proposed GIS-based
architecture can enable PDA users to access information with their geographic positions
functioning as a filter. This avoids sending too much junk information to users.
Limited by bandwidth and the speed of wireless network, this study also
offers strategies for data storage that involve a robust multi-tier architecture. A large
amount of geographic data is placed on the server, and only required data are
transferred to the client host through the network.
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As IC designs become increasingly complicated and larger,
hardware emulation is essential for their verification.
However, emulators such as our emulation solution are too
expensive and too slow.
For instance, a Quickturn emulator costs more than a
million US dollars and only works below 1 MHz, which is markedly
lower than the frequency required in newly developed devices.
Such a high cost prevents us from verifying the
designs of platforms, and the low speed makes testing difficult and the
results unrealistic, because most devices, which are designed for
66MHz, 100MHz and 133MHz systems, cannot function normally in the
1MHz environment. Moreover, testing in an emulator takes an
extremely long time, such that a benchmark that requires 20 minutes in
a real system requires 24 hours to complete in an emulated one.
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Based on the above, we should develop an emulation method,
costing less and performing more efficiently than conventional methods.
To do so, appropriate types of FPGA, e.g., Virtex E of Xilinx or
APEX of Altera, with a retail value of around US$10,000, can be selected
according to size and speed requirements in order to emulate an actual chip.
An FPGA synthesis tool, for example, FPGA compiler or Synplify PRO, can
then be adopted to map the design net-list into an edif file for FPGA. Next,
software for placing and routing FPGA can be employed to construct an
emulation database in FPGA. Additionally, timing constraints can be
established to enhance the emulation. Moreover, the database can be
downloaded into FPGA to initiate emulation and debug new designs.
As anticipated, the proposed method can reduce the costs and
time of developing a 10MHz frequency by 95%, whereas the conventional
method can only be used at a frequency of 1MHz.
Importantly, the proposed method can reduce testing time, include
new devices that cannot function at 1MHz, and allow our company to verify the
design with numerous platforms.
Further details can be found at
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