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Combinational Logic with MSI and LSI

Binary Parallel Adder

N-bit Parallel Adder

Example Design BCD-excess3 converter


Inspection of truth table of decimal to excess 3 code indicates that every excess 3 code is obtained by adding 0011 to its decimal equivalent. This can be obtained by using 4 bit parallel adder .

Carry Propagation
In parallel adder, the Si value in any given stage will not be stable until input carry is propagated to it. y Since a the output carry of a full adder passes two gates( AND& OR), therefore in case of four bit parallel adder, C5 would have 2x4=8 gates levels from C1 to C5 y The total propagation time in a adder would be propagation time in one half adder plus 8 gate levels. y For an n bit parallel adder, there are 2n gate levels for he carry to propagate through.
y

All Pi and Gi are generated in two gates levels. Once they are stable, all out put carries are generated by a delay of two gates level. The outputs S2 through S4 have equal propagation delay.

BCD ADDER
y A BCD adder is the one that adds two BCD digits and

produces the result also in BCD y Suppose we apply two BCD digits to 4 bit parallel binary adder, the produced sum will be in binary that can range from 0 to 19 ( 9+9+1=19) y But the output is required in BCD y We must find mechanism for this correction

Magnitude comparator

Decoder
y A binary code of n bits is capable of representing up to 2n

distinct elements y A decoder is a combinational circuit that convert binary information from n input lines to maximum of 2n unique outputs y In case of dont care conditions, the decoder output will have less than 2n outputs y Only one output of the decoder is true

Example: Design a BCD-to-decimal decoder

Function Implementation with decoder


y A decoder provides 2n minterms of n input variables y Since any Boolean function can be represented by sum of

minterms, one can use the decoder to generate minterms and an external OR gate to form the sum.

Decoders with Enable Input


y A decoder with an enable input can function as a

demultiplexer. It receives information on a single line and transmits this information on one of 2n possible output lines. y When Enable input, E = 0, the circuit operates as a decoder with complemented outputs that are 0 in the truth table.

Encoder
y Encoder is digital function that produces a reverse operation from y y y y y y y

that of decoder. A encoder has 2n input lines and n output lines The output lines generate the binary code for the 2n input variables. An octal-to-binary encoder circuit has 8 inputs and 3 outputs. Only one input line can be equal to one at any time. Possible input combinations = 28 = 256 Meaningful combinations = 8 Dont care conditions = 248

Multiplexer

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