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What is Nanotechnology?
Nanotechnology is the creation of functional materials, devices, and systems through control of matter on the nanometer (1 to 100 nm) length scale and the exploitation of novel properties and phenomena developed at that scale.
Nano-scale Devices: Electronic devices that are designed with lateral features of 100 nm or less.
Nanotechnology makes
Smaller Transistors Smaller Memory Smaller Circuitry
Moores Law
Moore's law: The number of transistors that can be placed inexpensively on an integrated circuit doubles approximately every 18 to 24 months.
Nanoelectronic Devices
Single Electron Transistor. Nanowires Carbon Nano Tubes Solid State Quantum Devices Quantum Dots and Arrays Nano scale MOSFET
What is a SET
The single electron transistor is a new type of switching device that uses controlled electron tunneling to amplify current.
Fabrication
Fabrication of single electron transistors is done using focused ion beam (FIB) etching technology.
Application of SETs
Quantum computers -1000x Faster Microwave Detection High Sensitivity Electrometer
Nanowires
A nanowire is a nanostructure, with the diameter of the order of a nanometer (109 meters). Aspect ratios (length-to-width ratio) of 1000 or more. Semiconductor nanowire crossings will be important to the future of digital computing. Because of their high aspect ratio, nanowires are also uniquely suited to dielectrophoretic manipulation.
Synthesis Of Nanowires
Top down approach: Fabrication from a large piece of material using lithography and electrophoresis. Bottom up approach: Nanowire is synthesized by the combination of constituent ad-atoms. A common technique for creating a nanowire is the VaporLiquid-Solid (VLS) synthesis method: It is a Chemical Vapor Deposition method(CVD). Source Material is a feed gas which is exposed to a catalyst . Good catalysts are liquid metal Nano-clusters like gold.
Carbon Nanotubes
Carbon nanotubes are long meshed wires of carbon Longest tubes up to 1mm long and few nanometers thick made by IBM.
Carbon Nanotubes 0.6-1.8 nm in diameter 45 Billion Pascals Bent and straightened without damage Estimated at 109 A/cm2 Comparatively Si wires at least 50nm thick Steel alloys have 2 Billion P. Metals fracture when bent and restraightened Cu wires burn at 106 A/cm2
Carbon nanotubes can be metallic or semiconductor depending on their chirality. C = n a1 + m a2 Chiral Vector C is defined as the vector from one open end of the tube to the other after it is rolled. If (n-m) is divisible by 3, the tube is metallic If (n-m) is not divisible by 3, the tube is semiconducting.
Dot unoccupied
3-dimensional island tunneling barrier State determined by presence of electron and not by conduction. Quantum cell array (QCA) is a lattice of these cells with 2 electrons confined. Occupied electrons are furthest from each other due to repulsive forces.
StranskiKrastanov growth
Self-assembled quantum dots nucleate spontaneously under certain conditions during molecular beam epitaxy (MBE) and metallorganic vapor phase epitaxy (MOVPE) When a material is grown on a substrate to which it is not lattice matched. The resulting strain produces coherently strained islands on top of a two-dimensional wetting layer. This growth mode is known as StranskiKrastanov growth. The islands can be subsequently buried to form the quantum dot.
Nano-Scale MOSFET
MOSFET Fabrication
Present Day Fabrication Method (Lithography): IC Pattern is projected in 1 cm2 increments onto a silicon wafer using UV light and a series of lenses that reduce the pattern to some given required resolution. Each 1 cm2 section contains roughly 109 picture elements (pixels).
Nanoscale Devices: Most features of the typical nanoscale device are too small to be made like present day devices so a sharp focused beam of electrons is used to build the 1 cm2 pattern one device at a time. Of course, this is way too slow for mass fabrication.
CMOS Circuits
Complementary metaloxide semiconductor(CMOS) is a technology for constructing integrated circuits. CMOS technology is used in microprocessors, microcontrollers, static RAM The MOSFET is used in digital CMOS logic, which uses p- and n-channel MOSFETs as building blocks.
Target outcomes
a) Beyond CMOS technology
New switches and interconnects . Advanced system integration technology and new methods for computation. Emerging memories targeting the concept of non-volatile universal memory. Carbon based electronic devices; Novel materials for interconnects
Target outcomes
b) Circuit-technology solutions
Architectures including energy efficiency, spin devices; silicon with molecular switches; ferromagnetic logic; heterogeneous and morphic system architectures. Circuit design methodologies and tools Modelling and simulation Design-technology solutions for energy efficiency, high reliability and robustness.
This is a 2 gigabyte hard drive. It weighs about 70 pounds. It was first used in the 1980s. Its cost at that time ranged from $80,000 to $140,000.
2 GB in 1980s $80,000
2 GB in 1990s $200
2 GB in 2010 $5
Current research shows that by using nanotechnology, 1000 GB of memory can fit on the head of this pin. 1000 GB is 1 Terabyte.
A single pixel
References
Wikipedia: http://en.wikipedia.org/wiki/MOSFET#CMOS_circuits www.understandingnano.com/nanotechnology-electronics.html http://www.onboard-technology.com/pdf_ottobre2005/100507.pdf Lecture Slides
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