Microcontroller 8051

Input/output Pins, Ports & Circuits

Rohith.P.N IV th Sem ECE B Sec

 As we know Microprocessor doesn't have inbuilt Input/output ports. It must add an additional chip to interface with the external circuitry/devices. This disadvantage is overcome by the Microcontroller 8051. MC 8051 has inbuilt I/O ports/circuits. This helps the MC 8051 to connect with the external devices/memory etc..

Pin Description of the 8051

P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 RST (RXD)P3.0 (TXD)P3.1 (INT0)P3.2 (INT1)P3.3 (T0)P3.4 (T1)P3.5 (WR)P3.6 (RD)P3.7 XTAL2 XTAL1 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 Vcc P0.0(AD0) P0.1(AD1) P0.2(AD2) P0.3(AD3) P0.4(AD4) P0.5(AD5) P0.6(AD6) P0.7(AD7) EA/VPP ALE/PROG PSEN P2.7(A15) P2.6(A14) P2.5(A13) P2.4(A12) P2.3(A11) P2.2(A10) P2.1(A9) P2.0(A8)

8051

Pin details of MC 8051

The Microcontroller 8051 has 40 Pins.

I/O Port 0 I/O Port 1 I/O Port 2 I/O Port 3

Pins 32-37 Pins 1-8 Pins 21-28 Pins 10-17

Pin 40 - Vcc Pin 20 - Gnd Pin 19 & 18 XTAL1 & XTAL2 Pin 9 Reset Pin 31 EA (External Access) Pin 29 PSEN ( Program Store Enable) Pin 30 ALE (Address Latch Enable)

 Vccpin 40 Vcc provides supply voltage to the chip. The voltage source is +5V. GNDpin 20ground XTAL1 and XTAL2pins 19,18

 RSTpin 9reset It is an input pin and is active highnormally low. The high pulse must be high at least 2 machine cycles. It is a power-on reset. Upon applying a high pulse to RST, the microcontroller will reset and all values in registers will be lost. Reset values of some 8051 registers

RESET Value of Some 8051 Registers:

Register PC ACC B PSW SP DPTR RAM are all zero.

Reset Value 0000 0000 0000 0000 0007 0000

 /EApin 31external access

There is no on-chip ROM in 8031 and 8032 . The /EA pin is connected to GND to indicate the code is stored externally. /PSEN ALE are used for external ROM. For 8051, /EA pin is connected to Vcc. / means active low. /PSENpin 29program store enable This is an output pin and is connected to the OE pin of the ROM.

 ALEpin 30address latch enable It is an output pin and is active high. 8051 port 0 provides both address and data. The ALE pin is used for de-multiplexing the address and data by connecting to the G pin of the 74LS373 latch. I/O port pins The four ports P0, P1, P2, and P3. Each port uses 8 pins. All I/O pins are bi-directional.

 The 8051 has four I/O ports Port 0 pins 32-39P0P0.0P0.7 Port 1pins 1-8 P1P1.0P1.7 Port 2pins 21-28P2P2.0P2.7 Port 3pins 10-17P3P3.0P3.7 Each port has 8 pins. Named P0.X X=0,1,...,7, P1.X, P2.X, P3.X ExP0.0 is the bit 0LSBof P0 ExP0.7 is the bit 7MSBof P0 These 8 bits form a byte. Each port can be used as input or output (bi-direction).

Port Pin Circuit

Port 0 : When used as input,a 1 must be written to corresponding port latch Used as an output,0 must be be programmed Logic 1 in address bit will turn Upper FET on & lower FET off After address has formed & latched into External circuitry by ALE pulse,the External Bus is turned ON Port 0 now reads data from External Memory Port 0 pins can be accessed by address P0.0,P0.1,.,P0.7 It can also be addressed as AD0,AD1,.AD7

Port 0 with Pull-Up Resistors

Port 1 : Port 1 pins have no Dual functions If used as input a 1 is written to latch which turns upper FET on Used as output,lower FET is On & the Pullup is Off Output latch is directly connected to gate of Lower FET Port 1 can be accessed as P1.0,P1.1,. . . . .P1.7

Port 2 : It can be used as i/p or o/p which is similar in operation of Port 1 The alternate use of port 2 is to supply a high-order address byte in conjunction with port 0 low-order byte to address external memory Port 2 latches remain stable when External Memory is addressed They do not have to be turned around (Set to 1) For Data i/p as in Port 0 It can be accessed as P2.0,P2.1,. . . . . ,P2.7

Port 3 : It is similar to port 1,but has alternate Uses Each pin may be individually Programmed as I/O or for alternate Functions as shown
Pin P3.0-RXD P3.1-TXD P3.2-INT0 P3.3-INT1 P3.4-T0 P3.5-T1 Alternate Use Serial data input Serial data Output External interrupt 0 External interrupt 1 External timer 0 input External timer 1 input SFR SBUF SBUF TCON.1 TCON.3 TMOD TMOD

P3.6-WR P3.7-RD

External Memory Write Pulse External Memory Read Pulse

Writing 1 to Output Pin P1.X

Read latch
TB2 Load(L1) 1. write a 1 to the pin Internal CPU bus Write to latch
D Q

Vcc
2. output pin is Vcc P1.X pin output 1

1 0

P1.X
Clk Q

M1

TB1 Read pin

8051 IC

Writing 0 to Output Pin P1.X

Read latch
TB2 Load(L1) 1. write a 0 to the pin Internal CPU bus Write to latch
D Q

Vcc
2. output pin is ground P1.X pin output 0

0 1

P1.X
Clk Q

M1

TB1 Read pin

8051 IC

Reading High at Input Pin

Read latch 1. write a 1 to the pin MOV P1,#0FFH Internal CPU bus TB2 Load(L1) 1 1

Vcc

2. MOV A,P1 external pin=High

Q
P1.X

P1.X pin

Write to latch

Clk

M1

TB1 Read pin 3. Read pin=1 Read latch=0 Write to latch=1 8051 IC

Reading Low at Input Pin

Read latch 1. write a 1 to the pin MOV P1,#0FFH Internal CPU bus TB2 Load(L1) 1 0

Vcc

2. MOV A,P1 external pin=Low

Q
P1.X

P1.X pin

Write to latch

Clk

M1

TB1 Read pin 3. Read pin=1 Read latch=0 Write to latch=1 8051 IC