Refers to the operational units and their inter connections that realize the architectural specification.

Organizational attributes include those hardware details transparent to the to the programmer, such as control signals, interface between the computer and the peripherals, and the memory technology used.
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Computer Architecture refers to those attributes of a system visible to the programmers or those attributes that have a direct impact on the logical operation execution of the program. Example of attributes are instruction set, the number of bits to represent a certain data types and techniques in addressing memory.

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How many electronic circuits and components in a computer? How can they understand each other?

What is hierarchy?
What is structure? What is function?

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The key for the whole components to communicate each other is to recognize the HIERARCHIC nature of the computer system. A hierarchic system is a set of interrelated subsystems. The behavior at each level depends only a simplified, abstracted characterization of the system at the next lower level. At its each level the organization only concern to with STRUCTURE and FUNCTION.
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STRUCTURE The way in which the components are interrelated. FUNCTION The operation of each individual components as part of the structure.

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I.

Data processing
II.

Data Storage

III.

Data Movement
IV.

Control

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Data Movement Apparatus

Control Mechanism

Data processing

Data storage Facility

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Computer

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Computer

CPU
System Intercon nection

Main memory

Input/ Output

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CPU Controls the operation of the computer and performs its data processing function. Main Memory Stores data I/O Moves data between the computer and its external environment

System Interconnection Mechanism that provides a communication among CPU, main memory and I/O.
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CPU

Arithmetic Logic Unit

Control Unit

Internal CPU Interconnection

Registers

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Control Unit Controls the operation of the CPU ALU Performs the computers data processing function Registers Provides internal storage to the CPU CPU Interconnection Mechanism that provides for communication among CU, ALU and registers.

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Control unit

Logic sequencing

Registers and decoders

Control memory

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Program Execution The program to be executed consists of instructions stored in memory then the CPU does the actual work by executing instructions specified in the program. Two steps in instruction processing 1. Fetch

The CPU reads instruction from the memory

2. Execution The Computer executes each instruction

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start

Fetch the next instruction

Execute the instruction

halt

* the processing required for a single instruction is called instruction cycle

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Flow of instruction cycle 1. CPU fetches instruction from memory. 2. CPU register called the program counter (PC) to keep track of which instruction is to be fetched next. 3. The fetched instruction is loaded into a register in the CPU known as Instruction Regester (IR). 4. The instruction is in binary code that specifies what action the CPU to take. 5. The CPU interprets the instruction and performs the required action.
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CPU- Memory Based on the instruction the data may be transferred from the CPU to memory. CPU- I/O Data may be transferred to the outside world by transferring between the CPU and an I/O module. Data Processing The CPU may perform some arithmetic or logic operation on data. Control The data may be specify some data to be fetch for execution.

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0 Op code

3 4 address

15

Instruction format

Internal CPU registers Program Counter (PC) =Address of Instruction Instruction Register(IR) = Instruction being executed Accumulator (AC) = Temporary storage
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0001 = Load AC from memory 0010 = Store AC to memory 0101= Add ac to memory

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Instruction Address Calculation(IAC) Determine the next address to be executed. Instruction Fetch Read instruction from its memory location into the CPU. Instruction Operation Decoding Analyzed instruction to determine type of operation t be performed and operand/s to be used.
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Operand Address Calculation(oac) If the operation to an operand in memory or available via i/o then determine the address of the operand. Operand fetch(of) Fetch the operand from memory or read it in from I/O. Data operation(do) Perform the operation indicated in the instruction Operand store(os) Write the result into memory or out to I/O.

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Interrupts are provided primarily as a way to improve processing efficiency of the computer system.

FACT : Most external devices are much lower speed than the processor.

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Program Interrupts Generated by some condition that occurs as a result of an instruction execution, such as arithmetic overflow, division by zero, attempt to execute illegal machine instruction. Timer Generated by a timer with in the processor. This allows the operating system to perform certain functions on a regular basis.
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I/O Generated by I/O controller, to signal normal completion of an operation or to signal a variety or error conditions. Hardware failure Generated by a failure such as power or memory parity error.

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Computer consists of set of components of modules of three types( CPU,I/O,memory).

The collections of paths for connecting the modules is called Interconnection Structure.

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Read Write Read Write

address

Memory

data

address
Internal Data External Data

data

i/o modules M ports

Internal signal Internal Data External Data

address
Internal Data CPU

Control Signal Data

External Data

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* Memory CPU : CPU reads instruction or a unit of data from memory.

* CPU Memory : The CPU writes data to the memory * I/O CPU : The CPU reads data from an I/O device via the I/O module. * CPU I/O : The CPU sends data to the I/O device * I/O to or from Memory : I/O module is allowed to exchange data directly to memory without going through the CPU, using the direct memory access(DMA)

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It is a communication pathway connecting two or more devices. It is a shared transmission medium

Consists of multiple communication pathways or lines. Each lines is capable of transmitting signals representing 1 and 0.
Several lines of a bus can be used to transmit binary digits simultaneously.
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It is the bus that connects major computer components such as CPU, I/O and Memory. It consists of typically from 50 to 100 separate lines. Most common 3 functional groups of System Bus Data Lines Address Control Lines

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Data Lines provide a path for moving data between system modules. Data bus typically consists of 8,16 or 32 separate lines, this lines referred to as the width of the data bus.
Address Lines are used to designate the source or destination of the data on the data bus. Control Lines used to control the access to and thee use of the data and address lines. Since data and address lines are shared by all components
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Control signal transmit both COMMAND and TIMING information between system modules. Timing Signal: It indicates the validity of data and address information. Command signal: it specify operations to be performed.
Typical control lines: 1. Memory write : causes data on the bus to be written into the addressed location 2. Memory read : causes data from the address location to be placed on the bus 3. I/O write: causes data to be output to the addressed I/O port 4. I/O read : Causes data from the addressed I/O port to be placed of the Bus 5. Transfer ACK : indicates that data have been accepted from the placed on the bus. 6. Bus request : indicates that a modules needs4/28/2012 to gain Computer Systems Organization 32

If modules wishes to send data. First step : obtain the use of the bus Second step : transfer the data via bus If modules wishes to request data from another module. First step : obtain the use of the bus Second step : transfer the request to the other module.
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Processor Main Memory

Local Bus Local I/O Controller

Cache

System Bus Network SCSI Expansion Bus Interface Modem Serial

Expansion bus Traditional Bus Architecture

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Main Memory
Processor Local Bus Cache/ Bridge System Bus

SCSI

LAN

Graphic

Video

P1394

High-Speed Bus
FAX Modem Expansion Bus Interface Serial

Expansion bus High Performance Architecture

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- is it a popular high-bandwidth, processor independent bus that can function as a mezzanine or peripheral bus. ` - PCI delivers better performance for highspeed I/O subsystem like graphics display card, network interface controller, disk controller, etc. - PCI was used by Intel in 1990 for its Pentium Based systems

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PCI may be configured as a 32 or 64 bit bus, 49 mandatory signal lines and divided into 5 functional groups

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